Data Sheet, V3.1, February 2005
Differential Two-Wire Hall Effect
Sensor-IC for Wheel Speed Applications
with Direction Detection
TLE4942-1
TLE4942-1C
Sensors
Never stop thinking.
Edition 2004-03-19
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
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Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
PG-SSO-2-1
PG-SSO-2-2
Data Sheet 3 V3.1, 2005-02
Differential Two-Wire Hall Effect Sensor IC TLE4942-1
TLE4942-1C
Features
• Two-wire PWM current interface
• Detection of rotation direction
• Airgap diagnosis
• Assembly position diagnosis
• Dynamic self-calibration principle
• Single chip solution
• No external components needed
• High sensitivity
• South and north pole pre-induction possible
• High resistance to piezo effects
• Large operating air-gaps
• Wide operating temperature range
• TLE4942-1C: 1.8 nF overmolded capacitor
The Hall Effect sensor IC TLE4942-1 is designed to provide information about rotational
speed, direction of rotation, assembly position and limit airgap to modern vehicle dynamics
control systems and ABS. The output has been designed as a two wire current interface
based on a Pulse Width Modulation principle. The sensor operates without external
components and combines a fast power-up time with a low cut-off frequency. Excellent
accuracy and sensitivity is specified for harsh automotive requirements as a wide temperature
range, high ESD robustness and high EMC resilience. State-of-the-art BiCMOS technology
is used for monolithic integration of the active sensor areas and the signal conditioning.
Finally, the optimized piezo compensation and the integrated dynamic offset compensation
enable easy manufacturing and elimination of magnet offsets. The TLE4942-1 is
additionally provided with an overmolded 1.8 nF capacitor for improved EMI performance.
Type Marking Ordering Code Package
TLE4942-1 4201R4 Q62705-K738 PG-SSO-2-1
TLE4942-1C 42C1R4 Q62705-K709 PG-SSO-2-2
TLE4942 Series
TLE4942-1
TLE4942-1C
Data Sheet 4 V3.1, 2005-02
Pin Configuration
(top view)
Figure 1
Figure 2 Block Diagram
AEP03191
Center of
sensitive are
a
CC
VGND
Data Code
Marking
2.67
2.5
1.44
B B
A0.3
A0.3
CC
VGND
21
S
0015
4201R4
AEB03192
PGA Speed
ADC
Direction
ADC
Oscillator
(syst clock)
Main
Comp
Gain Range
Offset
DAC
"Signa
l"
Digital
Circuit
Power Supply
Regulator
"X"
Hall Probes:
R
ight
C
enter
L
eft
"V
CC
"
"X" = (Left + Right)/2 - Center
TLE4942-1
TLE4942-1C
Data Sheet 5 V3.1, 2005-02
Functional Description
The differential Hall Effect IC detects the motion of ferromagnetic or permanent magnet
structures by measuring the differential flux density of the magnetic field. To detect the
motion of ferromagnetic objects the magnetic field must be provided by a backbiasing
permanent magnet. Either the South or North pole of the magnet can be attached to the
rear, unmarked side of the IC package.
Magnetic offsets of up to ± 20 mT and mechanical offsets are cancelled out through a
self-calibration algorithm. Only a few transitions are necessary for the self-calibration
procedure. After the initial self-calibration sequence switching occurs when the input
signal crosses the arithmetic mean of its max. and min. values (e.g. zero-crossing for
sinusoidal signals).
The ON and OFF state of the IC are indicated by High and Low current consumption.
Each zero crossing of the magnetic input signal triggers an output pulse.
Figure 3 Zero-Crossing Principle and Corresponding Output Pulses
AED0318
9
Pulse
Length
M
agnetic Signal
O
utput Signal
TLE4942-1
TLE4942-1C
Data Sheet 6 V3.1, 2005-02
Figure 4 Definition of Differential Magnetic Flux Density Ranges
AED03190
Differential
M
agnetic Flux
Density
∆B
t
Range for EL
pulse: ∆BEL
Range for
warning pulse:
∆BWarning
∆BLimit
(max. airgap
exceeded)
TLE4942-1
TLE4942-1C
Data Sheet 7 V3.1, 2005-02
In addition to the speed signal, the following information is provided by varying the length
of the output pulses in Figure 3 (PWM modulation):
Airgap Warning range = Warning
Warning information is issued in the output pulse length when the magnetic field is below
a critical value (e. g. the airgap between the Hall Effect IC and the target wheel exceeds
a critical value). The device works with reduced functionality. Warning information is
given only in calibrated mode.
Assembly position range = EL
EL information is issued in the output pulse length when the magnetic field is below a
predefined value (the airgap between the Hall Effect IC and the target wheel exceeds a
predefined value). The device works with full functionality.
Direction of rotation right = DR-R
DR-R information is issued in the output pulse length when the target wheel in front of
the Hall Effect IC moves from the pin GND to the pin VCC.
Direction of rotation left = DR-L
DR-L information is issued in the output pulse length when the target wheel in front of
the Hall Effect IC moves from the pin VCC to the pin GND. At sufficient magnetic field the
direction information will be corrected already during uncalibrated mode after 2 pulses.
Figure 5 Definition of Rotation Direction
AEA0319
3
DR-L DR-
R
S
0015
4201R4
TLE4942-1
TLE4942-1C
Data Sheet 8 V3.1, 2005-02
Circuit Description
The circuit is supplied internally by a voltage regulator. An on-chip oscillator serves as a
clock generator for the DSP and the output encoder.
Speed Signal Circuitry
TLE4942-1 speed signal path comprises of a pair of Hall Effect probes, separated from
each other by 2.5 mm, a differential amplifier including noise limiting low-pass filter, and
a comparator triggering a switched current output stage. An offset cancellation feedback
loop is provided through a signal-tracking A/D converter, a digital signal processor
(DSP), and an offset cancellation D/A converter.
During the power-up phase the output is disabled (low state).
Uncalibrated Mode
Occasionally a short initial offset settling time td,input might delay the detection of the input
signal (the sensor is “blind”). This happens at power on or when a stop pulse is issued.
The magnetic input signal is tracked by the speed ADC and monitored within the digital
circuit. For detection of a magnetic edge the signal transient needs to exceed a threshold
(digital noise constant, ∆ˆ
BLimit, early startup). Only the first edge is suppressed internally. With
the second detected edge pulses are issued at the output. When the signal slope is
identified as a rising edge (or falling edge), a comparator is triggered. The comparator is
triggered again as soon as a falling edge (or rising edge respectively) is detected (and
vice versa). The minimum and maximum values of the input signal are extracted and
their corresponding arithmetic mean value is calculated. The offset of this mean value is
determined and fed into the offset cancellation DAC.
Between the startup of the magnetic input signal and the time when its second extreme
is reached, the PGA (programmable gain amplifier) will switch to its appropriate position.
This value is determined by the signal amplitude and initial offset value. The digital noise
constant value is increased, leading to a change in phase shift between magnetic input
signal and output signal. After that consecutive output pulses should have a nominal
delay of about 180°.
Transition to Calibrated Mode
In the calibrated mode the phase shift between input and output signal is no longer
determined by the ratio between digital noise constant and signal amplitude. Therefore
a sudden change in the phase shift may occur during the transition from uncalibrated to
calibrated mode.
Calibrated Mode
During the uncalibrated mode the offset value is calculated by the peak detection
algorithm. In running mode (calibrated mode) the offset correction algorithm of the DSP
TLE4942-1
TLE4942-1C
Data Sheet 9 V3.1, 2005-02
is switched into a low-jitter mode, thereby avoiding oscillation of the offset DAC LSB.
Switching occurs at zero-crossover of the differential magnetic signal. It is only affected
by the small residual offset of the comparator and by the propagation delay time of the
signal path, which is mainly determined by the noise limiting filter. Signals which are
below a predefined threshold ∆BLimit are not detected. This prevents unwanted switching.
The comparator also detects whether the signal amplitude exceeds ∆BWarning or ∆BEL.
This information is fed into the DSP and the output encoder. The pulse length of the High
output current is generated according to the rotational speed, the direction of rotation
and the magnetic field strength.
Direction Signal Circuitry
The differential signal between a third Hall probe and the mean of the differential Hall
probe pair is obtained from the direction input amplifier. This signal is digitized by the
direction ADC and fed into the DSP circuitry. There, the phase of the signal referring to
the speed signal is analyzed and the direction information is forwarded to the output
encoder.
Additional Notes
Typically the phase error due to PGA-transition reduces the error caused by switching
the mode from uncalibrated to calibrated.
In very rare cases a further PGA switching can occur during the calibration process. It
can take place when the signal is extremely close to a PGA switching threshold. This
additional switching might delay the transition to calibrated mode by two more pulses.
The probability of this case is mainly depending on variations of magnetic amplitude
under real automotive conditions (see Appendix B)
The direction detection feature is also active in the uncalibrated mode but only at
substantial magnetic signal. The correct direction information is worst case available
after the first two output pulses in calibrated mode. Regarding the rare case mentioned
before combined with other initial conditions this may lead to a worst case of 9 pulses
before correct direction information is guaranteed.
Package Information
Pure tin covering (green lead plating) is used. Leadframe material is Wieland K62 (UNS:
C18090) and contains CuSn1CrNiTi. Product is ROHS compliant and may contain a
data matrix code on the rear side of the package.
TLE4942-1
TLE4942-1C
Data Sheet 10 V3.1, 2005-02
Note: Stresses in excess of those listed here may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
Table 1 Absolute Maximum Ratings
Tj = – 40°C to 150°C, 4.5 V ≤ VCC ≤ 16.5 V
Parameter
Symbol
Limit Values Unit Remarks
min. max.
Supply voltage VCC – 0.3 – V Tj < 80°C
–16.5 Tj = 170°C
–20 Tj = 150°C
–22 t = 10 × 5 min
–24 t = 10 × 5 min,
RM ≥ 75 Ω
included in VCC
–27 t = 400 ms, RM ≥ 75 Ω
included in VCC
Reverse polarity current Irev – 200 mA External current
limitation required,
t < 4 h
Junction temperature Tj– 150 °C 5000 h, VCC < 16.5 V
– 160 2500 h, VCC < 16.5 V
(not additive)
– 170 500 h, VCC < 16.5 V
(not additive)
– 190 4 h, VCC < 16.5 V
Active lifetime tB,active 10000 – h
Storage temperature TS– 40 150 °C
Thermal resistance
PG-SSO-2-1
RthJA –190K/W
1)
1) Can be improved significantly by further processing like overmolding
TLE4942-1
TLE4942-1C
Data Sheet 11 V3.1, 2005-02
Note: Within the operating range the functions given in the circuit description are fulfilled.
Table 2 ESD Protection
Human Body Model (HBM) tests according to:
Standard EIA/JESD22-A114-B HBM (covers MIL STD 883D)
Parameter Symbol Limit Values Unit Notes
min. max.
ESD-Protection
TLE4942-1
TLE4942-1C
VESD
–
–
± 12
± 12
kV
R = 1.5 kΩ,
C = 100 pF
Table 3 Operating Range
Parameter
Symbol
Limit Values Unit Remarks
min. max.
Supply voltage VCC 4.5 20 V Directly on IC leads
includes not the RM
voltage drop
Supply voltage ripple VAC –6VppVCC = 13 V
0 < f < 50 kHz
Junction temperature Tj– 40 150 °C
– 170 500 h
VCC ≤ 16.5 V,
increased jitter
permissible
Pre-induction B0– 500 + 500 mT
Pre-induction offset
between outer probes
∆Bstat.,l/r – 20 + 20 mT
Pre-induction offset
between mean of outer
probes and center probe
∆
B
stat.,m/o
– 20 + 20 mT
Differential Induction ∆B– 120 + 120 mT
TLE4942-1
TLE4942-1C
Data Sheet 12 V3.1, 2005-02
Table 4 Electrical Characteristics
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter Symbol Limit Values Unit Remarks
min. typ. max.
Supply current ILOW 5.9 7 8.4 mA
Supply current IHIGH 11.8 14 16.8 mA
Supply current ratio IHIGH / ILOW 1.9 – –
Output rise/fall slew rate
TLE4942-1
tr, tf12
7.5
–
–
26
24
mA/µs
RM ≤ 150 Ω
RM ≤ 750 Ω
See Figure 6
Output rise/fall slew rate
TLE4942-1C
tr, tf
8
8
–
–
22
26
mA/µs
RM = 75 Ω
T < 125°C
T < 170°C
See Figure 6
Current ripple dIX/dVCC IX––90µA/V
Limit threshold
1 Hz < f < 2500 Hz
2500 Hz < f < 5000 Hz
∆BLimit
0.35
–
0.8
–
1.5
1.6
mT 1)
Airgap warning threshold
1 Hz < f < 2500 Hz
2500 Hz < f < 5000 Hz
∆BWarning
0.9
–
1.6
–
2.6
2.8
mT 1)
Limit - Airgap warning
threshold ratio
∆BWarning /
∆BLimit
1.3 2 2.7
Assembly position
threshold
∆BEL 5.2 7.2 9.6 mT 1)
At room temp
Magnetic differential field
change necessary to
detect magnetic edge in
uncalibrated mode
∆ˆ
BLimit, early
startup
––– First detected
magnetic edge
is suppressed
(nonvalid)
∆ˆ
BLimit, early startup 0.7 1.76 3.3 mT
Initial calibration
delay time
td,input 255 300 345 µs
Additional to
n
start
Magnetic edges
suppressed until output
switching
nDZ-start ––1
2) magn.
edges
After power on
and stop pulse
TLE4942-1
TLE4942-1C
Data Sheet 13 V3.1, 2005-02
Magnetic edges required
for offset calibration 2)
nDZ-calibration ––6
2) magn.
edges
7
th
edge correct
3)
in rare cases
(see Appendix B)
n
DZ-calibration-
rare
––8
edges
Number of pulses in
uncalibrated mode
nDZ-Startup ––5
pulses
in rare cases
(see Appendix B)
nDZ-Startup-
rare
––7
pulses
Number of pulses with
invalid direction
information
∆B < ∆BEL
∆B > ∆BEL
nDR-Startup
–
–
–
–
7
2 4)
pulses
After nDR-Startup
pulses + 1 the
direction
information is
correct
Number of pulses with
invalid assembly bit
information
nEL-Startup ––7
pulses
After nEL-Startup
pulses + 1 the
assembly bit
information is
correct
Number of pulses where
the airgap warning
information is suppressed
nLR-Startup ––5
pulses
LR information is
provided only in
calibrated mode
Signal behavior after
undervoltage or
standstill > tStop
Number of magnetic
edges where the first
pulse in given.
nDZ-Start – – 2 edges
Magnetic edge
according to
∆ˆ
B
Limit, early startup
t
d,input
has to be
taken into account
Shortest time delay
between pulse 0 (stop
pulse) and pulse 1
293 345 397 µs Reference rising
edges, includes
pre low length
Table 4 Electrical Characteristics (cont’d)
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter Symbol Limit Values Unit Remarks
min. typ. max.
TLE4942-1
TLE4942-1C
Data Sheet 14 V3.1, 2005-02
Shortest time delay
between wheel speed
pulse 1 and 2 and all
further pulses
38 45 52 µs Falling to rising
edge - identical
with pre low bit
length
Phase shift change
during PGA switching
0–80°
Phase shift change during
transition from uncalibrated
to calibrated mode
∆Φswitch – 90 – + 90 °
Frequency f1
2500
–
–
2500
5000
Hz
5)
Frequency changes df/dt – – ± 100
Hz/ms
Duty cycle duty 40 50 60 % 6) Measured
@∆B = 2 mT
sine wave Def.
Figure 7
Jitter, Tj < 150°C
Tj < 170°C
1 Hz < f < 2500 Hz
SJit-close –
–
–
–
± 2
± 3
%7) 1σ value
VCC = 12 V
∆B ≥ 2 mT
Jitter, Tj < 150°C
Tj < 170°C
2500 Hz < f < 5000 Hz
SJit-close –
–
–
–
± 3
± 4.5
%7) 1σ value
VCC = 12 V
∆B ≥ 2 mT
Jitter, Tj < 150°C
Tj < 170°C
1 Hz < f < 2500 Hz
SJit-far –
–
–
–
± 4
± 6
%7) 1σ value
VCC = 12 V
2mT
≥∆
B
>
∆
B
Limit
Jitter, Tj < 150°C
Tj < 170°C
2500 Hz < f < 5000 Hz
SJit-far –
–
–
–
± 6
± 9
%7) 1σ value
VCC = 12 V
2mT
≥∆
B
>
∆
B
Limit
Table 4 Electrical Characteristics (cont’d)
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter Symbol Limit Values Unit Remarks
min. typ. max.
TLE4942-1
TLE4942-1C
Data Sheet 15 V3.1, 2005-02
Jitter during startup and
uncalibrated mode
SJit-close
(1
σ
-value)
–
–
–
–
± 3
± 4
%–40°C≤Tamb
≤150°C
150°C ≤Tamb
≤ 170°C
SJit-far
(1
σ
-value)
–
–
–
–
± 5
± 7
%–40°C≤Tamb
≤150°C
150°C ≤Tamb
≤ 170°C
Jitter at board net ripple SJit-AC ––± 2%
7)
V
CC
= 13 V ± 6 Vpp
0 < f < 50 kHz
∆B = 15 mT
Jitter at board net ripple in
uncalibrated mode
SJit-AC
(1
σ
-value)
––± 3%
7)
V
CC
= 13 V ± 6 Vpp
0 < f < 50 kHz
∆B = 15 mT
1) Magnetic amplitude values, sine magnetic field, Limits refer to the 50% critera. 50% of pulses are missing or
wrong. Valid in calibrated mode only.
2) The sensor requires up to nstart magnetic switching edges for valid speed information after power-up or after a
stand still condition. During that phase the output is disabled.
3) One magnetic edge is defined as a montonic signal change of more than 3.3 mT
4) Direction signal is given already during uncalibrated mode. Assembly Bit information is only provided in
calibrated mode
5) High frequency behavior not subject to production test - verified by design/characterization. Frequency above
2500 Hz may have influence on jitter performance and magnetic thresholds. DR-R pulse length will be cut off
above app. 3.3 kHz Therefore direction detection may not be possible anymore at high frequency.
6) During fast offset alterations, due to the calibration algorithm, exceeding the specified duty cycle is permitted
for short time periods
7) Not subject to production test- verified by design/characterization
Table 4 Electrical Characteristics (cont’d)
All values specified at constant amplitude and offset of input signal, over
operating range, unless otherwise specified.
Typical values correspond to VCC = 12 V and TA = 25°C
Parameter Symbol Limit Values Unit Remarks
min. typ. max.
TLE4942-1
TLE4942-1C
Data Sheet 16 V3.1, 2005-02
Figure 6 Definition of Rise and Fall Time
Table 5 Timing Characteristics
Parameter Symbol Limit Values Unit Remarks
min. typ. max.
Pre-low length tpre-low 38 45 52 µs
Length of Warning pulse tWarning 38 45 52 µs
Length of DR-L pulse tDR-L 76 90 104 µs
Length of DR-R pulse tDR-R 153 180 207 µs
Length of DR-L & EL
pulse
tDR-L&EL 306 360 414 µs
Length of DR-R & EL
pulse
tDR-R&EL 616 720 828 µs
Output of EL pulse,
maximum frequency
fELmax –117–Hz
Length of stand still pulse tStop 1.232 1.44 1.656 ms See Figure 9
Stand still period 1)
1) If no magnetic switching edge is detected for a period longer than Tstop, the stand still pulse is issued
TStop 590 737 848 ms See Figure 9
AET03194
t
10%
90%
50%
trtf
I
HIGH
ILOW t1
I
TLE4942-1
TLE4942-1C
Data Sheet 17 V3.1, 2005-02
Figure 7 Definition of Duty Cycle
PWM Current Interface
Between each magnetic transition and the rising edge of the corresponding output pulse
the output current is Low for tpre-low in order to allow reliable internal conveyance.
Following the signal pulse (current is High) is output.
If the magnetic differential field exceeds ∆BEL, the output pulse lengths are 90 µs or
180 µs respectively, depending on the direction of rotation.
When the magnitude of the magnetic differential field is below ∆BEL, the output pulse
lengths are 360 µs and 720 µs respectively, depending on left or right rotation. Due to
decreasing cycle times at higher frequencies, these longer pulses are only output up to
frequencies of approximately 117 Hz. For higher frequencies and differential magnetic
fields below ∆BEL, the output pulse lengths are 90 µs or 180 µs respectively.
If the magnitude of the magnetic differential field is below ∆BWarning, the output pulse
length is 45 µs. The warning output is dominant, this means that close to the limit airgap
the direction and the assembly position information are disabled.
For magnitudes of the magnetic differential field below ∆BLimit, signal is lost.
In case no magnetic differential signal is detected for a time longer than the stand still
period TStop, the stop pulse is output. Typically with the first output stop pulse, the circuitry
reverts to the uncalibrated mode.
AET03195
t
Xn
I
I
HIGH
ILOW t1
T
Xn+1 Xn+2
Duty = t1 / T x 100%
TLE4942-1
TLE4942-1C
Data Sheet 18 V3.1, 2005-02
Figure 8 Definition of PWM Current Interface
AET03196
tpre-low = 45 µs
Xn Xn+1 Xn+
2
tLR = 45 µs
tDR-L = 2 x tLR
tDR-R = 4 x tLR
tDR-L&AP = 8 x tLR
tDR-R&AP = 16 x tLR
Xn Xn+1 Xn+2
T
ransferred
S
ignal:
D
R-R & EL
T
ransferred
S
ignal:
D
R-L & EL
T
ransferred
S
ignal:
D
R-R
T
ransferred
S
ignal:
D
R-L
T
ransferred
S
ignal:
L
R
Internal
S
ensor
S
peed Signal
TLE4942-1
TLE4942-1C
Data Sheet 19 V3.1, 2005-02
Figure 9 Definition of Stand Still Output Pulse
Duty Cycle at Fast Changing Frequencies
If the duty cycle deviates from 50%, it is possible that the present pulse length is output
entirely once and cut once, within the same period, see Figure 10.
Figure 10 Deviation of Duty Cycle at Fast Changing Frequencies
AET0319
tStop = 32 x tLR
TStop
ransferred
ignal:
tand Still
nternal Sensor
peed Signal
AET03198
Pulse lengths are longe
r
than half sped period
Pulse lengths are shorter
than half sped period
Internal
Sensor
S
peed Signal at
I
ncreasing Speed
T
ransferred Signal
TLE4942-1
TLE4942-1C
Data Sheet 20 V3.1, 2005-02
Table 6 Electro Magnetic Compatibility (values depend on RM!)
Ref. ISO 7637-1; test circuit 1;
∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω
Parameter Symbol Level/Typ Status
Testpulse 1
Testpulse 2
Testpulse 3a
Testpulse 3b
Testpulse 4
Testpulse 5
VEMC IV / – 100 V
IV / 100 V
IV / – 150 V
IV / 100 V
IV / – 7 V
IV / 86.5 3) V
C 1)
C 1)
A
A
B 2)
C
1) According to 7637-1 the supply switched “OFF” for t = 200 ms
2) According to 7637-1 for test pulse 4 the test voltage shall be 12 V ± 0.2 V. Measured with RM = 75 Ω only.
Mainly the current consumption will decrease. Status C with test circuit 1.
3) Applying in the board net a suppressor diode with sufficient energy absorption capability
Note: Values are valid for all TLE4941/42 types!
Ref. ISO 7637-3; test circuit 1;
∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25°C; RM ≥ 75 Ω
Parameter Symbol Level/Typ Status
Testpulse 1
Testpulse 2
Testpulse 3a
Testpulse 3b
VEMC IV / – 30 V
IV / 30 V
IV / – 60 V
IV / 40 V
A
A
A
A
Note: Values are valid for all TLE4941/42 types!
Ref. ISO 11452-3; test circuit 1; measured in TEM-cell
∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T = 25°C
Parameter Symbol Level/Typ Remarks
EMC field strength ETEM-Cell IV / 200 V/m AM = 80%, f = 1 kHz
Note: Only valid for non C- types!
Ref. ISO 11452-3; test circuit 1; measured in TEM-cell
∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T = 25°C
Parameter Symbol Level/Typ Remarks
EMC field strength ETEM-Cell IV / 250 V/m AM = 80%, f = 1 kHz
Note: Only valid for C-types!
TLE4942-1
TLE4942-1C
Data Sheet 21 V3.1, 2005-02
Figure 11 Test Circuit 1
Figure 12 Distance Chip to Upper Side of IC
AES03199
GND
VCC Sensor
RMC2
VEMC
EMC-Generator Mainframe
D1
C1
D2
Components: D1: 1N4007
D2: T 5Z27 1J
C1:10µF / 35V
C2: 1 nF / 1000 V
RM:75Ω / 5 W
PG-SSO-2-1/2 : 0.3
d : Distance chip to branded side of I
C
mm
±0.08
AEA02961
d
Hall-Probe
Branded Side
TLE4942-1
TLE4942-1C
Data Sheet 22 V3.1, 2005-02
Package Outlines
Figure 13
0.1
6.35±0.4
12.7±0.3
±0.3
4
CODE
1
x
45˚
12.7±1
CODE CODE
-0.1
1
0.25±0.05
7˚
7˚
0.2+0.1
Adhesiv
e
±0.5
61
-1
±0.5
18
Tape
0.39±0.1
-0.15
0.25
9
±0.5
23.8
+0.75
-0.5
38 MAX.
3.38
3.71
(0.25)
±0.08
±0.06
1.9 MAX.
5.16±0.08
5.34
±0.05
0.1 MAX.
1.9 MAX.
1.2
±0.1
±0.05
0.87
±0.05
1.67
(14.8)
2.54
2 A
A
2x
1
) No solder function area
Total tolerance at 10 pitches ±1
(Useable Length)
Tape
±1˚
12
0.2
2x
0.5
1 MAX.
1)
PG-SSO-2-1
(Plastic Single Small Outline Package)
GPO09296
TLE4942-1
TLE4942-1C
Data Sheet 23 V3.1, 2005-02
Figure 14
6.35±0.4
12.7±0.3
±0.3
4
CODE
1
x
45˚
12.7±1
CODE CODE
-0.1
1
0.25±0.05
7˚
7˚
0.2+0.1
Adhesiv
e
±0.5
61-1
±0.5
18
Tape
0.39±0.1
-0.15
0.25
9
±0.5
23.8
+0.75
-0.5
38 MAX.
0.65
3.38
3.71
(0.25)
±0.1
±0.08
±0.06
1.9 MAX.
5.16±0.08
5.34
±0.05
0.1 MAX.
1.9 MAX.
1.2±0.1
±0.05
0.87
±0.05
1.67
(14.8)
1)
3.01
2.54
2 A
A
B
1) No solder function area
Total tolerance at 10 pitches ±1
(Useable Length)
±0.05
2.2
1.5±0.05
(2.4)
(2.7)
(1.3)
5.34±0.05
Tape
1.81±0.05
0.2 2x
2x
0.5
1.2±0.05
5.16±0.08
A - A
AA
Capacitor
(8.17)
±0.1
7.07
10.2±0.1
±0.05
0.25
0.2
B
±1˚
12
0.2
0.1
2x
PG-SSO-2-2
(Plastic Single Small Outline Package)
GPO09448
Y
ou can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm
TLE4942-1
TLE4942-1C
Data Sheet 24 V3.1, 2005-03
Appendix A
Typical Diagrams (measured performance)
TC = Tcase, IC = approx. Tj - 5°C
Supply Current
Supply Current = f(VCC)
Supply Current Ratio IHIGH / ILOW
Supply Current Ratio IHIGH/ILOW = f(VCC)
-40
6
T
C
I
HIGH, ILOW
8
10
12
14
16
18
mA
0 40 80 120 ˚C 20
0
AED03700
IHIGH
ILOW
IHIGH
ILOW
0
6
V
CC
I
HIGH, ILOW
mA
5 10 15 20 V 3
0
AED03702
25
8
10
12
14
16
20
-40
1.8
T
C
I
HIGH / ILOW
1.9
2.0
2.1
2.2
2.3
2.4
0 40 80 120 ˚C 20
0
AED03701
I
HIGH / ILOW
IHIGH / ILOW
0
1.6
V
CC
5 10 15 20 V 3
0
AED03703
25
1.8
2.0
2.2
2.4
TLE4942-1
TLE4942-1C
Data Sheet 25 V3.1, 2005-03
Slew Rate without C, RM= 75 Ω
Slew Rate without C = f(RM)
Slew Rate with C= 1.8 nF, RM=75 Ω
Slew Rate with C= 1.8 nF = f(RM)
12
T
C
Slew Rate
mA/µs
AED03704
14
16
18
20
22
26
24
-40 0 40 80 120 ˚C 20
0
Fall
Rise
12
R
M
Slew Rate
mA/µs
AED03706
0Ω
13
14
15
16
17
18
19
20
22
200 400 600 800 100
0
Fall
Rise
8
T
C
Slew Rate
m
A/µs
AED03705
-40 0 40 80 120 ˚C 20
0
10
12
14
16
18
20
22
24
26
Fall
Rise
0
R
M
Slew Rate
m
A/µs
AED03707
0Ω200 400 600 800 100
0
2
4
6
8
10
12
14
16
18
22
Fall
Rise
TLE4942-1
TLE4942-1C
Data Sheet 26 V3.1, 2005-03
Magnetic Threshold
∆Bwarning, ∆BLimit at f=1kHz
Magnetic Threshold
∆Bwarning = f(f), ∆BLimit = f(f)
Magnetic Threshold
∆BEL 01
Magnetic Threshold
∆BEL 04
-40
0
T
C
∆
BmT
0 40 80 120 ˚C 20
0
AED03708
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
Bwarning
BLimit
100
0
f
∆
BmT
Hz
AED03710
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10110210310
4
Bwarning
BLimit
-40
2.0
T
C
∆
BmT
0 40 80 120 ˚C 20
0
AED03709
BEL
2.5
3.0
3.5
4.0
4.5
5.0
-40
5
T
C
∆
BmT
0 40 80 120 ˚C 20
0
AED03711
6
7
8
9
10
BEL
TLE4942-1
TLE4942-1C
Data Sheet 27 V3.1, 2005-03
Jitter 1 at B=2mT, 1kHz
Delaytime td
1)
1) td is the time between the zero crossing of
∆B= 2 mT sinusoidal input signal and the rising
edge (50%) of the signal current.
Pulse Length of Direction Signal Left
and Right (tDR-L, tDR-R)2)
2) Temp. Behaviour of Other Pulse Lengths are similar
0
T
C
Jitter
%
AED03712
-40 0 40 80 120 ˚C 20
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-40
40
T
C
t
d
µs
˚C
AED03714
0 40 80 120 18
0
42
44
46
48
50
52
54
56
58
60
t
d @ 2.5 kHz
70
T
C
Pulse Length
µs
AED03713
-40 0 40 80 120 ˚C 20
0
90
110
130
150
170
190
210
DR-R
DR-L
TLE4942-1
TLE4942-1C
Data Sheet 28 V3.1, 2005-03
Appendix B
Release 2.0
Occurrence of initial calibration delay time td, input
If there is no input signal (standstill), a new initial calibration is triggered each 0.7 s. This
calibration has a duration td, input of max. 300 µs. No input signal change is detected
during that initial calibration time.
In normal operation (signal startup) the probability of td, input to come into effect is:
td, input /time frame for new calibration = 300 µs/700 ms = 0.05%.
After IC resets (e.g. after a significant undervoltage) td, input will always come into effect.
Magnetic input signal extremely close to a PGA switching threshold during signal
startup
After signal startup normally all PGA switching into the appropriate gain state happens
within less than one signal period. This is included in the calculation for nDZ-Startup. For the
very rare case that the signal amplitude is extremely close to a PGA switching threshold
and the full range of the following speed ADC respectively, a slight change of the signal
amplitude can cause one further PGA switching. It can be caused by non-perfect
magnetic signal (amplitude modulation due to tolerances of polewheel, tooth wheel or air
gap variation). This additional PGA switching can result in a further delay of the
calibrated output signal up to two magnetic edges leading to a worst case edges of
nDZ-Start up rare =8.
For a more detailed explanation please refer to the document
"TLE4941/42 Application Notes - Frequently Asked Questions".
TLE4942-1
TLE4942-1C
Data Sheet 29 V3.1, 2005-03
Fast change of direction signal at small fields:
The described behaviour can happen when rotation direction is changed in t < 0.7 s
Figure 1
A local extremum (maximum or minimum) of the magnetic input signal can be caused
during a reversal of rotation direction. In this case the local extremum can be detected
by the IC and used for offset calibration. (E.g. the local maximum marked by an arrow in
the above diagram.) Obviously the calculated offset value will be incorrect with respect
to the following signal. As worst case a duty cycle up to max. 15% to 85% could occur
for a few pulses. Bwarning and BEL information can be incorrect during that short period.
After a re-calibration, which typically takes place after 2...3 zero-crossings the offset will
be correct again and hence the duty cycle, Bwarning and BEL also.
As a result of "bad" duty cycle after fast direction reversal the sampling points for
direction detection are at unusual signal phase angles also. At small magnetic input
signals (∆B<1.7x∆Bwarning) this can lead to incorrect direction information. Duration:
max. 7 pulses, in very rare cases (additional PGA transition during calibration similar to
2.) max. 9 pulses.
A local extremum close to the zero-crossing theoretically could lead to distances down
to 45 µs of two consecutive output pulses at the point of direction reversal as well as a
Bwarning pulse also.
AED03715
ms
Time
∆ B
-3
3
0
-2
-1
0
1
2
100 200 300 400 500 600 700 800 900 1000 1200
Direction Change of Input Signal at
t
= 690
TLE4942-1
TLE4942-1C
Data Sheet 30 V3.1, 2005-03
Behaviour close to the magnetic thresholds Bwarning, BLimit, (BEL)
Real non-perfect magnetic signals and intrinsic thermal noise cause amplitude
variations. Very close to the magnetic thresholds a mix of output pulse widths
representing the referring magnetic values occur. For similar reasons pulse widths of 90,
180, 360, 720 µs can be observed occasionally for single pulses at BLimit.
Behaviour close to speed v5 (fEL-bit = ca. 117 Hz)
Signal imperfections like duty cycle and jitter result in a mix of output pulses with and
without assembly bit (EL) information. Input signal duty cycles apart from 50% increase
the range where both pulse widths appear.
Dependency of direction detection on input signal pitch
The direction detection is optimized for a target wheel pitch of 5 mm where it will work
down to Bwarning. (Bwarning and direction detection thresholds meet at 5 mm pitch). For
pitches other than 5 mm the magnetic input signal has to be increased to compensate
for the inevitable signal attenuation.
Figure 2 Degradation of speed and direction signal at
sinusoidal input signals = f(pitch)
AED 03716
mm
Pitch
Degradation Factor
02345678910 12
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.8
1.6
Speed
Direction
TLE4942-1
TLE4942-1C
Data Sheet 31 V3.1, 2005-02
For questions on technology, delivery and prices please contact the Infineon
Technologies offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
Revision History:2005-02, V3.1
Previous Version: 2004-06, V3.0
Page Subjects (major changes since last revision)
3,22,23 Package name changed from P-... to PG-...
22,23 Figure 13,14: Package Outline PG-SSO-2-1
- Tape thickness changed from 0.5±0.1mm to 0.39±0.1 mm
- Package mold dimension changed from 5.38±0.05 mm to 5.34±0.05 mm
(Note: Only the dimensions in the drawing changed, but not the package
dimensions)
24-27 Appendix A inserted
28-30 Appendix B inserted
- new format of data sheet
12 change ∆Bwarning from 1.4 mT to 1.6 mT
change ∆Bwarning/∆Blimit from 1.75 mT to 2 mT
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