_______________General Description
These microprocessor (µP) supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery-control functions
in µP systems. They significantly improve system relia-
bility and accuracy compared to separate ICs or
discrete components.
These devices are designed for use in systems powered
by 3.0V or 3.3V supplies. See the selector guide in the
back of this data sheet for similar devices designed for
5V systems. The suffixes denote different reset threshold
voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see the
Reset Threshold section in the Detailed Description). All
these parts are available in 8-pin DIP and SO packages.
Functions offered in this series are as follows:
________________________Applications
Battery-Powered Computers and Controllers
Embedded Controllers
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
Portable Equipment
____________________________Features
♦–
R
—
E
—
S
—
E
—
T
–and RESET Outputs
♦Manual Reset Input
♦Precision Supply-Voltage Monitor
♦200ms Reset Time Delay
♦Watchdog Timer (1.6s timeout)
♦Battery-Backup Power Switching—
Battery Can Exceed VCC in Normal Operation
♦40µA VCC Supply Current
♦1µA Battery Supply Current
♦Voltage Monitor for Power-Fail or
Low-Battery Warning
♦Guaranteed –
R
—
E
—
S
—
E
—
T
– Assertion to VCC = 1V
♦8-Pin DIP and SO Packages
______________Ordering Information
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
________________________________________________________________ Maxim Integrated Products 1
MAX690T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
0.1μF
VOUT
RESET
(RESET)
PFO
WDI
R1
VBATT
VCC
GND
GND
GND
VCC
0.1μF0.1μF
3.6V
LITHIUM
BATTERY
CMOS RAM
μP
VCC
RESET
NMI
I/O LINE
UNREGULATED
DC
REGULATED +3.3V OR +3.0V
R2 BUS
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
PFI
See last page for MAX704T/S/R, MAX806T/S/R.
__________________Pin Configuration
1
2
3
4
8
7
6
5
DIP/SO
TOP VIEW
PFO
VBATT
RESET (RESET)
WDI <MR>
VOUT
VCC
GND
PFI
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
( )
ARE FOR MAX804T/S/R, MAX805T/S/R
< > ARE FOR MAX704T/S/R, MAX806T/S/R
_________Typical Operating Circuits
19-0243; Rev 2; 12/05
PART** TEMP RANGE
MAX690_CPA 0°C to +70°C
MAX690_CSA 0°C to +70°C
MAX690_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
PIN-PACKAGE
Part
MAX690_EPA -40°C to +85°C
MAX690_ESA -40°C to +85°C
MAX690_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
Active-Low Reset
Active-High Reset
Watchdog Input
Manual Reset
Input
Backup-Battery
Switch
Power-Fail
Threshold Accuracy
Power-Fail
Comparator
Reset Window
MAX690 ✓✓ ✓
±4% ✓±75mV
MAX704 ✓✓✓
±4% ✓±75mV
MAX802 ✓✓ ✓
±2% ✓±2%
MAX804 ✓✓ ✓
±2% ✓±2%
MAX805 ✓✓ ✓
±4% ✓±75mV
MAX806 ✓✓✓
±2% ✓±2%
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
**These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
Devices in PDIP and SO packages are available in both leaded
and lead-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA= TMIN to TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Terminal Voltage (with respect to GND)
VCC.........................................................................-0.3V to 6.0V
VBATT....................................................................-0.3V to 6.0V
All Other Inputs ...................-0.3V to the higher of VCC or VBATT
Continuous Input Current
VCC..................................................................................100mA
VBATT ...............................................................................18mA
GND ..................................................................................18mA
Output Current
–
R
—
E
—
S
—
E
—
T
–, –
P
—
F
—
O
–....................................................................18mA
VOUT ................................................................................100mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 9.09mW/°C above +70°C) ..............727mW
SO (derate 5.88mW/°C above +70°C)...........................471mW
CERDIP (derate 8.00mW/°C above +70°C)...................640mW
Operating Temperature Ranges
MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _ ........0°C to +70°C
MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _. .....-40°C to +85°C
MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _...-55°C to +125°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
MAX690_M, MAX704_M,
MAX80_ _M, VCC < 5.5V
VCC = 2.0V, VBATT = 2.3V
VCC -V
CC -
0.0015 0.0006
VOUT Output Voltage V
VCC -V
CC -
0.35 0.15
VCC -V
CC -
0.035 0.015
VCC -V
CC -
0.3 0.15
VCC -V
CC -
0.03 0.015
40 50
V
1.1 5.5
1.0 5.5
Operating Voltage Range,
VCC, VBATT (Note 1)
µA
0.01 5
Battery Leakage Current
(Note 3)
0.01 0.5
µA
0.4 10
VBATT Supply Current, Any Mode
(excluding IOUT) (Note 2)
0.4 1
50 65
40 55
µA
50 70
ISUPPLY
VCC Supply Current
(excluding IOUT)
µA25 50
VCC Supply Current in Battery-
Backup Mode (excluding IOUT)
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX690_C/E, MAX704_C/E, MAX80_ _C/E,
IOUT = 5mA (Note 4)
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
MAX690_M, MAX704_M, MAX80_ _M
MAX690_M, MAX704_M, MAX80_ _M
–
M
—
R
– = VCC
(MAX704_/
MAX806_)
–
M
—
R
– = VCC
(MAX704_/
MAX806_)
CONDITIONS
MAX690_C, MAX704_C, MAX80_ _C
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
IOUT = 250µA, VCC > 2.5V (Note 4)
MAX690_M, MAX704_M, MAX80_ _M
IOUT = 50mA
MAX690_M, MAX704_M, MAX80_ _M
IOUT = 5mA (Note 4)
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
IOUT = 50mA
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E, VCC < 3.6V
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E, VCC < 5.5V
MAX690_M, MAX704_M,
MAX80_ _M, VCC < 3.6V
V
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA= TMIN to TMAX; unless otherwise noted. Typical values are at TA= +25˚C.)
µA
-10 +10
RESET Output Leakage Current
(Note 9)
-1 +1
0.17 0.3
VOL
–
P
—
F
—
O
–, –
R
—
E
—
S
—
E
—
T
–Output Voltage 0.13 0.3
V0.06 0.3VOL
–
P
—
F
—
O
–, –
R
—
E
—
S
—
E
—
T
–, RESET
Output Voltage
mV65 25
V
VBATT
- 0.14
VBATT VBATT
- 0.1 - 0.034
VOUT in Battery-Backup Mode
µV180 500IOS
–
P
—
F
—
O
–, –
R
—
E
—
S
—
E
—
T
–Output Short to
GND Current (Note 4)
V
VCC VCC
- 0.3 - 0.05
VOH
–
P
—
F
—
O
–, –
R
—
E
—
S
—
E
—
T
–Output Voltage
ms140 200 280tWP
Reset Timeout Period
3.00 3.085 3.14
V2.30 2.40 2.50VSW
Battery Switch Threshold,
VCC Falling
3.00 3.075 3.15
3.00 3.085 3.17
3.00 3.075 3.12
UNITSMIN TYP MAXSYMBOLPARAMETER
V
2.59 2.635 2.72
VRST
Reset Threshold (Note 8)
2.55 2.625 2.70
2.55 2.635 2.72
2.59 2.625 2.70
2.88 2.935 3.02
2.85 2.925 3.00
2.85 2.935 3.02
2.88 2.925 3.00
V
Battery Switch Threshold,
VCC Rising (Note 7)
VCC rising
VCC falling
VCC rising
VCC falling
VCC rising
VCC falling
VCC rising
VCC falling
VCC rising
VCC falling
VCC rising
VCC falling
VBATT = 0V, VCC = 1.2V, ISINK = 200µA,
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
ISINK = 1.2mA;
MAX690_/704_/802_/806_, VCC = VRST min;
MAX804_/805_, VCC = VRST max
VBATT - VCC,VSW > VCC > 1.75V (Note 5)
IOUT = 250µA, VBATT = 2.3V
VCC = 3.3V, VOH = 0V
ISOURCE = 50µA
VCC < 3.6V
VBATT > VCC (Note 6)
MAX690S/704S/805S
CONDITIONS
This value is identical to the reset threshold,
VCC rising
VBATT = 0V,
VCC = VRST min;
VRESET = 0V, VCC
VBATT = 0V, VCC = 1.0V, ISINK = 40µA,
MAX690_C, MAX704_C, MAX80_ _C
MAX802R/804R/806S
MAX690T/704T/805T
MAX802T/804T/806T
MAX690R/704R/805R
MAX802S/804S/806S
IOUT = 1mA, VBATT = 2.3V
MAX804_E/M,
MAX805_E/M
MAX804_C,
MAX805_C
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
4 _______________________________________________________________________________________
nA
-500 2 500
PFI Input Current -25 2 25
MIN TYP MAX
ns100 20tMR
–
M
—
R
–Pulse Width
V
0.3 x VCC
VIH
–
M
—
R
–Input Threshold 0.7 x VCC
ns60 500tMD
–
M
—
R
–to Reset Delay
µA20 60 350
–
M
—
R
–Pull-Up Current
V
0.7 x VCC
VIH
0.3 x VCC
VIL
WDI Input Threshold
1.12 1.60 2.24
ns100 20WDI Pulse Width
VIL
MAX690_M, MAX802_M,
MAX804_M, MAX805_M
-1 +0.01 +1
-10 +0.01 +10
µAWDI Input Current
MAX690/MAX802/MAX804/
MAX805 only stWD
Watchdog Timeout Period
Note 1: VCC supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), –
M
—
R
–functionality
(MAX704_/806_), PFI functionality, state of –
R
—
E
—
S
—
E
—
T
–(MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at
VBATT = 3.6V, and VCC = 5.5V. The state of –
R
—
E
—
S
—
E
—
T
–or RESET and –
P
—
F
—
O
–is tested at VCC = VCC min.
Note 2: Tested at VBATT = 3.6V, VCC = 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around
VCC = 1.9V.
Note 3: Leakage current into the battery is tested under the worst-case conditions at VCC = 5.5V, VBATT = 1.8V and at VCC = 1.5V,
VBATT= 1.0V.
Note 4: Guaranteed by design.
Note 5: When VSW > VCC > VBATT, VOUT remains connected to VCC until VCC drops below VBATT. The VCC-to-VBATT comparator
has a small 25mV typical hysteresis to prevent oscillation. For VCC < 1.75V (typ), VOUT switches to VBATT regardless of the
voltage on VBATT.
Note 6: When VBATT > VCC > VSW, VOUT remains connected to VCC until VCC drops below the battery switch threshold (VSW).
Note 7: VOUT switches from VBATT to VCC when VCC rises above the reset threshold, independent of VBATT. Switchover back to
VCC occurs at the exact voltage that causes –
R
—
E
—
S
—
E
—
T
–to go high (on the MAX804_/805_, RESET goes low); however
switchover occurs 200ms prior to reset.
Note 8: The reset threshold tolerance is wider for VCC rising than for VCC falling to accommodate the 10mV typical hysteresis, which
prevents internal oscillation.
Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance).
MAX690_/MAX704_/MAX805_
V
1.187 1.237 1.287
VPFT
PFI Input Threshold 1.212 1.237 1.262
SYMBOLPARAMETER UNITS
MAX704_/MAX806_ only
MAX704_/MAX806_ only
MAX704_/MAX806_ only, –
M
—
R
–= 0V, VCC = 3V
0V< VCC < 5.5V
MAX704_/MAX806_ only
MAX690_M, MAX704_M, MAX80_ _M
VCC < 3.6V
VPFI falling
CONDITIONS
MAX690_/MAX802_/MAX804_/MAX805_ only
VCC < 3.6V
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX802_C/E, MAX804_C/E,
MAX806_C/E
MAX690_C/E, MAX802_C/E,
MAX804_C/E, MAX805_C/E
MAX690_/MAX802_/MAX804_/MAX805_ only
MAX690_M, MAX704_M, MAX80_ _M
mV
10 25
nA
-500 2 500
PFI Input Current -25 2 25
VPFH
PFI Hysteresis, PFI Rising 10 20
MAX690_M, MAX704_M, MAX80_ _M
VCC < 3.6V
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA= TMIN to TMAX; unless otherwise noted. Typical values are at TA= +25˚C.)
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_______________________________________________________________________________________ 5
5
0
–60 –20 60 140
VCC-to-VOUT ON-RESISTANCE
vs. TEMPERATURE
1
4
MAX690-806 TOC01
TEMPERATURE (°C)
VCC-to-VOUT ON-RESISTANCE (Ω)
20 100–40 0 8040 120
3
2
VCC = 5V
VCC = 3.3V
VCC = 2.5V
VBATT = 3.0V
180
20
–60 –20 60 140
VBATT-to-VOUT ON-RESISTANCE
vs. TEMPERATURE
60
MAX690-806 TOC02
TEMPERATURE (°C)
VBATT-to-VOUT ON-RESISTANCE (Ω)
20 100–40 0 8040 120
140
100
VCC = 0V
VBATT = 3.3V
VBATT = 3V
VBATT = 2V
VBATT = 5V
50
25
–60 –20 60 140
SUPPLY CURRENT
vs. TEMPERATURE
30
45
MAX690-806 TOC03
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
20 100–40 0 8040 120
40
35
VCC = 5V
VCC = 3.3V
VCC = 2.5V
VBATT = 3V
PFI = GND
MR/WDI FLOATING
10,000
0.1
–60 –20 60 140
BATTERY SUPPLY CURRENT
vs. TEMPERATURE
1
1000
MAX690-806 TOC04
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT (nA)
20 100–40 0 8040 120
100
10 VBATT = 3V
VBATT = 5V
VBATT = 2V
VCC = 0V
PFI = GND
1.240
1.230
–60 –20 60 140
PFI THRESHOLD
vs. TEMPERATURE
1.232
1.238
MAX690-806 TOC07
TEMPERATURE (°C)
PFI THRESHOLD (V)
20 100–40 0 8040 120
1.236
1.234
VCC = 5V
VCC = 3.3V
VCC = 2.5V
VBATT = 3.0V
216
196
–60 –20 60 140
RESET TIMEOUT PERIOD
vs. TEMPERATURE
200
212
MAX690-806 TOC05
TEMPERATURE (°C)
RESET TIMEOUT PERIOD (ms)
20 100–40 0 8040 120
208
204
VCC = 5V
VCC = 3.3V
VBATT = 3.0V
30
10
–60 –20 60 140
RESET-COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE
14
26
MAX690-806 TOC06
TEMPERATURE (°C)
PROPAGATION DELAY (μs)
20 100–40 0 8040 120
22
18
VBATT = 3.0V
100mV OVERDRIVE
1.004
0.994
–60 –20 60 140
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
0.996
1.002
MAX690-806 TOC08
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD (V)
20 100–40 0 8040 120
1.000
0.998
VBATT = 3.0V
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
_______________Detailed Description
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset to
prevent code execution errors during power-up, power-
down, brownout conditions, or a watchdog timeout.
–
R
—
E
—
S
—
E
—
T
– is guaranteed to be a logic low for 0V < VCC <
VRST, provided that VBATT is greater than 1V. Without
a backup battery, –
R
—
E
—
S
—
E
—
T
– is guaranteed valid for VCC
> 1V. Once VCC exceeds the reset threshold, an
internal timer keeps –
R
—
E
—
S
—
E
—
T
– low for the reset timeout
period; after this interval, –
R
—
E
—
S
—
E
—
T
– goes high (Figure 2).
If a brownout condition occurs (VCC dips below the
reset threshold), –
R
—
E
—
S
—
E
—
T
– goes low. Each time –
R
—
E
—
S
—
E
—
T
–
is asserted, it stays low for the reset timeout period.
Any time VCC goes below the reset threshold, the
internal timer restarts.
The watchdog timer can also initiate a reset. See the
Watchdog Input section.
The MAX804_/MAX805_ active-high RESET output is
open drain, and the inverse of the MAX690_/MAX704_/
MAX802_/MAX806_ –
R
—
E
—
S
—
E
—
T
– output.
Reset Threshold
The MAX690T/MAX704T/MAX805T are intended for
3.3V systems with a ±5% power-supply tolerance and a
10% system tolerance. Except for watchdog faults,
reset will not assert as long as the power supply
remains above 3.15V (3.3V - 5%). Reset is guaranteed
to assert before the power supply falls below 3.0V.
The MAX690S/MAX704S/MAX805S are designed for
3.3V ±10% power supplies. Except for watchdog
faults, they are guaranteed not to assert reset as long
as the supply remains above 3.0V (3.3V - 10%). Reset
is guaranteed to assert before the power supply falls
below 2.85V (VCC - 14%).
The MAX690R/MAX704R/MAX805R are optimized for
monitoring 3.0V ±10% power supplies. Reset will not
occur until VCC falls below 2.7V (3.0V - 10%), but is
guaranteed to occur before the supply falls below
2.59V (3.0V - 14%).
The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T
are respectively similar to the MAX690R/S/T,
MAX805R/S/T, and MAX704R/S/T, but with tightened
reset and power-fail threshold tolerances.
3.0V/3.3V Microprocessor Supervisory Circuits
6 _______________________________________________________________________________________
______________________________________________________________Pin Description
1 VOUT
Supply Output for CMOS RAM. When VCC is above the reset threshold, VOUT is
connected to VCC through a p-channel MOSFET switch. When VCC falls below VSW and
VBATT, VBATT connects to VOUT. Connect to VCC if no battery is used.
2 VCC Main Supply Input
3GND Ground
4PFI Power-Fail Input. When PFI is less than VPFT or when VCC falls below VSW, –
P
—
F
—
O
–goes
low; otherwise, –
P
—
F
—
O
–remains high. Connect to ground if unused.
7–
R
—
E
—
S
—
E
—
T
–
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever
VCC is below the reset threshold or when –
M
—
R
–is a logic low. It remains low for 200ms after
either VCC rises above the reset threshold, the watchdog triggers a reset, or –
M
—
R
–goes
from low to high.
—–
M
—
R
–
Manual Reset Input. A logic low on –
M
—
R
–asserts reset. Reset remains asserted as long as
–
M
—
R
–is low and for 200ms after –
M
—
R
–returns high. This active-low input has an internal
70µA pullup current. It can be driven from a TTL or CMOS logic line, or shorted to ground
with a switch. Leave open if unused.
6WDI
Watchdog Input. If WDI remains high or low for 1.6s, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog function cannot be disabled.
5–
P
—
F
—
O
–Power-Fail Output. When PFI is less than VPFT, or VCC falls below VSW, –
P
—
F
—
O
–goes low;
otherwise, –
P
—
F
—
O
–remains high. Leave open if unused.
8 VBATT
Backup-Battery Input. When VCC falls below VSW and VBATT, VOUT switches from VCC to
VBATT. When VCC rises above the reset threshold, VOUT reconnects to VCC. VBATT may
exceed VCC. Connect to VCC if no battery is used.
—RESET Active-High, Open-Drain Reset Output is the inverse of –
R
—
E
—
S
—
E
—
T
–.
NAME FUNCTION
MAX690
MAX802
1
2
PIN
3
4
—
—
6
5
8
7
MAX804
MAX805
1
2
3
4
7
6
—
5
8
—
MAX704
MAX806
Watchdog Input
(MAX690_/802_/804_/805_)
The watchdog circuit monitors the µP’s activity. If the µP
does not toggle the watchdog input (WDI) within 1.6sec,
a reset pulse is triggered. The internal 1.6sec timer is
cleared by either a reset pulse or by a transition (low-to-
high or high-to-low) at WDI. If WDI is tied high or low, a
–
R
—
E
—
S
—
E
—
T
– pulse is triggered every 1.8sec (tWD plus tRS).
As long as reset is asserted, the timer remains cleared
and does not count. As soon as reset is deasserted,
the timer starts counting. Unlike the 5V MAX690 family,
the watchdog function cannot be disabled.
Power-Fail Comparator
The PFI input is compared to an internal reference. If
PFI is less than VPFT,–
P
—
F
—
O
– goes low. The power-fail
comparator is intended for use as an undervoltage
detector to signal a failing power supply. However, the
comparator does not need to be dedicated to this
function because it is completely separate from the rest
of the circuitry.
The power-fail comparator turns off and –
P
—
F
—
O
– goes low
when VCC falls below VSW on power-down. The power-
fail comparator turns on as VCC crosses VSW on
power-up. If the comparator is not used, connect PFI to
ground and leave –
P
—
F
—
O
– unconnected. –
P
—
F
—
O
–may be
connected to –
M
—
R
–on the MAX704_/MAX806_ so that a
low voltage on PFI will generate a reset (Figure 5b).
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_______________________________________________________________________________________ 7
VBATT
RESET
(RESET)
WDI
VCC
MR
BATTERY
SWITCHOVER
COMPARATOR
RESET
COMPARATOR
RESET
GENERATOR
WATCHDOG
TIMER
BATTERY
SWITCHOVER
CIRCUITRY
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
PFO
VOUT
PFI
VPFT
1.237V
1.237V
**
*
*
POWER-FAIL
COMPARATOR
* MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY
** MAX704T/S/R, MAX806T/S/R ONLY
( ) MAX804T/S/R, MAX805T/S/R ONLY
VBATT = 3.6V
3.0V OR 3.3V
VSW
tWP
RESET
PFO
VCC
( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO VCC
VOUT
VSW
(RESET)
3.0V OR 3.3V
3.0V OR 3.3V
0V
VRST
VBATT = PFI = 3.6V
IOUT = 0mA
Figure 1. Block Diagram Figure 2. Timing Diagram
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Backup-Battery Switchover
In the event of a brownout or power failure, it may be
necessary to preserve the contents of RAM. With a
backup battery installed at VBATT, the devices auto-
matically switch RAM to backup power when VCC
falls.
This family of µP supervisors (designed for 3.3V and 3V
systems) doesn’t always connect VBATT to VOUT when
VBATT is greater than VCC. VBATT connects to VOUT
(through a 140Ωswitch) when VCC is below VSW and
VBATT is greater than VCC, or when VCC falls below
1.75V (typ) regardless of the VBATT voltage. This is
done to allow the backup battery (e.g., a 3.6V lithium
cell) to have a higher voltage than VCC.
Switchover at VSW (2.40V) ensures that battery-backup
mode is entered before VOUT gets too close to the 2.0V
minimum required to reliably retain data in CMOS RAM.
Switchover at higher VCC voltages would decrease
backup-battery life. When VCC recovers, switchover is
deferred until VCC rises above the reset threshold
(VRST) to ensure a stable supply. VOUT is connected to
VCC through a 3ΩPMOS power switch.
Manual Reset
A logic low on –
M
—
R
–asserts reset. Reset remains asserted
while –
M
—
R
–is low, and for tWP (200ms) after –
M
—
R
–returns
high. This input has an internal 70µA pull-up current, so
it can be left open if it is not used. –
M
—
R
–can be driven with
TTL or CMOS logic levels, or with open-drain/collector
outputs. Connect a normally open momentary switch
from –
M
—
R
–to GND to create a manual-reset function;
external debounce circuitry is not required.
__________Applications Information
These µP supervisory circuits are not short-circuit
protected. Shorting VOUT to ground—excluding power-
up transients such as charging a decoupling
capacitor—destroys the device. Decouple both VCC
and VBATT pins to ground by placing 0.1µF capacitors
as close to the device as possible.
Using a SuperCap
as a Backup Power Source
SuperCaps™ are capacitors with extremely high
capacitance values (e.g., order of 0.47F) for their size.
Figure 3 shows two ways to use a SuperCap as a
backup power source. The SuperCap may be
connected through a diode to the 3V input (Figure 3a)
or, if a 5V supply is also available, the SuperCap may
be charged up to the 5V supply (Figure 3b) allowing a
longer backup period. Since VBATT can exceed VCC
while VCC is above the reset threshold, there are no
special precautions when using these µP supervisors
with a SuperCap.
Operation without a Backup
Power Source
These µP supervisors were designed for battery-
backed applications. If a backup battery is not used,
connect both VBATT and VOUT to VCC, or use a
different µP supervisor such as the MAX706T/S/R or
MAX708T/S/R.
Replacing the Backup Battery
The backup power source can be removed while VCC
remains valid, if VBATT is decoupled with a 0.1µF
capacitor to ground, without danger of triggering
RESET/–
R
—
E
—
S
—
E
—
T
–. As long as VCC stays above VSW,
battery-backup mode cannot be entered.
Adding Hysteresis
to the Power-Fail Comparator
The power-fail comparator has a typical input
hysteresis of 10mV. This is sufficient for most applica-
tions where a power-supply line is being monitored
through an external voltage divider (see the Monitoring
an Additional Power Supply section).
If additional noise margin is desired, connect a resistor
between –
P
—
F
—
O
– and PFI as shown in Figure 4a. Select
the ratio of R1 and R2 such that PFI sees 1.237V (VPFT)
when VIN falls to its trip point (VTRIP). R3 adds the
hysteresis and will typically be more than 10 times the
value of R1 or R2. The hysteresis window extends both
above (VH) and below (VL) the original trip point (VTRIP).
3.0V/3.3V Microprocessor Supervisory Circuits
8 _______________________________________________________________________________________
SuperCap is a trademark of Baknor Industries.
PIN NAME STATUS
VOUT Connected to VBATT through an internal
140Ωswitch
VCC Disconnected from VOUT
PFI The power-fail comparator is disabled when
VCC < VSW
–
P
—
F
—
O
–Logic low when VCC < VSW or PFI < VPFT
WDI The watchdog timer is disabled
–
M
—
R
–Disabled
–
R
—
E
—
S
—
E
—
T
–Low logic
RESET High impedance
VBATT Connected to VOUT
Table 1. Input and Output Status in
Battery-Backup Mode
Connecting an ordinary signal diode in series with R3,
as shown in Figure 4b, causes the lower trip point (VL)
to coincide with the trip point without hysteresis (VTRIP),
so the entire hysteresis window occurs above VTRIP.
This method provides additional noise margin without
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is useful for
accurately detecting when a voltage falls past a
threshold.
The current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
should be larger than 10kΩso it does not load down the
–
P
—
F
—
O
– pin. Capacitor C1 adds additional noise rejection.
Monitoring an Additional Power Supply
These µP supervisors can monitor either positive or
negative supplies using a resistor voltage divider to
PFI. –
P
—
F
—
O
– can be used to generate an interrupt to the
µP (Figure 5). Connecting –
P
—
F
—
O
– to –
M
—
R
–on the MAX704
and MAX806 causes reset to assert when the
monitored supply goes out of tolerance. Reset remains
asserted as long as –
P
—
F
—
O
– holds –
M
—
R
–low, and for 200ms
after –
P
—
F
—
O
– goes high.
Interfacing to µPs
with Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX690_/
MAX704_/MAX802_/MAX806_ –
R
—
E
—
S
—
E
—
T
– output. If, for
example, the –
R
—
E
—
S
—
E
—
T
– output is driven high and the µP
wants to pull it low, indeterminate logic levels may
result. To correct this, connect a 4.7kΩresistor
between the –
R
—
E
—
S
—
E
—
T
– output and the µP reset I/O, as in
Figure 6. Buffer the –
R
—
E
—
S
—
E
—
T
– output to other system
components.
Negative-Going VCC Transients
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going VCC
transients (glitches). It is usually undesirable to reset
the µP when VCC experiences only small glitches.
Figure 7 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
going VCC pulses, starting at 3.3V and ending below
the reset threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the maximum
pulse width a negative-going VCC transient may
typically have without causing a reset pulse to be
issued. As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically,
a VCC transient that goes 100mV below the reset
threshold and lasts for 40µs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the VCC
pin provides additional transient immunity.
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_______________________________________________________________________________________ 9
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
VOUT TO STATIC
RAM
VBATT
VCC
GND
1N4148
RESET
(RESET)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
TO μP
0.47F
3.0V OR 3.3V
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
VOUT TO STATIC
RAM
VBATT
VCC
GND
1N4148
RESET
(RESET)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
TO μP
0.47F
3.0V OR
3.3V
+5V
ba
Figure 3. Using a SuperCap as a Backup Power Source
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
10 ______________________________________________________________________________________
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
VCC
GND
PFI PFO
R1
R2
V-
0V V-
PFO
VTRIP
VL
VPFT = 1.237V
VPFH = 10mV
WHERE
3.0V OR 3.3V
VTRIP = R2 +
R1
1
)
(
R2
1–R1
VCC
(VPFT + VPFH)
VL = R2 +
R1
1
)
(
R2
1–R1
VCC
(VPFT)
NOTE: VTRIP IS NEGATIVE
VCC
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
VCC
GND
PFI PFO
R1
R2
PFO
VTRIP VH
* MAX704T/S/R,
MAX806T/S/R ONLY
3.0V OR 3.3V
VIN
VTRIP =
)
(
R2
R1 + R2
VPFT
VH = (VPFT + VPFH)
VCC
VIN
MR *
ba
)
(
R2
R1 + R2
Figure 4. a) Adding Additional Hysteresis to the Power-Fail Comparator b) Shifting the Additional Hysteresis above VPFT
Figure 5. Using the Power-Fail Comparator to Monitor an Additional Power Supply
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
______________________________________________________________________________________ 11
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX806T/S/R
VCC
GND
RESET
VCC
GND
4.7kΩ
RESET
μP
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
100
0
10 100 1000
20
DS690-806 fig7
RESET COMPARATOR OVERDRIVE (VRST - VCC) (mV)
MAXIMUM TRANSIENT DURATION (μs)
40
60
80
VCC = 3.3V
TA = +25°C
Figure 6. Interfacing to µPs with Bidirectional Reset I/O
Figure 7. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
MAX704T/S/R
MAX806T/S/R
VOUT
RESET
VBATT
VCC
GND
0.1µF
3.6V
PFI
MR
0.1µF 0.1µF
RAM
μP
3.0V OR 3.3V
_Typical Operating Circuits (cont.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_Ordering Information (continued) ___________________Chip Topography
PART** TEMP RANGE
MAX704_CPA 0°C to +70°C
MAX704_CSA 0°C to +70°C
MAX704_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
PIN-PACKAGE
MAX704_EPA -40°C to +85°C
MAX704_ESA -40°C to +85°C
MAX704_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
MAX802_CPA 0°C to +70°C
MAX802_CSA 0°C to +70°C
MAX802_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
MAX802_EPA -40°C to +85°C
MAX802_ESA -40°C to +85°C
MAX802_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
MAX804_CPA 0°C to +70°C
MAX804_CSA 0°C to +70°C
MAX804_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
MAX804_EPA -40°C to +85°C
MAX804_ESA -40°C to +85°C
MAX804_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
MAX805_CPA 0°C to +70°C
MAX805_CSA 0°C to +70°C
MAX805_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
MAX805_EPA -40°C to +85°C
MAX805_ESA -40°C to +85°C
MAX805_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
MAX806_CPA 0°C to +70°C
MAX806_CSA 0°C to +70°C
MAX806_C/D 0°C to +70°C Dice*
8 SO
8 Plastic DIP
MAX806_EPA -40°C to +85°C
MAX806_ESA -40°C to +85°C
MAX806_MJA -55°C to +125°C 8 CERDIP
8 SO
8 Plastic DIP
*Contact factory for dice specifications.
**These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
Devices in PDIP and SO packages are available in both leaded
and lead-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
WDI
[MR]
RESET
(RESET)
GND
VCC
VBATT
VOUT
PFI PFO
0.110"
(2.794mm)
0.080"
(2.032mm)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R.
[ ] ARE FOR MAX704T/S/R, MAX806T/S/R.
TRANSISTOR COUNT: 802;
SUBSTRATE IS CONNECTED TO THE HIGHER OF
VCC OR VBATT, AND MUST BE FLOATED IN ANY
HYBRID DESIGN.