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©2016 Semiconductor 1www.fairchildsemi.com
FNB34060T Rev. 1.0
Dec. 2016
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
FNB34060T
Motion SPM® 3 Series
Features
• 600 V - 40 A 3-Phase IGBT Inverter with Integral Gate
Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Very Low Thermal Resistance using Al2O3 DBC
Substrate
• Built-In Bootstrap Diodes and Dedicated Vs Pins
Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• LVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Isolation Rating: 2500 Vrms / 1 min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
•AN-9088 - Motion SPM® 3 V6 Series Users Guide
• AN-9086 - SPM 3 Package Mounting Guide
General Description
FNB34060T is an advanced Motion SPM® 3 module
providing a fully-featured, high-performance inverter
output stage for AC Induction, BLDC, and PMSM
motors. These modules integrate optimized gate drive of
the built-in IGBTs to minimize EMI and losses, while also
providing multiple on-module protection features includ-
ing under-voltage lockouts, over-current shutdown,
thermal monitoring of drive IC, and fault reporting. The
built-in, high-speed HVIC requires only a single supply
voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal IGBTs.
Separate negative IGBT terminals are availabl e for each
phase to support the widest variety of control algorithms.
Package Mark ing and Ordering Information
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Device Device Marking Package Packing Type Quantity
FNB34060T FNB34060T SPM27-RA Rail 10
©2016 Semiconductor 2www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Integrated Power Functions
• 600 V - 40 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 5 and 15.
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
Figure 2. Top View
©2016 Semiconductor 3www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Pin Descriptions
Pin Number Pin Name Pin Description
1V
DD(L) Low-Side Common Bias Voltage for IC and IGBTs Driving
2 COM Common Supply Ground
3IN
(UL) Signal Inpu t for Low-Side U-Phase
4IN
(VL) Signal Input for Low-Side V-Phase
5IN
(WL) Signal Input for Low-Side W-Phase
6V
FO Fault Output
7V
TS Output for LVIC Temperature Sensing Voltage Output
8C
SC Shut Down Input for Short-Circuit Current Detection Input
9IN
(UH) Signal Input for High-Side U-Phase
10 VDD(H) High-Side Common Bias Voltage for IC and IGBTs Driving
11 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving
12 VS(U) High-Side Bias Voltage Ground for U-Phase IGBT Driving
13 IN(VH) Signal Input for High-Side V-Phase
14 VDD(H) High-Side Common Bias Voltage for IC and IGBTs Driving
15 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving
16 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving
17 IN(WH) Signal Input for High-Side W-Phase
18 VDD(H) High-Side Common Bias Voltage for IC and IGBTs Driving
19 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving
20 VS(W) High-Side Bias Voltage Ground for W-Phase IGBT Driving
21 NUNegative DC-Link Input for U-Phase
22 NVNegative DC-Link Input for V-Phase
23 NWNegative DC-Link Input for W-Phase
24 U Output for U-Phase
25 V Output for V-Phase
26 W Output for W-Phase
27 P Positive DC-Link Input
©2016 Semiconductor 4www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
COM
VDD
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V (25)
W (26)
P (27)
(20) VS(W)
(19) VB(W)
(16) VS(V)
(15) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(WL)
(4) I N (VL)
(3) IN(UL)
(2) COM
(1) VDD(L)
VDD
VB
OUT
COM VS
IN
VB
VS
OUT
IN
COM
VDD
VDD
VB
OUT
COM VS
IN
(18) VDD(H)
(17) IN(WH)
(14) VDD(H)
(13) IN(VH)
(12) VS(U)
(11) VB(U)
(10) VDD(H)
(9) IN(UH)
©2016 Semiconductor 5www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Control Part
Bootstrap Diode Part
Total System
Thermal Resistance
Note:
4. These values had been made an acquisition by the c alculation considered to design f actor.
5. For the measurement point of case temperature (TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
VPN Supply Voltage Applied between P - NU, NV, NW450 V
VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW500 V
VCES Collector - Emitter Voltage 600 V
± ICEach IGBT Collector Current TC = 25°C, TJ 150°C (Note 4) 40 A
± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse
Width (Note 4) 80 A
PCCollector Dissipation TC = 25°C per One Chip (Note 4) 105 W
TJOperating Junction Temperature -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VDD Control Supply Voltage Applied between VDD(H), VDD(L) - COM 20 V
VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
20 V
VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH),
IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VDD+0.3 V
VFO Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VDD+0.3 V
IFO Fault Output Current Sink Current at VFO pin 2 mA
VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VDD+0.3 V
Symbol Parameter Conditions Rating Unit
VRRM Maximum Repetitive Reverse Voltage 600 V
IFForward Current TC = 25°C, TJ 150°C (Note 4) 0.5 A
IFP Forward Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse
Width (Note 4) 2.0 A
TJOperating Junction Temperature -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability) VDD = VBS = 13.5 ~ 16.5 V, TJ = 150°C,
Non-repetitive, < 2 s400 V
TCModule Case Operation Temperature See Figure 2 -40 ~ 125 °C
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage 60 Hz, Sinusoidal, AC 1 minute, Connection
Pins to Heat Sink Plate 2500 Vrms
Symbol Parameter Conditions Min. Typ. Max. Unit
Rth(j-c)Q Junction to Case Thermal Resistance
(Note 5) Inverter IGBT part (per 1 / 6 module) - - 1.19 °C / W
Rth(j-c)F Inverter FWD part (per 1 / 6 module) - - 1.96 °C / W
©2016 Semiconductor 6www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Note:
6. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally.
For the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
VCE(SAT) Collector - Emitter Saturation
Voltage VDD = VBS = 15 V
VIN = 5 V IC = 40 A, TJ = 25°C - 1.50 2.05 V
VFFWDi Forward Voltage VIN = 0 V IF = 40 A, TJ = 25°C - 1.75 2.35 V
HS tON Switching Times VPN = 300 V, VDD = 15 V, IC = 40 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
0.75 1.15 1.75 s
tC(ON) -0.250.75s
tOFF -1.201.70s
tC(OFF) -0.150.50s
trr -0.14- s
LS tON VPN = 300 V, VDD = 15 V, IC = 40 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
0.60 1.09 1.60 s
tC(ON) -0.250.70s
tOFF -1.251.75s
tC(OFF) -0.200.55s
trr -0.14- s
ICES Collector - Emitter Leakage
Current VCE = VCES --5mA
VCE IC
VIN
tON tC(ON)
VIN(ON)
10% IC
10% VCE
90% IC
100% IC
trr
100% IC
VCE
IC
VIN
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
(a ) tu rn -o n (b ) turn -o ff
©2016 Semiconductor 7www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Figure 5. Example Circuit for Switchin g Test
Figure 6. Switching Loss Charac teristics
Figure 7. Temperature Profile of VTS (Typical)
One-Leg Diagram of SPM 3
P
NU,V,W
VDD(H)
IN(H)
COM(H)
VB
OUT(H)
VS
VDD(L)
IN(L)
COM(L)
OUT(L)
CSC
VTS
VFO
IC
VPN
U,V,W
Inductor
HS Switching
LS Swit c hing
V300V
V
V
+15V
+5V
4.7kΩ
CBS
HS Switch ing
LS S w it c hin g
VIN
0V
5V VDD
0 10203040
0
500
1000
1500
2000
2500
3000
3500
4000
SWITCHING LOSS ESW [uJ]
COLLECTOR CURRENT, IC [AMPERES]
IGBT Turn-on, Eon
IGBT Tu rn- off, Eo ff
FRD Turn-off, Erec
Inductive Load, V PN = 300V, VDD=15V, TJ=25℃
0 10203040
0
500
1000
1500
2000
2500
3000
3500
4000 Inductive Load, VPN = 300V, V DD=15V, TJ=150℃
SWITCHING LOSS ESW [uJ]
COLLECTOR CURRENT, IC [AMPERES]
IGBT Turn-on, Eon
IGBT Tu r n-off, Eoff
FRD Turn-off, Erec
©2016 Semiconductor 8www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Bootstrap Diode Part
Control Part
Note:
7. Short-circuit current protection is functioning only at the low-sides.
8. TLVIC is the temperature of LVIC itself. VTS is only fo r sensing temperature of LVIC and can not shutdown IGBTs automatically.
Symbol Parameter Conditions Min. Typ. Max. Unit
VFForward Voltage IF = 0.1 A, TJ = 25°C - 2.5 - V
trr Reverse Recovery Time IF = 0.1 A, dIF / dt = 50 A / s, TJ = 25°C - 80 - ns
Symbol Parameter Conditions Min. Typ. Max. Unit
IQDDH Quiescent VDD Supply
Current VDD(H) = 15 V,
IN(UH,VH,WH) = 0 VVDD(H) - COM - - 0.50 mA
IQDDL VDD(L) = 15 V,
IN(UL,VL, WL) = 0 VVDD(L) - COM - - 6.00 mA
IPDDH
Operating VDD Supply
Current
VDD(H) = 15 V, fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for High-
Side
VDD(H) - COM - - 0.60 mA
IPDDL VDD(L) = 15 V, fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for Low-
Side
VDD(L) - COM - - 11.0 mA
IQBS Quiescent VBS Supply
Current VBS = 15 V,
IN(UH, VH, WH) = 0 V VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
--0.30mA
IPBS Operating VBS Supply
Current VDD = VBS = 15 V,
fPWM = 20 kHz, duty = 50%,
applied to one PWM signal
input for High-Side
VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
--5.50mA
VFOH Fault Output Voltage VDD = 15 V, VSC = 0 V, VFO Circuit: 4.7 k to 5 V
Pull-up 4.5 - - V
VFOL VDD = 15 V, VSC = 1 V, V FO Circuit: 4.7 k to 5 V
Pull-up --0.5V
VSC(ref) Short Circuit Trip Level VDD = 15 V (Note 7) CSC - COM(L) 0.45 0.50 0.55 V
UVDDD Supply Circuit Under-
Voltage Protection Detection Level 9.8 - 13.3 V
UVDDR Reset Level 10.3 - 13.8 V
UVBSD Detection Level 9.0 - 12.5 V
UVBSR Reset Level 9.5 - 13 .0 V
tFOD Fault-Out Pulse Width 50 - - s
VTS LVIC Temperature
Sensing Voltage Output VDD(L) = 15 V, TLVIC = 25°C (Note 8)
See Figure 7 540 640 740 mV
VIN(ON) ON Threshold Voltage Applied between IN(UH, VH, WH) - COM,
IN(UL, VL, WL) - COM --2.6V
VIN(OFF) OFF Threshold Voltage 0.8 - - V
©2016 Semiconductor 9www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Recommended Operating Conditions
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Figure 8. Allowable Maximum Output Current
Note:
10. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition.
Symbol Parameter Conditions Value Unit
Min. Typ. Max.
VPN Supply Voltage Applied between P - NU, NV, NW- 300 400 V
VDD Control Supply Voltage Applied between VDD(H) - COM, VDD(L) - COM 14.0 15 16.5 V
VBS High-Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
13.0 15 18.5 V
dVDD / d t,
dVBS / dt Control Supply
Variation - 1 - 1 V / s
tdead Blanking Time for
Preventing Arm - Short For Each Input Signal 2.0 - - s
fPWM PWM Input Signal -40C TC 125°C, -40C TJ 150°C - - 20 kHz
VSEN Voltage for Current
Sensing Applied between NU, NV, NW - COM
(Including Surge Voltage) - 5 5 V
PWIN(ON) Minimum Input Pulse
Width VDD = VBS = 15 V, IC 100 A, Wiring Inductance
between NU, V, W and DC Link N < 10nH (Note 9) 2.5 - - s
PWIN(OFF) 2.5 - -
TJJunction Temperature - 40 - 150 C
0 20406080100120140
0
10
20
30
40
50
VDC = 300 V , VDD = VBS = 15 V
Tj = 150℃ , TC = 125℃
M.I. = 0 .9 , P . F . = 0.8
Sinuso idal P W M
fSW = 15 kH z
fSW = 5 kH z
Allowable Output Current, IOrms [Arms]
Case Temperature, T C [℃]
©2016 Semiconductor 10 www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
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Mechanical Characteristics and Ratings
Figure 9. Flatness Measurement Position
Figure 10. Mounting Screws Tor que Order
Note:
11. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat-sink destruction.
12. Avoid one-sided tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the DBC su bstrate of package t o be
damaged. The pre-screwing torq ue is set to 20 ~ 30% of maximum torque rating.
Parameter Conditions Limits Unit
Min. Typ. Max.
Device Flatness See Figure 9 0 - +150 m
Mounting Torque Mounting Screw: M3
See Figure 10
Recommended 0.7 N • m 0.6 0.7 0.8 N • m
Recommended 7.1 kg • cm 6.2 7.1 8.1 kg • cm
Terminal Pulling Strength Load 19.6 N 10 - - s
Terminal Bend ing Strength Load 9.8 N, 90 deg. bend 2 - - times
Weight -15-g
( + )
( + )
( + )
( + )
1
2Pre - Scr ewing : 1 2
Final Screwing : 2 1
©2016 Semiconductor 11 www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
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Time Charts of SPMs Protective Function
Figure 11. Under-Voltage Protection (Low-Side)
a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVDDD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts with a fixed pulse width.
a6 : Under voltage reset (UVDDR).
a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 12. Under-Voltage Protection (High-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR).
b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Input Signal
Outpu t Current
Fault Output Signal
Control
Supply Voltage
RESET
UVDDR
Protection
Circuit State SET RESET
UVDDD
a1 a3
a2 a4
a6
a5
a7
Input Signal
Out p ut Current
Fault Outpu t Signal
Control
Supply Voltage
RESET
UVBSR
Protection
Circuit State SET RESET
UVBSD
b1 b3
b2 b4 b6
b5
High -level (no fault output)
©2016 Semiconductor 12 www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
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Figure 13. Short-Circuit Current Protection (Low-Side Operation only)
(with the external sense resistance and RC filter connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : All low-side IGBT’s gate are hard interrupted.
c4 : All low-side IGBTs turn OFF.
c5 : Fault output operation starts with a fixed pulse width.
c6 : Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH.
c8 : Normal operation: IGBT ON and carrying current.
Input/Output Interface Circuit
Figure 14. Recommended CPU I/O Interface Circuit
Note:
13. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s print ed circuit board.
The input signal section of the Motion SPM 3 product integrates 5 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the sig-
nal voltage drop at input terminal.
Lower arms
control input
Output Current
Sensing Voltage
of sense resistor
Fault Output Signal
S C Reference Volt age
RC Filter circuit
t ime c onstant
delay
S C current t ri p level
Protection
Cir cuit state SET RESET
c6 c7
c3
c2
c1 c8
c4
c5
Internal IGBT
G ate-Emi tter Voltage I nternal del ay
at protect ion circui t
MCU
COM
+ 5V (M CU or Control power)
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VFO
4. 7 kΩSPM
©2016 Semiconductor 13 www.fairchildsemi.com
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FNB34060T Motion SPM 3 ® Series
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Figure 15. Typical Application Circuit
Note:
14. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm)
15. VFO output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please
refer to Figure 14.
16. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention
of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns. (Recommended R1 = 100 Ω, C1 = 1 nF)
17. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Use the shunt resistor R4 of surface moun ted (SMD) type to reduce wiring
inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible.
18. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible.
19. In the short-circuit protection circuit, please select the R6C6 time c onstant in the ra nge 1. 5 ~ 2 s. Do enough evaluaiton on the real system because short-circuit protection
time may vary wiring pattern layout and value of the R6C6 time constant.
20. Each capacitor should be mounted as close to the pins of the Motion SPM® 3 product as possible.
21. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive
capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended.
22. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance between the CPU and the
relays.
23. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15Ω).
24. C2 of around 7 times larger than bootstrap capacitor C3 is recommended.
25. Please choose the electrolytic capacitor with good temperature char acteristic in C3. Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good t emperature and
frequency characteristics in C4.
Fault
C3C4
C2C4
5V line
R3
C1
R1
M
VDC
C7
Gating UH
Gating VH
Gating WH
Gating WL
Gating VL
Gating UL
C1
M
C
U
R5
R5
R5
R4
R4
R4
C5
C5
C5
W-Phase Current
V-Phase Current
U-Phase Current
R6
COM
VDD
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V (25)
W (26)
P (27)
(20) VS(W)
(19) VB(W)
(16) VS(V)
(15) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(WL)
(4) IN(VL)
(3) IN(UL)
(2) COM
(1) VDD(L)
VDD
VB
OUT
COM
VS
IN
(18) VDD(H)
(17) IN(WH)
(14) VDD(H)
(13) IN(VH)
(12) VS(U)
(11) VB(U)
(10) VDD(H)
(9) IN(UH)
Input Signal for
Short-Circuit Protection
C6
R1
R1
R1
R1
R1
R1
C1C1C1
A
BD
C
E
VDD
VB
OUT
COM
VS
IN
VDD
VB
OUT
COM
VS
IN
C3C4
C3C4
15V line
C4
C4
C4
C1C1
C1
D2
D2
D2
Power
GND Line
Control
GND Line
D2
VTS
C5
©2016 Semiconductor 14 www.fairchildsemi.com
FNB34060T Rev. 1.0
FNB34060T Motion SPM 3 ® Series
www.onsemi.com
Detailed Package Outline Drawings (FNB34060T)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf
©2016 Semiconductor 15 www.fairchildsemi.com
FNB34060T Rev. 1.0 www.onsemi.com
www.onsemi.com
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