CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 D D D D D D D D 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC O7 D7 D6 O6 O5 D5 D4 O4 CP CY54FCT374T . . . L PACKAGE (TOP VIEW) D1 O1 O2 D2 D3 O7 D OE O0 D0 D1 O1 O2 D2 D3 O3 GND OE VCC D D0 O0 D CY54FCT374T . . . D PACKAGE CY74FCT374T . . . P, Q, OR SO PACKAGE (TOP VIEW) Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times Fully Compatible With TTL Input and Output Logic Levels ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) Edge-Triggered D-Type Inputs 250-MHz Typical Switching Rate CY54FCT374T - 32-mA Output Sink Current - 12-mA Output Source Current CY74FCT374T - 64-mA Output Sink Current - 32-mA Output Source Current 3-State Outputs 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 D7 D6 O6 O5 D5 O3 GND CP O4 D4 D description The 'FCT374T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The eight flip-flops in the 'FCT374T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the eight flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state of OE does not affect the state of the flip-flops. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 ORDERING INFORMATION QSOP - Q ORDERABLE PART NUMBER TOP-SIDE MARKING Tape and reel 5.2 CY74FCT374CTQCT Tube 5.2 CY74FCT374CTSOC Tape and reel 5.2 CY74FCT374CTSOCT DIP - P Tube 6.5 CY74FCT374ATPC CY74FCT374ATPC QSOP - Q Tape and reel 6.5 CY74FCT374ATQCT FCT374A Tube 6.5 CY74FCT374ATSOC Tape and reel 6.5 CY74FCT374ATSOCT Tape and reel 10 CY74FCT374TQCT Tube 10 CY74FCT374TSOC Tape and reel 10 CY74FCT374TSOCT CDIP - D Tube 6.2 CY54FCT374CTDMB LCC - L Tube 6.2 CY54FCT374CTLMB CDIP - D Tube 7.2 CY54FCT374ATDMB LCC - L Tube 7.2 CY54FCT374ATLMB CDIP - D Tube 11 CY54FCT374TDMB LCC - L Tube 11 SOIC - SO -40C 40C to 85C SOIC - SO QSOP - Q SOIC - SO 55C to 125C -55C SPEED (ns) PACKAGE TA FCT374C FCT374C FCT374A FCT374 FCT374 CY54FCT374TLMB Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS OE OUTPUT O L H L L X H Z D CP H L X H = High logic level, L = Low logic level, X = Don't care, Z = High-impedance state, = Low-to-high clock transition logic diagram (positive logic) OE CP 1 11 C1 D0 3 1D Q To Seven Other Channels 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2 O0 CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, JA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68C/W SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 135C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) CY54FCT374T CY74FCT374T MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current -12 -32 mA IOL TA Low-level output current 32 64 mA 85 C High-level input voltage 2 Operating free-air temperature -55 2 125 -40 V V NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH CY54FCT374T TYP MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.75 V, IIN = -18 mA IIN = -18 mA VCC = 4.5 V, IOH = -12 mA IOH = -32 mA VCC = 4 4.75 75 V MIN -0.7 -1.2 -0.7 2.4 2.4 Vhys All inputs II VCC = 5.5 V, VCC = 5.25 V, VIN = VCC VIN = VCC 5 IIH VCC = 5.5 V, VCC = 5.25 V, VIN = 2.7 V VIN = 2.7 V 1 IIL VCC = 5.5 V, VCC = 5.25 V, VIN = 0.5 V VIN = 0.5 V 1 VCC = 0 V, VCC = 5.5 V, VOUT = 4.5 V VOUT = 0 V VCC = 5.25 V, VCC = 5.5 V, VOUT = 0 V VIN = 2.7 V VCC = 5.25 V, VCC = 5.5 V, VIN = 2.7 V VIN = 0.5 V VCC = 5.25 V, VCC = 5.5 V, VIN = 0.5 V VIN 0.2 V, IOZH IOZL ICC ICC 0.3 3.3 0.55 IOL = 64 mA 0.3 0.2 0.55 0.2 1 1 1 -120 1 -225 -60 -120 -225 10 10 -10 -10 VIN VCC - 0.2 V VCC = 5.25 V, VIN 0.2 V, VIN VCC - 0.2 V VCC = 5.5 V, VIN = 3.4 V, f1 = 0, Outputs open VCC = 5.25 V, VIN = 3.4 V, f1 = 0, Outputs open 0.1 0.5 V V 5 -60 V V 2 IOH = -15 mA IOL = 32 mA VCC = 4.5 V, VCC = 4.75 V, IOS -1.2 UNIT 3.3 VOL Ioff CY74FCT374T TYP MAX MIN A A A A mA A A 0.2 0.1 0.2 0.5 2 2 mA mA Typical values are at VCC = 5 V, TA = 25C. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER ICCD CY54FCT374T TYP MAX TEST CONDITIONS MIN VCC = 5.5 V, Outputs open, One bit switching at 50% duty cycle, OE = GND, VIN 0.2 V or VIN VCC - 0.2 V VCC = 5.25 V, Outputs open, One bit switching at 50% duty cycle, OE = GND, VIN 0.2 V or VIN VCC - 0.2 V VCC = 5.5 V, f0 = 10 MHz,, Outputs open, OE = GND IC VCC = 5.25 V, f0 = 10 MHz,, Outputs open, OE = GND 0.06 CY74FCT374T TYP MAX MIN UNIT 0.12 mA/ MHz 0.06 0.12 One bit switching at f1 = 5 MHz at 50% duty cycle VIN 0.2 V or VIN VCC - 0.2 V 0.7 1.4 VIN = 3.4 V or GND 1.2 3.4 Eight bits switching at f1 = 2.5 MHz at 50% duty cycle VIN 0.2 V or VIN VCC - 0.2 V 1.6 3.2|| VIN = 3.4 V or GND 3.9 12.2|| One bit switching at f1 = 5 MHz at 50% duty cycle VIN 0.2 V or VIN VCC - 0.2 V 0.7 1.4 VIN = 3.4 V or GND 1.2 3.4 Eight bits switching at f1 = 2.5 MHz at 50% duty cycle VIN 0.2 V or VIN VCC - 0.2 V 1.6 3.2|| VIN = 3.4 V or GND 3.9 12.2|| mA Ci 5 10 5 10 pF Co 9 12 9 12 pF Typical values are at VCC = 5 V, TA = 25C. This parameter is derived for use in total power-supply calculations. # IC = ICC + ICC x DH x NT + ICCD (f0/2 + f1 x N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. || Values for these conditions are examples of the ICC formula. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY54FCT374T MIN MAX CY54FCT374AT MIN MAX CY54FCT374CT MIN MAX UNIT tw tsu Pulse duration, CP high or low 7 6 6 ns Setup time, data before CP 2 2 2 ns th Hold time, data after CP 1.5 1.5 1.5 ns timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY74FCT374T MIN MAX CY74FCT374AT MIN MAX CY74FCT374CT MIN MAX UNIT tw tsu Pulse duration, CP high or low 7 5 5 ns Setup time, data before CP 2 2 2 ns th Hold time, data after CP 1.5 1.5 1.5 ns switching characteristics over operating free-air temperature range (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL CP O tPZH tPZL OE O tPHZ tPLZ OE O CY54FCT374T CY54FCT374AT CY54FCT374CT MIN MAX MIN MAX MIN MAX 2 11 2 7.2 2 6.2 2 11 2 7.2 2 6.2 1.5 14 1.5 7.5 1.5 6.2 1.5 14 1.5 7.5 1.5 6.2 1.5 8 1.5 6.5 1.5 5.7 1.5 8 1.5 6.5 1.5 5.7 UNIT ns ns ns switching characteristics over operating free-air temperature range (see Figure 1) 6 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL CP O tPZH tPZL OE O tPHZ tPLZ OE O POST OFFICE BOX 655303 CY74FCT374T CY74FCT374AT CY74FCT374CT MIN MAX MIN MAX MIN MAX 2 10 2 6.5 2 5.2 2 10 2 6.5 2 5.2 1.5 12.5 1.5 6.5 1.5 5.5 1.5 12.5 1.5 6.5 1.5 5.5 1.5 8 1.5 5.5 1.5 5 1.5 8 1.5 5.5 1.5 5 * DALLAS, TEXAS 75265 UNIT ns ns ns CY54FCT374T, CY74FCT374T 8-BIT REGISTERS WITH 3-STATE OUTPUTS SCCS022A - MAY 1994 - REVISED OCTOBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 S1 500 S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output tPLZ 3.5 V 1.5 V tPZH VOH 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V Output Waveform 1 (see Note B) tPLH 1.5 V 1.5 V tPZL VOH In-Phase Output 3V Output Control Output Waveform 2 (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) (3) Device Marking (4/5) 5962-9221802M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629221802M2A CY54FCT 374TLMB 5962-9221802MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221802MR A CY54FCT374TDMB 5962-9221804M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629221804M2A CY54FCT 374ATLMB 5962-9221804MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221804MR A CY54FCT374ATDM B 5962-9221806M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629221806M2A CY54FCT 374CTLMB 5962-9221806MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221806MR A 5962-9222203M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629222203M2A CY54FCT 574ATLMB 5962-9222203MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9222203MR A 5962-9222205MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9222205MR A CY54FCT374ATDMB ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221804MR A CY54FCT374ATDM B CY54FCT374ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type Addendum-Page 1 59629221804M2A CY54FCT 374ATLMB Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) CY54FCT374CTLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629221806M2A CY54FCT 374CTLMB CY54FCT374TDMB ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221802MR A CY54FCT374TDMB CY54FCT374TLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629221802M2A CY54FCT 374TLMB CY54FCT574ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629222203M2A CY54FCT 574ATLMB CY74FCT374ATPC ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT374ATPC CY74FCT374ATPCE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT374ATPC CY74FCT374ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A CY74FCT374ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A CY74FCT374ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A CY74FCT374ATSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A CY74FCT374ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A CY74FCT374ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A CY74FCT374ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A CY74FCT374ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A CY74FCT374ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) CY74FCT374CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C CY74FCT374CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C CY74FCT374CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C CY74FCT374CTSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C CY74FCT374CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C CY74FCT374CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C CY74FCT374TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374 CY74FCT374TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374 CY74FCT374TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374 CY74FCT374TSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT374TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT374TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT374TSOCT ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT374TSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT374TSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374 CY74FCT574ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A CY74FCT574ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A CY74FCT574ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) CY74FCT574ATSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A CY74FCT574CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C CY74FCT574CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C CY74FCT574CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C CY74FCT574CTSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574CTSOCT ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574CTSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574CTSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C CY74FCT574TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574 CY74FCT574TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574 CY74FCT574TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574 Addendum-Page 4 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) CY74FCT574TSOC ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574 CY74FCT574TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574 CY74FCT574TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 Samples PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device CY74FCT374ATQCT Package Package Pins Type Drawing SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT374ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 CY74FCT374CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT374TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT374TSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 CY74FCT574ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT574ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 CY74FCT574CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT574CTSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 CY74FCT574TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CY74FCT374ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT374ATSOCT SOIC DW 20 2000 367.0 367.0 45.0 CY74FCT374CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT374TQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT374TSOCT SOIC DW 20 2000 367.0 367.0 45.0 CY74FCT574ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT574ATSOCT SOIC DW 20 2000 367.0 367.0 45.0 CY74FCT574CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT574CTSOCT SOIC DW 20 2000 367.0 367.0 45.0 CY74FCT574TQCT SSOP DBQ 20 2500 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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