Product Specification PE4251 SPDT UltraCMOSTM RF Switch 10 - 3000 MHz, Absorptive Product Description The PE4251 is a HaRPTM-enhanced Absorptive SPDT (single pole double throw) RF Switch for use in general switching applications and mobile infrastructure. This device offers a flexible supply voltage of 3.3/5V, single-pin or complementary pin control inputs, and 4kV ESD tolerance. It presents a simple alternative solution to pin diode and mechanical relay switches. Peregrine's HaRPTM technology enhancements deliver high linearity and exceptional performance. It is an innovative feature of the UltraCMOSTM process, providing performance superior to GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram Features * HaRP-Technology Enhanced * * * * * * Low Insertion Loss: 0.60 dB @ 1000 MHz * Excellent ESD protection: 4000 V HBM * * No blocking capacitors required High Isolation: 62 dB @ 1000 MHz P1dB typical: +30.5 dBm IIP3 typical: +59 dBm Fast switching time: 150 ns Flexible supply voltage: 3.3 V 10% or 5.0 V 10% supply (see table 3) Single pin or complementary control inputs ESD RFC RF1 Figure 2. Package Type RF2 8-lead MSOP with exposed paddle ESD ESD 50 CMOS Control Driver V1 50 V2 Table 1. Target Electrical Specifications Temp = 25C, VDD = 3.3 or 5.0 V Parameter Conditions Min Operation Frequency1 Insertion Loss (RF1/RF2) Isolation (RFC to RF1/RF2) Return Loss Typical 10 Max Units 3000 MHz 10 MHz 0.55 0.60 dB 1000 MHz 0.60 0.70 dB 2000 MHz 3000 MHz 0.75 0.75 0.85 0.90 dB dB 1000 MHz 61 62 dB 2000 MHz 3000 MHz 51 42 53 43 dB dB 1000 MHz 26 dB 2000 MHz 3000 MHz 23 22 dB dB Input 1 dB Compression2 50 - 3000 MHz 30.5 dBm Input IP3 50 - 3000 MHz, +18 dBm per tone, 5 MHz spacing 59 dBm Switching Time 50% CTRL to 10/90% RF 150 Notes: 300 ns 1. Device linearity will begin to degrade below 10 MHz. 2. Note Absolute Maximum rating of PIN = 27 dBm. Document No. 70-0255-02 www.psemi.com (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 PE4251 Product Specification Figure 3. Pin Configuration (Top View) Table 4. Absolute Maximum Ratings Symbol 1 V1 2 8 RFC 3 N/C or GND 7 4251 V2 4 RF2 VDD GND Parameter/Conditions Power supply voltage Min Max Units 3 5.5 V VI Voltage on any control input -0.3 5.5 V TST Storage temperature range -65 150 C RF Input power (50) 27 dBm 4000 250 V 6 GND PIN 5 RF1 VESD ESD voltage (HBM)5 ESD voltage (Machine Model) Note: 5. Human Body Model (HBM, MIL_STD 883 Method 3015.7) Exposed ground paddle Table 2. Pin Descriptions Pin No. Pin Name Description V2 This pin supports two interface options: Single-pin control mode. A nominal 3volt supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to V1 is supplied to this pin. 2 V1 Switch control input, CMOS logic level. 3 RFC 4 N/C or GND 1 RF Common port.3 3 5 RF1 RF1 port. 6 GND Ground Connection. Traces should be physically short and connected to ground plane for best performance. 7 GND Ground Connection. Traces should be physically short and connected to ground plane for best performance. 8 RF2 RF2 port.3 Paddle GND Exposed ground paddle. Ground for proper device operation Note 3. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Control Voltage High When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. The PE4251 has a maximum 25 kHz switching rate. Min Typ Max Units 3.0 4.5 3.3 5.0 3.6 5.5 V V 55 75 60 80 A A IDD Power Supply Current VDD = VCNTL= 3.3V VDD = VCNTL= 5.0V Electrostatic Discharge (ESD) Precautions Switching Frequency Table 3. Operating Ranges VDD Power Supply Voltage4 Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. No Connect or Ground Parameter Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Moisture Sensitivity Level The Moisture Sensitivity Level rating for the PE4251 in the 8-lead MSOP package is MSL1. V 0.8 x VDD Control Voltage Low PIN RF Input Power (50) 0.2 x VDD V 27 dBm TOP Operating temperature range -40 25 85 C TST Storage temperature range -65 25 150 C Note 4. Customer must choose either 3.3 V or 5.0 V power supply range (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 9 Document No. 70-0255-02 UltraCMOSTM RFIC Solutions PE4251 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Signal Path Pin 1 (V2) = VDD Pin 2 (V1) = High RFC to RF1 Pin 1 (V2) = VDD Pin 2 (V1) = Low RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Signal Path Pin 1 (V2 ) = Low Pin 2 (V1) = High RFC to RF1 Pin 1 (V2) = High Pin 2 (V1) = Low RFC to RF2 Control Logic Input The PE4251 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 2) supporting a +3.3 or 5.0-volt CMOS logic input, and requires a dedicated +3.3 or 5.0-volt power supply connection (pin 1). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins V1 and V2 (pins 2 & 1), that can be directly driven by +3.3 or 5.0-volt CMOS logic or a suitable Processor I/O port. This enables the PE4251 to operate in positive control voltage mode within the PE4251 operating limits. Document No. 70-0255-02 www.psemi.com (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 9 PE4251 Product Specification Evaluation Kit Figure 4. Evaluation Board Layouts The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4250 SPDT switch. The RF common port is connected through a 50 transmission line to the bottom SMA connector, J3. Port 1 and Port 2 are connected through 50 transmission lines to two SMA connectors on either side of the board, J4 and J2. A through transmission line connects SMA connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. Peregrine specification 101/0337 The board is constructed of a two metal layer FR4 material with a total thickness of 0.0322". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.033", trace gaps of 0.010", dielectric thickness of 0.028", copper thickness of 0.0021" and r of 4.3. J1 provides a means for controlling the DC inputs to the device. The second-to-bottom lower right pin (J1-3) is connected to the device V1 input. The second-to-top upper right pin (J1-7) is connected to the device V2 input. Footprints for decoupling capacitors are provided on both V1 and V2 traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance. Figure 5. Evaluation Board Schematic Peregrine specification 102/0408 NOTES: 1. USE 101-0337-02 PCB. J1 HEADER 2 X 5 PIN 2 4 6 8 10 2 4 6 8 10 1 3 5 7 9 2. CAUTION: CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD) 1 3 5 7 9 C1 100pF R1 DNI C2 100pF R2 0 OHM 3. ALL TRANSMISION LINES ARE: 33MIL WIDTH, 10MIL GAPS, 28MIL CORE DIELECTRIC 4.3 Er AND 2.1MIL Cu THICKNESS. R3 0 OHM J2 SMASM U1 1 MSOP 1 2 3 4 8 7 6 5 J4 SMASM 1 2 2 1 RF2 V2 GNDS2 V1 RFC GNDS1 N/C RF1 or GND 2 J3 SMASM J5 SMASM J6 SMASM 1 2 2 1 (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 9 Document No. 70-0255-02 UltraCMOSTM RFIC Solutions PE4251 Product Specification Figure 6. Insertion Loss: RFC-RF @ 25 C Figure 7. Insertion Loss: RFC-RF @ 3.3 V Figure 8. Isolation: RFC-RF @ 25 C Figure 9. Isolation: RFC-RF @ 3.3 V Document No. 70-0255-02 www.psemi.com (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 9 PE4251 Product Specification Figure 10. Return Loss at active port @ 25 C (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 9 Figure 11. Return Loss at active port @ 3.3 V Document No. 70-0255-02 UltraCMOSTM RFIC Solutions PE4251 Product Specification Figure 12. Package Drawing 8-lead MSOP with exposed paddle: 19-0134-01 4) THE PE4251 USES SEATING PLANE OPTION 2 Document No. 70-0255-02 www.psemi.com (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 9 PE4251 Product Specification Figure 13. Top Marking Specification AAAA: Product Number, last 4 digits, Exp. LLLL: Last four digits of the Assembly lot number YWW: Date Code, last digit of the year and work week 4251 LLLL YWW Figure 14. Tape and Reel Specifications 8-lead MSOP with exposed paddle Pin1 Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method EK4251-01 PE4251-EK PE4251-08MSOP-EK Evaluation Kit 1 / Box PE4251MLI 4251 PE4251G-08MSOP-Cut tape or loose Green 8-lead MSOP, exposed paddle Cut tape or loose PE4251MLI-Z 4251 PE4251G-08MSOP-2000C Green 8-lead MSOP, exposed paddle 2000 units / T&R (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 9 Document No. 70-0255-02 UltraCMOSTM RFIC Solutions PE4251 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 High-Reliability and Defense Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas San Diego, CA, USA Phone: 858-731-9475 Fax: 848-731-9499 Europe/Asia-Pacific Aix-En-Provence Cedex 3, France Phone: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). Document No. 70-0255-02 www.psemi.com The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. (c)2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 9