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UT54ACS132E
Quadruple 2-Input NAND Schmitt Triggers
October 2008
www.aeroflex.com/Logic
FEATURES
0.6μm CRH CMOS Process
- Latchup immune
High speed
Low power consumption
Wide operating power supply from 3.0 V to 5.5V
Available QML Q or V processes
14-lead flatpack
DESCRIPTION
The UT54ACS132 is a quadruple 2-input NAND gate with
Schmitt Trigger input levels. A high applied on both the inputs
forces the output to a low state.
The devices are characterized over full HiRel temperature range
of -55°C to +125°C.
LOGIC SYMB OL
FUNCTION TABLE
Y1
(3)
(6) Y2
Y3
(8)
(11) Y4
(1)
A1 (2)
B1 (4)
A2 (5)
B2 (9)
A3 (10)
B3 (12)
A4 (13)
B4
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984
and IEC Publication 617-12.
&
INPUTS OUTPUT
An Bn Yn
L L H
L H H
H L H
H H L
PINOUT 14-Lead Flatpack
Top View
LOGIC DIAGRAM
VDD
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
VSS
114
213
312
411
510
69
78
B4
A4 Y4
B3
A3 Y3
A1
B1 Y1
A2
B2 Y2
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OPERATIONAL ENVIRONMENT1
Notes:
1. Logic will not latchup during radiation ex posure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only , functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
PARAMETER LIMIT UNITS
Total Dose 1.0E6 rads(Si)
SEU Thresh old 280 MeV-cm2/mg
SEL Threshold 120 MeV-cm2/mg
Neutron Fluence 1.0E14 n/cm2
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage -0.3 to 7.0 V
VI/O Voltage any pin -.3 to VDD + .3 V
TSTG Storage Temperature range -65 to +150 °C
TJMaximum junction temperature +175 °C
TLS Lead temperature (soldering 5 seconds) +300 °C
ΘJC Thermal resistance junction to case 20 °C/W
IIDC input current ±10 mA
PDMaximum power dissipation 1 W
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage 3.0 to 5.5 V
VIN Input voltage any pin 0 to VDD V
TCTemperature range -55 to +125 °C
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DC ELECTRICAL CHARACTERIST IC S FO R TH E UT 54ACS132E7
( VDD = 3.0V to 5.5V; VSS = 0V6; -55°C < TC < +125°C)
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-385 35, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and sectio n 3.11.2.
8. Power dissipation specified per switching output.
9. This value is guaranteed based on characterization data, but not tested.
SYMBOL Description CONDITION VDD MIN MAX UNIT
VT+ Schmitt trigger positive-going
threshold 13.0V 2.1 V
5.5V 3.85
VT- Schmitt trigger negative-going
threshold 13.0V 0.9 V
5.5V 1.65
VHHysteresis2
(VT+ - VT-)
3.0V 0.3 1.2 V
4.5V .6 1.5
IIN Input leakage current VIN = VDD or VSS 5.5V -1 1μA
VOL Low-level output voltage 3IOL = 100μA3.0V 0.25 V
4.5V 0.25
VOH High-level output voltage 3IOH = -100μA3.0V 2.75 V
4.5V 4.25
IOS Short-circuit output current 2 ,4 VO = VDD and VSS 3.0V -100 100 mA
5.5V -200 200
IOL Low level output current9VIN = VDD or VSS
VOL = 0.4V
3.0V 6mA
5.5V 8
IOH High level output current9VIN = VDD or VSS
VOH = VDD-0.4V
3.0V -6 mA
5.5V -8
Ptotal Power dissipation 2, 8 CL = 50pF 5.5V
3.0V
1.9
0.76 mW/
MHz
IDDQ Quiescent Supply Current VIN = VDD or VSS 5.5V 10 μA
CIN Input capacitance 5ƒ = 1MHz 0V 15 pF
COUT Output capacitance 5 ƒ = 1MHz 0V 15 pF
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AC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS132E2
(VDD = 3.0V to 5.5V; VSS = 0V 1, -55°C < TC < +125°C)
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition A and section 3.11.2.
SYMBOL PARAMETER VDD MINIMUM MAXIMUM UNIT
tPHL Input to Yn CL = 30pF 3.0V & 3.6V 2 12 ns
4.5V & 5.5V 2 8
CL = 50pF 3.0V & 3.6V 2 16 ns
4.5V & 5.5V 2 12
tPLH Input to Yn CL = 30pF 3.0V & 3.6V 2 15 ns
4.5V & 5.5V 211
CL = 50pF 3.0V & 3.6V 2 19 ns
4.5V & 5.5V 2 15
Packaging
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Ordering Information: UT54ACS132E: SMD
Drawing Number:
96542 = UT54ACS132E
Device Type:
02 = 1 rad(Si)/sec
Package Type:
X = 14-lead ceramic bottom-brazed dual-in-line Flatpack
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
5962 ***** ** * * **
Total Dose: (Note 3 & 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
03 = 50 to 300 rads(Si/Sec)
Class Designator:
Q = QML Class Q
V = QML Class V
Notes:
1. Lead fini sh (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For protot ype inquiries, contact
factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test
Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E 5 rads(Si), 3E5 rads(S i), and 5E5
rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.
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Aeroflex Colorado Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced HiRel