TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FEATURES
DQualified for Automotive Applications
DESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Using Human
Body Model (C = 100 pF, R = 1500 Ω)
DPower-On Reset Generator With Fixed
Delay Time of 200 ms (TPS3823/4/5/8)
or 25 ms (TPS3820)
DManual Reset Input (TPS3820/3/5/8)
DReset Output Available in Active-Low
(TPS3820/3/4/5), Active-High (TPS3824) and
Open-Drain (TPS3828)
DSupply Voltage Supervision Range
2.5 V, 3 V, 3.3 V, 5 V
DWatchdog Timer (TPS3820/3/4/8)
DSupply Current of 15 μA (Typ)
DSOT23-5 Package
APPLICATIONS
DApplications Using Automotive DSPs,
Microcontrollers, or Microprocessors
DIndustrial Equipment
DProgrammable Controls
DAutomotive Systems
DBattery-Powered Equipment
DIntelligent Instruments
DWireless Communications Systems
description
The TPS382x family of supervisors provides circuit initialization and timing supervision, primarily for DSP and
processor-based systems.
Copyright © 2008 Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3
2
4
5
TPS3820, TPS3823, TPS3828 . . . DBV PACKAGE
(TOP VIEW)
1
RESET
GND
MR
VDD
WDI
3
2
4
5
TPS3825 . . . DBV PACKAGE
(TOP VIEW)
1
RESET
GND
RESET
VDD
MR
3
2
4
5
TPS3824 . . . DBV PACKAGE
(TOP VIEW)
1
RESET
GND
RESET
VDD
WDI
RESET
MR WDI
100 nF
VDD
GND
TPS3823-33
VDD
RESET
I/O
GND
MSP430C325
3.3 V
typical application
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
During power-on, RESET is asserted when supply voltage VDD becomes higher than 1.1 V. Thereafter, the
supply voltage supervisor monitors VDD and keeps RESET active as long as VDD remains below the threshold
voltage VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system
reset. The delay time, td, starts after VDD has risen above the threshold voltage VIT−. When the supply voltage
drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are
required. All the devices of this family have a fixed-sense threshold voltage VIT− set by an internal voltage
divider.
The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become
active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that
is periodically triggered by a positive or negative transition at WDI. When the supervising system fails to retrigger
the watchdog circuit within the time-out interval, ttout, RESET becomes active for the time period td. This event
also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.
In applications where the input to the WDI pin may be active (transitioning high and low) when the
TPS3820/3/4/8 is asserting RESET, the TPS3820/3/4/8 does not return to a non-reset state when the input
voltage is above Vt. If the application requires that input to WDI is active when RESET is asserted, WDI must
be decoupled from the active signal. This can be accomplished by using an N-channel FET in series with the
WDI pin, with the gate of the FET connected to the RESET output as shown in Figure 1.
WDI
RESET
TPS3824
WDI External
Figure 1
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available
in a 5-pin SOT23-5 package. The TPS382x-xxQ devices are characterized for operation over a temperature
range of −40°C to 125°C, and are qualified in accordance with AEC-Q100 stress test qualification for integrated
circuits.
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE INFORMATION{}
DEVICE NAME THRESHOLD VOLTAGE MARKING
TPS3820-33QDBVRQ1§2.93 V PDEQ
TPS3820-50QDBVRQ1§4.55 V PDDQ
TPS3823-25QDBVRQ1§2.25 V PAPQ
TPS3823-30QDBVRQ1§2.63 V PAQQ
TPS3823-33QDBVRQ1§2.93 V PARQ
TPS3823-50QDBVRQ1§4.55 V PASQ
TPS3824-25QDBVRQ1§2.25 V PATQ
TPS3824-30QDBVRQ1§2.63 V PAUQ
TPS3824-33QDBVRQ1§2.93 V PAVQ
TPS3824-50QDBVRQ1§4.55 V PAWQ
TPS3825-33QDBVRQ1§2.93 V PDGQ
TPS3825-50QDBVRQ1§4.55 V PDFQ
TPS3828-33QDBVRQ1§2.93 V PDIQ
TPS3828-50QDBVRQ1§4.55 V PDHQ
†For the most current package and ordering information, see the Package Option
Addendum at the end of this document, or see the TI web site at
http://www.ti.com.
‡Package drawings, thermal data, and symbolization are available at
http://www.ti.com/packaging.
§The DBVR package indicates tape and reel of 3000 parts.
FUNCTION/TRUTH TABLE
INPUTS OUTPUTS
MR‡VDD>VIT RESET RESET§
L 0 L H
L 1 L H
H 0 L H
H 1 H L
‡TPS3820/3/5/8
§TPS3824/5
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
_
+
Watchdog
Timer Logic
Reset
Logic
Reset†
Reset
MR‡
WDI
Transition
Detector
52 kΩ
40 kΩ
Vref
VDD
†TPS3824/5
‡TPS3820/3/5/8
timing diagram
undefined
undefined
tdtdtt(out) td
VDD
VIT
1.1 V
RESET
WDI
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RESET, RESET, MR, WDI (see Note 1) −0.3 V to (VDD + 0.3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum low output current, IOL 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum high output current, IOH −5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current range, IIK (VI < 0 or VI > VDD) ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current range, IOK (VO < 0 or VO > VDD) ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soldering temperature 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
DBV 437 mW 3.5 mW/°C280 mW 227 mW 87 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage, VDD 1.1 5.5 V
Input voltage, VI0 VDD + 0.3 V
High-level input voltage at MR and WDI, VIH 0.7 × VDD V
Low-level input voltage, VIL 0.3 × VDD V
Input transition rise and fall rate at MR or WDI, Δt/ΔV 100 ns/V
Operating free-air temperature range, TA−40 125 °C
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS382x-25 VDD = VIT− + 0.2 V
IOH = −20 μA
08×V
RESET TPS382x-30
TPS382x-33
VDD = VIT− + 0.2 V
IOH = −30 μA
0.8 × VDD
V
TPS382x-50 VDD = VIT− + 0.2 V
IOH = −120 μAVDD − 1.5 V
VOH High-level output voltage TPS3824-25
TPS3825-25 VDD ≥ 1.8 V, IOH = −100 μA
RESET
TPS3824-30
TPS3825-30
08×V
V
RESET TPS3824-33
TPS3825-33 VDD ≥ 1.8 V, IOH = −150 μA
0.8 × VDD V
TPS3824-50
TPS3825-50
TPS3824-25
TPS3825-25
VDD = VIT− + 0.2 V
IOL = 1 mA
RESET
TPS3824-30
TPS3825-30 VDD = VIT− + 0.2 V
04
V
RESET TPS3824-33
TPS3825-33
VDD
=
VIT
−
+
0
.
2
V
IOL = 1.2 mA 0.4 V
VOL Low-level output voltage TPS3824-50
TPS3825-50
VDD = VIT− + 0.2 V
IOL = 3 mA
TPS382x-25 VDD = VIT− − 0.2 V
IOL = 1 mA
RESET
TPS382x-30 VDD = VIT− −0.2 V
045
V
RESET TPS382x-33
VDD
=
VIT
−
0
.
2
V
IOL = 1.2 mA 0.45 V
TPS382x-50 VDD = VIT− − 0.2 V
IOL = 3 mA
Power-up reset voltage (see Note 2) VDD ≥ 1.1 V, IOL = 20 μA 0.4 V
TPS382x-25 2.21 2.25 2.30
TPS382x-30
T 0°Cto85°C
2.59 2.63 2.69
V
TPS382x-33 TA = 0°C to 85°C2.88 2.93 3 V
V
Ne
g
ative-
g
oin
g
input threshold TPS382x-50 4.49 4.55 4.64
VIT−
Negative going
input
threshold
voltage (see Note 3) TPS382x-25 2.19 2.25 2.30
TPS382x-30
T 40°C to 125°C
2.55 2.63 2.69
V
TPS382x-33 TA = − 40°C to 125°C2.84 2.93 3 V
TPS382x-50 4.44 4.55 4.65
TPS382x-25
V
Hysteresis at V input
TPS382x-30 30
mV
Vhys Hysteresis at VDD input TPS382x-33
30
mV
TPS382x-50 50
NOTES: 2. The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V
3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminals.
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IIH(AV) Average high-level input current
WDI
WDI = VDD,
time average (dc = 88%) 120
IIL(AV) Average low-level input current
WDI WDI = 0.3 V, VDD = 5.5 V
time average (dc = 12%) −15
WDI WDI = VDD 140 190
μ
A
IIH High-level input current MR MR = VDD × 0.7,
VDD = 5.5 V −40 −60
μA
I
Low level input current
WDI WDI = 0.3 V, VDD = 5.5 V 140 190
IIL Low-level input current MR MR = 0.3 V, VDD = 5.5 V −110 −160
TPS382x-25
I
Output short-circuit current
RESET
TPS382x-30 VDD = VIT
,
m
a
x + 0.2 V, −400
A
IOS
Output
short circuit
current
(see Note 4) RESET TPS382x-33
VDD
=
VIT
,
max
+
0
.
2
V
,
VO = 0 V
400
μA
TPS382x-50
O
−800
IDD Supply current WDI and MR unconnected,
Outputs unconnected 15 25 μA
Internal pullup resistor at MR 52 kΩ
CiInput capacitance at MR, WDI VI = 0 V to 5.5 V 5 pF
NOTE 4: The RESET short-circuit current is the maximum pullup current when RESET is driven low by a μP bidirectional reset pin.
timing requirements at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN MAX UNIT
at VDD VDD = VIT− + 0.2 V, VDD = VIT- - 0.2 V 6μs
twPulse width at MR VDD ≥ VIT− + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 x VDD 1μs
w
at WDI VDD ≥ VIT− + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 x VDD 100 ns
switching characteristics at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
TPS3820 VDD ≥ VIT− + 0.2 V, 112 200 310 ms
ttout Watchdog time out TPS3823/4/8
VDD
≥
VIT
−
+
0
.
2
V
,
See Timing Diagram 0.9 1.6 2.5 s
t
TPS3820 VDD ≥VIT− + 0.2 V, 15 25 37
ms
tdDelay time TPS3823/4/5/8
VDD
≥VIT
−
+
0
.
2
V
,
See timing diagram 120 200 300 ms
tPHL
Propagation (delay) time,
MR to RESET delay
(TPS3820/3/5/8)
VDD ≥VIT− + 0.2 V,
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
0.1
μ
s
tPHL
high-to-low-level output
VDD to RESET delay VIL = VIT- - 0.2 V,
VIH = VIT- + 0.2 V 25
μs
tPLH Propagation (delay) time,
MR to RESET delay (TPS3824/5)
VDD ≥VIT− + 0.2 V,
VIL = 0.3 x VDD,
VIH = 0.7 x VDD
0.1
μ
s
tPLH
low-to-high-level output
VDD to RESET delay (TPS3824/5) VIL = VIT- - 0.2 V,
VIH = VIT- + 0.2 V 25
μs
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
−40
1.001
1
0.999
0.998
−15 10 35
TA − Free-Air Temperature − °C
0.997
0.996
0.995
NORMALIZED INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE AT VDD
60 85
Normalized Input Threshold Voltage − VIT(T
A), VIT(25 °C)
Figure 3
−0.5
19
7
5
0.5 1.5 2.5 3.5
VDD − Supply Voltage − V
3
1
−1
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
4.5 6.5
MR = Open
WDI = Open
TA = 25°C
11
9
5.5
− Supply Current −IDD Aμ
13
17
15
TPS382x-33
Figure 4
−50
−150
VI − Input Voltage at MR − V
−200
INPUT CURRENT
vs
INPUT VOLTAGE AT MR
50
0
85°C
−100
−40°C
− Input Current −IIAμ
VDD = 5.5 V
WDI = Open
−101234 65
Figure 5
0
3
2.5
2
1.5
1
IOL − Low-Level Output Current − mA
1
0.5
0
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VDD = 2.66 V
WDI = Open
MR = Open
VOL− Low-Level Output Voltage − V
−40°C
85°C
23 4567 8910
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143B − DECEMBER 2002 − REVISED JUNE 2008
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
0 −50
IOH − High-Level Output Current − μA
VDD = 3.2 V
WDI = Open
MR = Open
VOH − High-Level Output Voltage − V
−40°C
85°C
−100 −150 −200 −250
3
2.5
2
1.5
1
0.5
0
3.5
Figure 7
0
IOH − High-Level Output Current − μA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 5.5 V
WDI = Open
MR = Open
VOH − High-Level Output Voltage − V
−40°C
85°C
−100 −200 −300 −400
6
5
4
3
2
1
0
−500 −600 −700
Figure 8
0
6
200 400 600 800
4
2
0
− Minimum Pulse Duration at V
MINIMUM PULSE DURATION AT VDD
vs
VDD THRESHOLD OVERDRIVE
1000
8
twsμ
VDD − Threshold Overdrive − mV
10
WDI = Open
MR = Open
DD−
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
2T25-50QFRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2T28-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3820-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3823-25QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3823-30QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3823-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3823-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3824-25QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3824-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3824-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
2U3825-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3820-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3820-50DBVRQ1G4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3820-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3823-25QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3823-30QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3823-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS3823-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3824-25QDBVRQ1 ACTIVE SOT-23 DBV 5 TBD Call TI Call TI
TPS3824-30QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3824-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3824-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3825-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3825-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3828-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3828-50QDBVRG4Q ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3828-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 3
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS3820-33-Q1, TPS3820-50-Q1, TPS3823-25-Q1, TPS3823-30-Q1, TPS3823-33-Q1, TPS3823-50-Q1, TPS3824-25-Q1,
TPS3824-30-Q1, TPS3824-33-Q1, TPS3824-50-Q1, TPS3825-33-Q1, TPS3825-50-Q1, TPS3828-33-Q1, TPS3828-50-Q1 :
•Catalog: TPS3820-33, TPS3820-50, TPS3823-25, TPS3823-30, TPS3823-33, TPS3823-50, TPS3824-25, TPS3824-30, TPS3824-33, TPS3824-50, TPS3825-33,
TPS3825-50, TPS3828-33, TPS3828-50
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated