Product Specification PE4239 SPDT UltraCMOS(R) RF Switch Product Description Features Single-pin or complementary CMOS logic control inputs +3.0V power supply needed for singlepin control mode The PE4239 UltraCMOS(R) RF switch is designed to cover a broad range of applications from DC through 3.0 GHz. This reflective switch integrates on-board CMOS control logic with a low voltage CMOS-compatible control interface, and can be controlled using either single-pin or complementary control inputs. Using a nominal +3V power supply voltage, a typical input 1 dB compression point of +27 dBm can be achieved. Low insertion loss: 0.7 dB at 1.0 GHz, 0.9 dB at 2.0 GHz Isolation of 32 dB at 1.0 GHz, 23 dB at 2.0 GHz The PE4239 UltraCMOS RF switch is manufactured on Peregrine's UltraCMOS process, a patented variation of siliconon-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Typical input 1 dB compression point of +27 dBm Ultra-small 6-lead SC-70 package Figure 1. Functional Diagram RFC Figure 2. Package Type SC-70 6-lead SC-70 RF1 RF2 CMOS Control Driver CTRL CTRL or VDD Table 1. Electrical Specifications @ +25 C, VDD = 3V (ZS = ZL = 50) Parameter Operation Frequency Conditions 1 Minimum Typical DC Units 3000 MHz 0.85 1.05 dB dB Insertion Loss 1000 MHz 2000 MHz Isolation 1000 MHz 2000 MHz 30 21 32 23 dB dB Return Loss 1000 MHz 2000 MHz 18 16 20 18 dB dB `ON' Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 300 ns `OFF' Switching Time 50% CTRL to 25 dB isolation, 1 GHz 200 ns 15 mVpp Video Feedthrough 0.7 0.9 Maximum 2 Input 1 dB Compression 2000 MHz 26 27 dBm Input IP3 2000 MHz, 14 dBm input power 43 45 dBm Notes: 1. Device linearity will begin to degrade below 10 MHz. 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. DOC-56568-2 www.psemi.com (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 PE4239 Product Specification Figure 3. Pin Configuration (Top View) Table 3. Absolute Maximum Ratings Symbol pin 1 1 2 RF2 3 239 GND 6 . RF1 CTRL or VDD 5 RFC 4 CTRL Table 2. Pin Descriptions Pin Name 1 RF1 RF1 port (Note 1) 2 GND Ground connection. Traces should be physically short and connected to ground plane for best performance. 3 RF2 RF2 port (Note 1) 4 CTRL Switch control input, CMOS logic level. 5 RFC Common RF port for switch (Note 1) CTRL or VDD Note 1: Min Max Units Power supply voltage -0.3 4.0 V VI Voltage on any input -0.3 VDD+ 0.3 V TST Storage temperature range -65 150 C TOP Operating temperature range -55 85 C PIN Input power (50) 30 dBm VESD Pin No. 6 Parameter/Conditions VDD ESD voltage (Human Body Model) 1500 V Description This pin supports two interface options: Single-pin control mode. A nominal 3V supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to CTRL is supplied to this pin. Bypassing on this pin is not required in this mode. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Table 4. DC Electrical Specifications Parameter VDD Power Supply Voltage Min Typ Max Units 2.7 3.0 3.3 V 250 500 nA IDD Power Supply Current (VDD = 3V, VCTRL = 3V) Control Voltage High Control Voltage Low 0.7x VDD V 0.3x VDD V Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 9 Document No. DOC-56568-2 UltraCMOS(R) RFIC Solutions PE4239 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Signal Path Pin 6 (CTRL or VDD) = VDD Pin 4 (CTRL) = High RFC to RF1 Pin 6 (CTRL or VDD) = VDD Pin 4 (CTRL) = Low RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Signal Path Pin 6 (CTRL or VDD) = Low Pin 4 (CTRL) = High RFC to RF1 Pin 6 (CTRL or VDD) = High Pin 4 (CTRL) = Low RFC to RF2 Document No. DOC-56568-2 www.psemi.com Control Logic Input The PE4239 is a versatile RF switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3V CMOS logic input, and requires a dedicated +3V power supply connection on pin 6 (VDD). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and CTRL (pins 4 & 6), that can be directly driven by +3V CMOS logic or a suitable Processor I/O port. This enables the PE4239 to be used as a potential alternate source for SPDT RF switch products used in positive control voltage mode and operating within the PE4239 operating limits. (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 9 PE4239 Product Specification Evaluation Kit The SPDT switch Evaluation Kit board was designed to ease customer evaluation of the PE4239 SPDT switch. The RF common port is connected through a 50 transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50 transmission lines to the top two SMA connectors on the right side of the board, J3 and J2, respectively. A through transmission line connects SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. Figure 4. Evaluation Board Layout Peregrine Specification 101/0083 The board is constructed of a two metal layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476", trace gaps of 0.030", dielectric thickness of 0.028", metal thickness of 0.0021" and r of 4.4. J6 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J6-3) is connected to the device V1 or CTRL input. The fourth pin to the right (J6-7) is connected to the device V2 or CTRL/VDD input. Figure 5. Evaluation Board Schematic Peregrine Specification 102/0104 (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 9 Document No. DOC-56568-2 UltraCMOS(R) RFIC Solutions PE4239 Product Specification Typical Performance Data @ -40 C to 85 C (Unless otherwise noted) Figure 7. Input 1 dB Compression Point & IIP3 Figure 6. Insertion Loss - RFC to RF1 (Typical performance @ 25 C) 0 60 60 50 50 40 40 30 30 -0.3 85C -0.9 IIP3 (dBm) Insertion Loss (dB) -0.6 25C 1dB Compression Point (dBm) -40C -1.2 20 -1.5 0 500 1000 1500 2000 2500 0 3000 500 1000 1500 2000 2500 20 3000 2500 3000 Frequency (MHz) Frequency (MHz) Figure 8. Insertion Loss - RFC to RF2 Figure 9. Isolation - RFC to RF1 0 0 -0.3 -20 -0.6 85C -0.9 Isolation (dB) Insertion Loss (dB) -40C 25C -40 -60 -80 -1.2 -100 -1.5 0 500 1000 1500 2000 Frequency (MHz) Document No. DOC-56568-2 www.psemi.com 2500 3000 0 500 1000 1500 2000 Frequency (MHz) (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 9 PE4239 Product Specification Typical Performance Data @ -40 C to 85 C (Unless otherwise noted) Figure 11. Isolation - RF1 to RF2, RF2 to RF1 0 0 -20 -20 -40 -40 Isolation (dB) Isolation (dB) Figure 10. Isolation - RFC to RF2 -60 -80 -60 -80 -100 0 500 1000 1500 2000 2500 -100 3000 0 500 1000 Frequency (MHz) 2000 2500 3000 Frequency (MHz) Figure 12. Return Loss - RFC to RF1, RF2 Figure 13. Return Loss - RF1, RF2 0 0 -10 -10 RF1 -20 Return Loss (dB) Return Loss (dB) 1500 RF1 -30 -20 RF2 -30 RF2 -40 -40 0 500 1000 1500 2000 2500 3000 Frequency (MHz) (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 9 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Document No. DOC-56568-2 UltraCMOS(R) RFIC Solutions PE4239 Product Specification Figure 14. Package Drawing 6-lead SC-70 0.10 C (2X) 2.050.20 A 0.65 1.30 B 6 4 0.50 MIN 0.10 C 1.250.10 2.150.15 0.900.10 1.95 0.05 C 0.10 C (2X) Pin #1 Corner 1 3 0.65 SEATING PLANE 0.050.05 C 0.2250.075 0.40 MIN 1.30 Side View Top View 0.10 0.1650.085 Recommended Land Pattern A B ALL FEATURES 0.36+0.10 -0.15 End View Document No. DOC-56568-2 www.psemi.com DOC-01923 (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 9 PE4239 Product Specification Figure 15. Tape and Reel Specifications Pin 1 Tape Feed Direction (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 9 Document No. DOC-56568-2 UltraCMOS(R) RFIC Solutions PE4239 Product Specification Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method 4239-01 239 PE4239-06SC70-7680A 6-lead SC-70 7680 units / Canister 4239-02 239 PE4239-06SC70-3000C 6-lead SC-70 3000 units / T&R 4239-00 PE4239-EK PE4239-06SC70-EK Evaluation Kit 1 / Box 4239-51 239 PE4239G-06SC70-7680A Green 6-lead SC-70 7680 units / Canister 4239-52 239 PE4239G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R Sales Contact and Information For sales and contact information please visit www.psemi.com. Advance Information: The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification: The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. Document No. DOC-56568-2 www.psemi.com No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com. (c)2002-2016 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 9