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FEATURES
D,DW,N,ORPWPACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1+
V+
C1-
C2+
C2-
V-
DOUT2
RIN2
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
APPLICATIONS
DESCRIPTION/ORDERING INFORMATION
TRS2025-V DUAL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
•ESD Protection for RS-232 Bus Pins–±15-kV Human-Body Model (HBM)•Meets or Exceeds the Requirements ofTIA/EIA-232-F and ITU v.28 Standards•Operates at 5-V V
CC
Supply•Operates up to 120 kbit/s•External Capacitors . . . 4 ×0.1 μF•Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
•Battery-Powered Systems•PDAs
•Notebooks
•Laptops
•Palmtop PCs•Hand-Held Equipment
The TRS202 device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kVESD protection pin-to-pin (serial-port connection pins, including GND). The device meets the requirements ofTIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and theserial-port connector. The charge pump and four small external capacitors allow operation from a single 5-Vsupply. The device operates at data signaling rates up to 120 kbit/s and a maximum of 30-V/ μs driver outputslew rate.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
PDIP – N Tube of 25 TRS202CN PREVIEWTube of 40 TRS202CDSOIC – D TRS202CReel of 2500 TRS202CDR0°C to 70 °C Tube of 40 TRS202CDWSOIC – DW TRS202CReel of 2000 TRS202CDWRTube of 90 TRS202CPWTSSOP – PW RU02CReel of 2000 TRS202CPWRPDIP – N Tube of 25 TRS202IN PREVIEWTube of 40 TRS202IDSOIC – D TRS202IReel of 2500 TRS202IDR–40 °C to 85 °C Tube of 40 TRS202IDWSOIC – DW TRS202IReel of 2000 TRS202IDWRTube of 90 TRS202IPWTSSOP – PW RU02IReel of 2000 TRS202IPWR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2007, Texas Instruments IncorporatedPRODUCTION DATA information current as of publication date.Products conform to specifications per the terms of TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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DIN1 DOUT1
RIN1ROUT1
DIN2 DOUT2
RIN2ROUT2
11
10
12
9
14
7
13
8
TRS202
5-V DUAL RS-232 LINE DRIVER/RECEIVERWITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
FUNCTION TABLES
xxx
Each Driver
(1)
INPUT OUTPUTDIN DOUT
L HH L
(1) H = high level, L = low level
Each Receiver
(1)
INPUT OUTPUTRIN ROUT
L HH LOpen H
(1) H = high level, L = low level,Open = input disconnected orconnected driver off
LOGIC DIAGRAM (POSITIVE LOGIC)
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Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
Electrical Characteristics
(1)
TRS2025-V DUAL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range
(2)
–0.3 6 VV+ Positive charge pump voltage range
(2)
V
CC
– 0.3 14 VV– Negative charge pump voltage range
(2)
–14 0.3 VDrivers –0.3 V+ + 0.3V
I
Input voltage range VReceivers ±30Drivers V– – 0.3 V+ + 0.3V
O
Output voltage range VReceivers –0.3 V
CC
+ 0.3DOUT Short-circuit duration DOUT ContinuousD package 73DW package 57θ
JA
Package thermal impedance
(3) (4)
°C/WN package 67PW package 108T
J
Operating virtual junction temperature 150 °CT
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are with respect to network GND.(3) Maximum power dissipation is a function of T
J
(max), θ
JA
, and T
A
. The maximum allowable power dissipation at any allowable ambienttemperature is P
D
= (T
J
(max) – T
A
)/ θ
JA
. Operating at the absolute maximum T
J
of 150 °C can affect reliability.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
See Figure 4
MIN NOM MAX UNIT
Supply voltage 4.5 5 5.5 VV
IH
Driver high-level input voltage DIN 2 VV
IL
Driver low-level input voltage DIN 0.8 VDriver input voltage DIN 0 5.5V
I
VReceiver input voltage –30 30TRS202C 0 70T
A
Operating free-air temperature °CTRS202I –40 85
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4 )
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
I
CC
Supply current No load, V
CC
= 5 V 8 15 mA
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.(2) All typical values are at V
CC
= 5 V, and T
A
= 25 °C.
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DRIVER SECTION
Electrical Characteristics
(1)
Switching Characteristics
(1)
ESD Protection
TRS202
5-V DUAL RS-232 LINE DRIVER/RECEIVERWITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4 )
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
DOUT at R
L
= 3 k ΩtoV
OH
High-level output voltage DIN = GND 5 9 VGND,
DOUT at R
L
= 3 k ΩtoV
OL
Low-level output voltage DIN = V
CC
–5 –9 VGND,I
IH
High-level input current V
I
= V
CC
15 200 μAI
IL
Low-level input current V
I
at 0 V –15 –200 μAI
OS
(3)
Short-circuit output current V
CC
= 5.5 V, V
O
= 0 V ±10 ±60 mAr
o
Output resistance V
CC
, V+, and V– = 0 V, V
O
=±2 V 300 Ω
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.(2) All typical values are at V
CC
= 5 V, and T
A
= 25 °C.(3) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than oneoutput should be shorted at a time.
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4 )
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
C
L
= 50 to 1000 pF, R
L
= 3 k Ωto 7 k Ω,Maximum data rate 120 kbit/sOne DOUT switching, See Figure 1Propagation delay time, C
L
= 2500 pF, R
L
= 3 k Ω,t
PLH(D)
2μslow- to high-level output All drivers loaded, See Figure 1Propagation delay time, C
L
= 2500 pF, R
L
= 3 k Ω,t
PHL(D)
2μshigh- to low-level output All drivers loaded, See Figure 1C
L
= 150 pF to 2500 pF, R
L
= 3 k Ωto 7 k Ω,t
sk(p)
Pulse skew
(3)
300 nsSee Figure 2Slew rate, transition region C
L
= 50 pF to 1000 pF, R
L
= 3 k Ωto 7 k Ω,SR(tr) 3 6 30 V/ μs(see Figure 1 ) V
CC
= 5 V
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.(2) All typical values are at V
CC
= 5 V, and T
A
= 25 °C.(3) Pulse skew is defined as |t
PLH
– t
PHL
| of each channel of the same device.
PIN TEST CONDITIONS TYP UNIT
DOUT, RIN Human-Body Model (HBM) ±15 kV
4
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RECEIVER SECTION
Electrical Characteristics
(1)
Switching Characteristics
(1)
TRS2025-V DUAL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4 )
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
V
OH
High-level output voltage I
OH
= –1 mA 3.5 V
CC
– 0.4 VV
OL
Low-level output voltage I
OL
= 1.6 mA 0.4 VV
IT+
Positive-going input threshold voltage V
CC
= 5 V, T
A
= 25 °C 1.7 2.4 VV
IT–
Negative-going input threshold voltage V
CC
= 5 V, T
A
= 25 °C 0.8 1.2 VV
hys
Input hysteresis (V
IT+
– V
IT–
) 0.2 0.5 1 Vr
I
Input resistance V
I
=±3 V to ±25 V 3 5 7 k Ω
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.(2) All typical values are at V
CC
= 5 V and T
A
= 25 °C.
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 3 )
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
t
PLH(R)
Propagation delay time, low- to high-level output C
L
= 150 pF 0.5 10 μst
PHL(R)
Propagation delay time, high- to low-level output C
L
= 150 pF 0.5 10 μst
sk(p)
Pulse skew
(3)
300 ns
(1) Test conditions are C1–C4 = 0.1 μF at V
CC
= 5 V ±0.5 V.(2) All typical values are at V
CC
= 5 V and T
A
= 25 °C.(3) Pulse skew is defined as |t
PLH
– t
PHL
| of each channel of the same device.
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PARAMETER MEASUREMENT INFORMATION
50 W
TESTCIRCUIT VOLTAGEWAVEFORMS
0V
3V
Output
Input
VOL
VOH
tPLH(D)
Generator
(seeNoteB)
RL
RS-232
Output
tPHL (D)
CL
(seeNote A)
NOTES: A.C includesprobeandjigcapacitance.
L
B. Thepulsegeneratorhasthefollowingcharacteristics:PRR=120kbit/s,Z =50 ,50%dutycycle,t 10ns,t 10ns.
O r f
W £ £
1.5V 1.5V
3V
-3V
3V
-3V
SR(tf)= 6V
t ort
PHL(D PLH(D)
)
TESTCIRCUIT VOLTAGEWAVEFORMS
0V
3V
Output
Input
VOL
VOH
tPLH(D)
tPHL (D)
50% 50%
NOTES: A.C includesprobeandjigcapacitance.
L
B. Thepulsegeneratorhasthefollowingcharacteristics:PRR=120kbit/s,Z =50 ,50%dutycycle,t 10ns,t 10ns.
O r f
W £ £
1.5V 1.5V
50 W
Generator
(seeNoteB)
RL
RS-232
Output
CL
(seeNote A)
TESTCIRCUIT VOLTAGEWAVEFORMS
50 W
50%
50%
-3V
3V
1.5V
1.5V
Output
Input
VOL
VOH
tPHL (R)
Generator
(seeNoteB) tPLH(R)
Output
CL
(seeNote A)
NOTES: A.C includesprobeandjigcapacitance.
L
B. Thepulsegeneratorhasthefollowingcharacteristics:Z =50 ,50%dutycycle,t 10ns,t 10ns.
O r f
W £ £
TRS202
5-V DUAL RS-232 LINE DRIVER/RECEIVERWITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
Figure 1. Driver Slew Rate
Figure 2. Driver Pulse Skew
Figure 3. Receiver Propagation Delay Times
6
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APPLICATION INFORMATION
11
10
8
1
2
3
4
7
ROUT2
DIN2
9
RIN1
16
13
12
15
14
DIN1
5
6
+
-
VCC
C2+
C1+
GND
C1-
ROUT1
C2-
+
-
CBYPASS
=0.1 F,m
V+
+
-
+
-
RIN2
+
-
DOUT1
DOUT2
†C3canbeconnectedtoV orGND.
CC
NOTES: A .Resistorvaluesshownarenominal.
V-
C1
0.1 F,m
6.3V
C3†
0.1 Fm
16V
C2
0.1 F,m
16V
5kW
5kW
C4
0.1 mF,
16V
B.Nonpolarizedceramiccapacitorsareacceptable.Ifpolarizedtantalumorelectrolyticcapacitorsareused,theyshouldbe
connectedasshown.
Capacitor Selection
Electrostatic Discharge (ESD) Protection
TRS2025-V DUAL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
Figure 4. Typical Operating Circuit and Capacitor Values
The capacitor type used for C1–C4 is not critical for proper operation. The TRS202 requires 0.1- μF capacitors,although capacitors up to 10 μF can be used without harm. Ceramic dielectrics are suggested for the 0.1- μFcapacitors. When using the minimum recommended capacitor values, make sure the capacitance value doesnot degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2 ×)nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures,influences the amount of ripple on V+ and V–.
Use larger capacitors (up to 10 μF) to reduce the output impedance at V+ and V–.
Bypass V
CC
to ground with at least 0.1 μF. In applications sensitive to power-supply noise generated by thecharge pumps, decouple V
CC
to ground with a capacitor the same size as (or larger than) the charge-pumpcapacitors (C1–C4).
TI TRS202 devices have standard ESD protection structures incorporated on the pins to protect againstelectrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driveroutputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structureswere designed to successfully protect these bus pins against ESD discharge of ±15 kV when powered down.
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ESD Test Conditions
Human-Body Model (HBM)
-
+DUT
RD
1.5kW
VHBM 100pF
CS
Machine Model (MM)
TRS202
5-V DUAL RS-232 LINE DRIVER/RECEIVERWITH ±15-kV ESD PROTECTION
SLLS808 – JULY 2007
APPLICATION INFORMATION (continued)
Stringent ESD testing is performed by TI, based on various conditions and procedures. Please contact TI for areliability report that documents test setup, methodology, and results.
The HBM of ESD testing is shown in Figure 5 .Figure 6 shows the current waveform that is generated during adischarge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage ofconcern, and subsequently discharged into the device under test (DUT) through a 1.5-k Ωresistor.
Figure 5. HBM ESD Test Circuit
Figure 6. Typical HBM Current Waveform
The MM ESD test applies to all pins using a 200-pF capacitor with no discharge resistance. The purpose of theMM test is to simulate possible ESD conditions that can occur during the handling and assembly processes ofmanufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins. However, after PCboard assembly, the MM test no longer is as pertinent to the RS-232 pins.
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PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TRS202ID ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TRS202IDG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TRS202IDR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TRS202IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TRS202IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TRS202IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2011
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TRS202IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TRS202IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TRS202IDR SOIC D 16 2500 333.2 345.9 28.6
TRS202IPWR TSSOP PW 16 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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