TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 FEATURES * * * * * * ESD Protection for RS-232 Bus Pins - 15-kV Human-Body Model (HBM) Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards Operates at 5-V VCC Supply Operates up to 120 kbit/s External Capacitors . . . 4 x 0.1 F Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D, DW, N, OR PW PACKAGE (TOP VIEW) C1+ V+ C1C2+ C2VDOUT2 RIN2 APPLICATIONS * * * * * * 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 Battery-Powered Systems PDAs Notebooks Laptops Palmtop PCs Hand-Held Equipment DESCRIPTION/ORDERING INFORMATION The TRS202 device consists of two line drivers, two line receivers, and a dual charge-pump circuit with 15-kV ESD protection pin-to-pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 5-V supply. The device operates at data signaling rates up to 120 kbit/s and a maximum of 30-V/s driver output slew rate. ORDERING INFORMATION PACKAGE (1) (2) TA PDIP - N SOIC - D 0C to 70C SOIC - DW TSSOP - PW PDIP - N SOIC - D -40C to 85C SOIC - DW TSSOP - PW (1) (2) ORDERABLE PART NUMBER Tube of 25 TRS202CN Tube of 40 TRS202CD Reel of 2500 TRS202CDR Tube of 40 TRS202CDW Reel of 2000 TRS202CDWR Tube of 90 TRS202CPW Reel of 2000 TRS202CPWR Tube of 25 TRS202IN Tube of 40 TRS202ID Reel of 2500 TRS202IDR Tube of 40 TRS202IDW Reel of 2000 TRS202IDWR Tube of 90 TRS202IPW Reel of 2000 TRS202IPWR TOP-SIDE MARKING PREVIEW TRS202C TRS202C RU02C PREVIEW TRS202I TRS202I RU02I Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007, Texas Instruments Incorporated TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 FUNCTION TABLES xxx Each Driver (1) (1) INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level Each Receiver (1) (1) INPUT RIN OUTPUT ROUT L H H L Open H H = high level, L = low level, Open = input disconnected or connected driver off LOGIC DIAGRAM (POSITIVE LOGIC) 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 9 8 ROUT2 2 RIN2 Submit Documentation Feedback TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC Supply voltage range (2) V+ Positive charge pump voltage range (2) V- Negative charge pump voltage range VI Input voltage range VO Output voltage range DOUT Short-circuit duration JA MIN MAX -0.3 6 V VCC - 0.3 14 V -14 0.3 V -0.3 V+ + 0.3 (2) Drivers 30 Receivers Drivers V- - 0.3 V+ + 0.3 -0.3 VCC + 0.3 Receivers DOUT Package thermal impedance (3) (4) Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) V V Continuous D package 73 DW package 57 N package 67 PW package TJ UNIT C/W 108 -65 150 C 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) See Figure 4 MIN NOM MAX 4.5 5 5.5 Supply voltage VIH Driver high-level input voltage DIN VIL Driver low-level input voltage DIN Driver input voltage DIN VI TA (1) Receiver input voltage TRS202I V 2 V 0.8 0 5.5 -30 30 0 70 -40 85 TRS202C Operating free-air temperature UNIT V V C Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER ICC (1) (2) Supply current TEST CONDITIONS No load, VCC = 5 V MIN TYP (2) MAX 8 15 UNIT mA Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V, and TA = 25C. Submit Documentation Feedback 3 TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 DRIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT VOH High-level output voltage DOUT at RL = 3 k to GND, VOL Low-level output voltage DOUT at RL = 3 k to GND, IIH High-level input current VI = VCC 15 200 A IIL Low-level input current VI at 0 V -15 -200 A Short-circuit output current VCC = 5.5 V, VO = 0 V 10 60 mA Output resistance VCC, V+, and V- = 0 V, VO = 2 V IOS (3) ro (1) (2) (3) DIN = GND 5 9 V DIN = VCC -5 -9 V 300 Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V, and TA = 25C. Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT Maximum data rate CL = 50 to 1000 pF, One DOUT switching, RL = 3 k to 7 k, See Figure 1 tPLH(D) Propagation delay time, low- to high-level output CL = 2500 pF, All drivers loaded, RL = 3 k, See Figure 1 2 s tPHL(D) Propagation delay time, high- to low-level output CL = 2500 pF, All drivers loaded, RL = 3 k, See Figure 1 2 s tsk(p) Pulse skew (3) CL = 150 pF to 2500 pF, See Figure 2 RL = 3 k to 7 k, 300 ns SR(tr) Slew rate, transition region (see Figure 1) CL = 50 pF to 1000 pF, VCC = 5 V RL = 3 k to 7 k, (1) (2) (3) 120 3 kbit/s 6 30 V/s Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V, and TA = 25C. Pulse skew is defined as |tPLH - tPHL| of each channel of the same device. ESD Protection PIN DOUT, RIN 4 TEST CONDITIONS Human-Body Model (HBM) Submit Documentation Feedback TYP UNIT 15 kV TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 RECEIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER TEST CONDITIONS VOH High-level output voltage IOH = -1 mA VOL Low-level output voltage IOL = 1.6 mA VIT+ Positive-going input threshold voltage VCC = 5 V, TA = 25C VIT- Negative-going input threshold voltage VCC = 5 V, TA = 25C Vhys Input hysteresis (VIT+ - VIT-) rI Input resistance (1) (2) MIN TYP (2) 3.5 VCC - 0.4 1.7 MAX UNIT V 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V 3 5 7 k VI = 3 V to 25 V V Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V and TA = 25C. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 3) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT tPLH(R) Propagation delay time, low- to high-level output CL = 150 pF 0.5 10 s tPHL(R) Propagation delay time, high- to low-level output CL = 150 pF 0.5 10 s tsk(p) (1) (2) (3) Pulse skew (3) 300 ns Test conditions are C1-C4 = 0.1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V and TA = 25C. Pulse skew is defined as |tPLH - tPHL| of each channel of the same device. Submit Documentation Feedback 5 TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 W RL 1.5 V 0V tPHL (D) CL (see Note A) Output tPLH (D) 3V 3V -3 V -3 V TEST CIRCUIT SR(tf) = 6V tPHL(D) or tPLH(D) VOH VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 W, 50% duty cycle, tr 10 ns, tf 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 W RL 1.5 V Input 1.5 V 0V CL (see Note A) tPHL (D) tPLH (D) VOH 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 W, 50% duty cycle, tr 10 ns, tf 10 ns. Figure 2. Driver Pulse Skew Input Generator (see Note B) 3V 1.5 V 1.5 V -3 V Output 50 W CL (see Note A) tPHL (R) tPLH (R) VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 W, 50% duty cycle, tr 10 ns, tf 10 ns. Figure 3. Receiver Propagation Delay Times 6 Submit Documentation Feedback TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 APPLICATION INFORMATION 1 C1 + C3 + 0.1 mF, 0.1 mF 6.3 V 16 V VCC C1+ 16 + CBYPASS - = 0.1 mF, 2 3 V+ GND 15 14 C1- DOUT1 13 4 C2 0.1 mF, 16 V 5 kW + 5 C2- 12 C4 0.1 mF, 16 V DOUT2 RIN2 RIN1 C2+ 6 - 11 V- ROUT1 DIN1 + 7 10 8 9 DIN2 ROUT2 5 kW C3 can be connected to VCC or GND. NOTES: A . Resistor values shown are nominal. B . Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. Figure 4. Typical Operating Circuit and Capacitor Values Capacitor Selection The capacitor type used for C1-C4 is not critical for proper operation. The TRS202 requires 0.1-F capacitors, although capacitors up to 10 F can be used without harm. Ceramic dielectrics are suggested for the 0.1-F capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2x) nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-. Use larger capacitors (up to 10 F) to reduce the output impedance at V+ and V-. Bypass VCC to ground with at least 0.1 F. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1-C4). Electrostatic Discharge (ESD) Protection TI TRS202 devices have standard ESD protection structures incorporated on the pins to protect against electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures were designed to successfully protect these bus pins against ESD discharge of 15 kV when powered down. Submit Documentation Feedback 7 TRS202 5-V DUAL RS-232 LINE DRIVER/RECEIVER WITH 15-kV ESD PROTECTION www.ti.com SLLS808 - JULY 2007 APPLICATION INFORMATION (continued) ESD Test Conditions Stringent ESD testing is performed by TI, based on various conditions and procedures. Please contact TI for a reliability report that documents test setup, methodology, and results. Human-Body Model (HBM) The HBM of ESD testing is shown in Figure 5. Figure 6 shows the current waveform that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of concern, and subsequently discharged into the device under test (DUT) through a 1.5-k resistor. RD 1.5 kW VHBM CS + - DUT 100 pF Figure 5. HBM ESD Test Circuit 1.5 VHBM = 2 kV DUT = 10-V, 1-W Zener Diode | IDUT - A 1.0 0.5 0.0 0 50 100 150 200 Time - ns Figure 6. Typical HBM Current Waveform Machine Model (MM) The MM ESD test applies to all pins using a 200-pF capacitor with no discharge resistance. The purpose of the MM test is to simulate possible ESD conditions that can occur during the handling and assembly processes of manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins. However, after PC board assembly, the MM test no longer is as pertinent to the RS-232 pins. 8 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 7-May-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TRS202ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (3) Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TRS202IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TRS202IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS202IDR SOIC D 16 2500 333.2 345.9 28.6 TRS202IPWR TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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