BCM8130 PRODUCT Brief MULTI-RATE 10 Gbps 16:1 MUX WITH CLOCK GENERATION B C M 8 1 3 0 S U M M A R Y F E AT U R E S Fully integrated multi-rate clock multiplication unit * (CMU) and multiplexer (MUX) Support for multiple rates -- OC-192: 9.953 Gbps, * OC-192 FEC: 10.664 and 10.709 Gbps, 10G Ethernet: 10.3125 Gbps 16:1 multiplexer with LVDS parallel data and clock * inputs * On-chip 16 x 10 FIFO eliminates system timing issues * Lock detect * Core power supply: 1.8V I/O power supply: CML, LVDS and LVPECL at 1.8V * and CMOS at 1.8 or 3.3V * Power consumption: 580 mW typical @ 1.8V * Standard CMOS fabrication process * 15 x 15 mm, 120-pin BGA package O F B E N E F I T S Compliant with Optical Internetworking Forum * (OIF), Telcordia, ITU-T, and IEEE 802.3ae industry standards. * Reduces design cycle and time to market. High level of integration allows for higher port density * solutions. CMOS-based device uses the most effective silicon * economy of scale. Low-power consumption eliminates the need for * external cooling sources. * Target applications: * Ethernet transmission equipment * Optical modules * ADD/DROP multiplexers * Digital cross-connects * ATM switch backbones * Test equipment * Switch router backbones * Hubs and repeaters * Network Interface Cards (NIC) BCM8130 BCM8131 OTX ORX ORX OTX BCM8131 BCM8130 Network Interface Processor Network Interface Processor Application Block Diagram B C M 8 1 3 0 O V E R V I E W Block Diagram CLK16IP Write Pointer LVDS Parallel Input Bus DI15P DI15N TSDP TSDN TSCKP TSCKN Read Pointer SEL10GED SELFECB REF155EN REFCLKN Output Retime RB_LD LVPECL Reference Clock REFCLKP CML Serial Outputs 16:1 MUX DI0N INPUT REGISTER CLK16IN DI0P OVF FIFO Control 16 X 10 FIFO RESET LVDS Reference Clock Output DIVIDE-BY-16 Multi-rate CMU LVPECL Reference Clock CLK16OP CLK16ON LCKDET IFSEL VCP VCN The BCM8130 is a fully integrated multi-rate SONET/SDH/10GE transmitter operating at OC-192/STM-64 (9.953 Gbps), 10-Gigabit Ethernet (10.3125 Gbps), and FEC (Forward Error Correction) data rates (10.664 and 10.790 Gbps) with serializer, and CMU. The low-jitter LVDS interface and the onboard low-jitter PLL meets Optical Internetworking Forum (OIF), IEEE 802.3ae, Telcordia, ANSI, and ITU-T jitter standards. The BCM8130 reference clock input frequency is user-selectable to the line rate divided by either 16 or 64. A 10-word FIFO decouples the parallel input timing domain from the serial output timing domain. The BCM8130 provides a CML serial output clock to retime the data at the optical interface. The major transmitter functions are: * Configurable multi-rate CMU and data rates * CML transmit serial data output * 16-bit parallel LVDS input * Selectable reference clock frequencies * Parallel-to-serial conversion * Elastic buffering FIFO with overflow indicator * Lock detect Broadcom(R), the pulse logo(R) and Connecting EverythingTM are trademarks of Broadcom Corporation and/or its subsidiaries in the United States and certain other countries. All other trademarks are the property of their respective owners. BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013 (c) 2002 by BROADCOM CORPORATION. All rights reserved. 8130-PB02-R-4.1.02 Phone: 949-450-8700 FAX: 949-450-8710 Email: info@broadcom.com Web: www.broadcom.com