VN920 Single channel high-side solid-state relay Features Type RDS(on) IOUT VCC VN920 VN920-B5 VN920SO 16 m 30 A 36 V u d o r P e CMOS compatible input Proportional load current sense Shorted load protection Under-voltage and over-voltage shutdown Over-voltage clamp Thermal shutdown Current limitation Protection against loss of ground and loss of VCC Very low standby power dissipation Reverse battery protected (see Application schematic ) SO-16L P e t e l o s b O Table 1. t e l o Description ) (s t c u d o r ) s ( ct P2PAK PENTAWATT s b O The VN920 is a monolithic device designed in STMicroelectronics VIPower M0-3 technology. The VN920 is intended for driving any type of load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against over-load. The device integrates an analog current sense output which delivers a current proportional to the load current. The device automatically turns off in the case where the ground pin becomes disconnected. Device summary Order codes Package Tube Tape and reel VN920 - P PAK VN920-B5 VN920-B513TR SO-16L VN920SO VN920SO13TR PENTAWATT 2 September 2013 DocID7371 Rev 6 1/34 www.st.com 34 Contents VN920 Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 r P e 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17 t e l o 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 P2PAK maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 18 3.5 SO-16L maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . 19 ) (s s b O t c u Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 s b O d o r 4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P e t e l o 5 2/34 u d o Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 6 ) s ( ct Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 SO-16L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.5 PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.6 P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 VN920 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC=13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Current sense (9V VCC 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SO-16L thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P2PAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 3/34 List of figures VN920 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Over-voltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 P2PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-16L maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SO-16L Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . 20 SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 21 P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P2PAK Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . 23 P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 23 Thermal fitting model of a single channel HSD in P2PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 SO-16L tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 P2PAK tape and reel (suffix "13TR"). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 ) s ( ct u d o r P e t e l o ) (s t c u t e l o P e s b O 4/34 d o r s b O VN920 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND ) s ( ct Power CLAMP DRIVER du LOGIC INPUT o r P CURRENT LIMITER VDS LIMITER IOUT e t e ol OVERTEMPERATURE DETECTION Figure 2. ) (s t c u CURRENT SENSE K s b O Configuration diagram (top view) od e t e ol OUTPUT Pr 5 4 3 2 1 VCC OUTPUT C.SENSE VCC INPUT GND 1 16 OUTPUT GND OUTPUT INPUT OUTPUT C.SENSE N.C. OUTPUT OUTPUT OUTPUT N.C. VCC bs VCC N.C. 8 9 VCC P2PAK/ PENTAWATT SO-16L O Table 2. Suggested connections for unused and not connected pins Connection / pin Current Sense Floating To ground Through 1K resistor N.C. Output Input X X X X Through 10K resistor 5/34 Electrical specifications 2 VN920 Electrical specifications Figure 3. Current and voltage conventions IS VCC VF VCC IOUT OUTPUT IIN VOUT INPUT VIN ISENSE CURRENT SENSE ) s ( ct VSENSE GND IGND 2.1 u d o r P e t e l o Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document. Table 3. VCC ol bs O t c u Absolute maximum ratings od Pr Symbol ete ) (s s b O DC supply voltage SO-16L PENTAWATT P2PAK Unit 41 V - VCC Reverse DC supply voltage - 0.3 V - Ignd DC reverse ground pin current - 200 mA IOUT DC output current Internally limited A - 21 A +/- 10 mA -3 + 15 V V 4000 2000 5000 5000 V V V V - IOUT IIN Reverse DC output current DC input current VCSENSE Current sense maximum voltage VESD 6/34 Value Parameter Electrostatic discharge (human body model: R = 1.5K; C = 100pF) INPUT CURRENT SENSE OUTPUT VCC VN920 Electrical specifications Table 3. Absolute maximum ratings (continued) Value Symbol Parameter SO-16L EMAX Maximum switching energy (L = 0.25mH; RL= 0; Vbat = 13.5V; Tjstart = 150C; IL = 45A) 352 Ptot Power dissipation TC 25C 8.3 96.1 Tj Junction operating temperature Tc Case operating temperature - 40 to 150 Storage temperature - 55 to 150 Tstg 2.2 PENTAWATT Unit 364 mJ 96.1 W Internally limited C ) s ( ct C C u d o Thermal data Table 4. P2PAK r P e Thermal data t e l o Max. value Symbol Parameter PENTAWATT P2PAK - 1.3 1.3 15 - SO-16L 1. Rthj-case Thermalresistance junction-case Rthj-lead Thermalresistance junction-lead Rthj-amb Thermalresistance junction-ambient du ct ) (s s b O 65(1) 48(3) 61.3 Unit C/W C/W 51.3(2) C/W 37(4) C/W o r P When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick) connected to all VCC pins. 2. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). e t e ol 3. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35m thick) connected to all VCC pins. 4. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35m thick). s b O 7/34 Electrical specifications 2.3 VN920 Electrical characteristics Values specified in this section are for 8V < VCC < 36V; -40C < Tj < 150C, unless otherwise stated. Table 5. Power Symbol Parameter VCC Test conditions Min. Typ. Operating supply voltage 5.5 13 36 V VUSD Under-voltage shutdown 3 4 5.5 V VOV Over-voltage shutdown 36 RON On-state resistance ICC = 20mA Off-state; VCC = 13V; VIN = VOUT = 0V e t e ol Off-state; VCC = 13V; VIN = VOUT = 0V; Tj = 25C Supply current IS V IOUT = 10A; Tj = 25C; IOUT = 10A; IOUT = 3A; VCC = 6V VCLAMP Clamp voltage Off-state output current IL(off2) Off-state output current IL(off3) Off-state output current IL(off4) e t e ol Note: bs O 8/34 du o r P Off-state output current m m m du 41 48 55 V o r P 10 25 A 10 20 A 5 mA s b O 0 50 A VIN = 0V; VOUT = 3.5V -75 0 A VIN = VOUT = 0V; VCC = 13V; Tj = 125C 5 A VIN = VOUT = 0V; VCC = 13V; Tj = 25C 3 A )- s ( t c 16 32 55 ) s ( ct On-state; VCC = 13V; VIN = 5V; IOUT = 0A; RSENSE = 3.9 k IL(off1) Max. Unit VIN = VOUT = 0V VCLAMP and VOV are correlated. Typical difference is 5V. Table 6. Symbol Switching (VCC=13V) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 1.3 (see Figure 4.) 50 s td(off) Turn-off delay time RL = 1.3 (see Figure 4.) 50 s dVOUT/dt(on) Turn-on voltage slope RL = 1.3 (see Figure 4.) See Figure 10. V/s dVOUT/dt(off) Turn-off voltage slope RL = 1.3 (see Figure 4.) See Figure 12. V/s VN920 Electrical specifications Table 7. Logic inputs Symbol Parameter VIL Input low level voltage IIL Low level input current VIH Input high-level voltage IIH High-level input current VI(hyst) Input hysteresis voltage VICL K1 dK1/K1 K2 dK2/K2 K3 b O ISENSE0 VSENSE VSENSEH Typ. Unit 1.25 V A 3.25 V 10 0.5 IIN = 1mA IIN = - 1mA Test conditions IOUT/ISENSE IOUT = 1A; VSENSE = 0.5V; Tj = -40C...150C Current sense ratio drift IOUT = 1A; VSENSE = 0.5V; Tj= - 40C...150C IOUT/ISENSE IOUT = 10A; VSENSE = 4V; Tj = - 40C Tj= 25C...150C Current sense ratio drift IOUT = 10A; VSENSE = 4V; Tj = -40C...150C IOUT/ISENSE IOUT = 30A; VSENSE = 4V; Tj = -40C Tj = 25C...150C e t e l o s b O ) s ( t c u d o Max. 1 VIN = 3.25V Parameter Pr dK3/K3 Min. 6 6.8 - 0.7 8 Current sense ratio drift IOUT = 30A; VSENSE = 4V; Tj = -40C...150C Analog sense current VCC = 6...16V; IOUT = 0A; VSENSE = 0V; Tj = -40C...150C Max analog sense output voltage VCC = 5.5V; IOUT = 5A; RSENSE = 10k VCC > 8V, IOUT = 10A; RSENSE = 10k Sense voltage in over-temperature VCC = 13V; RSENSE = 3.9k condition o r P Typ. 4400 -10 4200 4400 -8 4200 4400 Max. % 6000 5750 +8 4900 4900 Unit 6000 +10 4900 4900 V V ) s ( ct du Min. 3300 A V Current sense (9V VCC 16V) Symbol e t e l VIN = 1.25V Input clamp voltage Table 8. so Test conditions % 5500 5250 -6 +6 % 0 10 A 2 V 4 V 5.5 V 9/34 Electrical specifications Table 8. Symbol VN920 Current sense (9V VCC 16V) (continued) Parameter Test conditions Min. Typ. Analog sense output VCC = 13V; Tj > TTSD; RVSENSEH impedance in output open over-temperature condition tDSENSE Current sense delay response Max. Unit 400 To 90% ISENSE(1) 500 s 1. Current sense signal delay after positive input slope. Table 9. Symbol Parameter Test conditions VF Forward on voltage - IOUT = 5A; Tj = 150C Table 10. Protections(1) Symbol Parameter TTSD TR Reset temperature Thyst Thermal hysteresis Current limitation Vdemag VON e t e ol s b O 10/34 o r P du Output voltage drop limitation o s b O ) s ( t c Turn-off output clamp voltage Min. VCC = 13V 5V < VCC < 36V Typ. u d o r P e let Test conditions Shutdown temperature Ilim ) s ( ct VCC output diode Max. Unit 0.6 V Min. Typ. Max. Unit 150 175 200 C 135 C 7 15 30 45 C 75 75 A A IOUT = 2 A; VIN = 0V; L = 6mH VCC - 41 VCC - 48 VCC - 55 V IOUT = 1 A; Tj = -40C...150C 50 mV 1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles. VN920 Electrical specifications Table 11. Truth table Conditions Input Output Sense Normal operation L H L H 0 Nominal Over-temperature L H L L 0 VSENSEH Under-voltage L H L L 0 0 Over-voltage L H L L 0 0 Short circuit to GND L H H L L L Short circuit to VCC L H H H Negative output voltage clamp L Table 12. Test pulse I 1 - 25V(1) 2 + 25V(1) Pr e t e l o s b 5 (1) - 25V + 25V - )II s b O 0 (1) 4V(1) + 26.5V(1) III IV Delays and impedance - 50V(1) - 75V(1) - 100V(1) 2ms, 10 + 50V(1) + 75V(1) + 100V(1) 0.2ms, 10 - 50V(1) 100V(1) - 150V(1) 0.1s, 50 + 50V(1) + 100V(1) 0.1s, 50 - 5V(1) 7V(1) 100ms, 0.01 t(s uc od 3a 4 t e l o L 0 < Nominal Test level 7637/1 3b u d o r P e Electrical transient requirements ISO T/R ) s ( ct 0 (Tj<TTSD) 0 (Tj>TTSD) VSENSEH + 46.5V(2) - + 75V(1) - 6V(1) + 66.5V(2) - + 86.5V(2) 400ms, 2 1. All functions of the device are performed as designed after exposure to disturbance. 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. O 11/34 Electrical specifications Figure 4. VN920 Switching characteristics VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% tr tf t ISENSE 90% t u d o tDSENSE INPUT td(on) ) s ( ct td(off) r P e t e l o Figure 5. ) (s IOUT/ISENSE versus IOUT IOUT/ISENSE d o r P e 5500 t e l o s b O s b O t c u 6500 6000 t max.Tj=-40C max.Tj=25...150C 5000 typical value min.Tj=25...150C 4500 min.Tj=-40C 4000 3500 3000 0 2 4 6 8 10 12 14 16 IOUT (A) 12/34 18 20 22 24 26 28 30 32 VN920 Electrical specifications Figure 6. Waveforms NORMAL OPERATION INPUT LOAD CURRENT SENSE UNDERVOLTAGE VCC VUSDhyst VUSD INPUT ) s ( ct LOAD CURRENT SENSE u d o OVERVOLTAGE r P e VOV VCC VOVhyst VCC > VUSD INPUT LOAD CURRENT SENSE t e l o s b O SHORT TO GROUND INPUT ) (s LOAD CURRENT LOAD VOLTAGE SENSE od r P e INPUT s b O t e l o t c u SHORT TO VCC LOAD VOLTAGE LOAD CURRENT SENSE <Nominal <Nominal OVERTEMPERATURE Tj TTSD TR INPUT LOAD CURRENT SENSE ISENSE= VSENSEH RSENSE 13/34 Electrical specifications VN920 2.4 Electrical characteristics curves Figure 7. Off-state output current Figure 8. High-level input current ) s ( ct Figure 9. u d o Input clamp voltage t e l o dVout/dt(on) (V/ms) Vicl (V) 10 700 9.5 650 bs Iin=1mA 9 O ) 8 7.5 s ( t c 7 6.5 6 du 5.5 5 -50 -25 0 o r P 25 50 75 Tc (C ) e t e l 100 125 150 175 550 500 450 400 350 300 250 -50 -25 0 25 50 75 100 125 150 175 150 175 Tc (C ) Figure 11. Over-voltage shutdown Figure 12. Turn-off voltage slope so Vov (V) dVout/dt(off) (V/ms) 50 550 48 500 46 450 Vcc=13V Rl=1.3Ohm 400 44 350 42 300 40 250 38 200 36 150 34 100 32 50 30 0 -50 -25 0 25 50 75 Tc (C ) 14/34 Vcc=13V Rl=1.3Ohm 600 8.5 b O r P e Figure 10. Turn-on voltage slope 100 125 150 175 -50 -25 0 25 50 75 Tc (C ) 100 125 VN920 Electrical specifications Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC Ilim (A) R on (mOhm) 100 50 90 45 Vcc=13V 80 40 70 35 60 30 50 25 40 20 30 15 20 10 10 5 0 Tc=150C Tc=25C Tc=- 40C -25 0 25 50 75 100 125 150 175 5 10 15 20 Tc (C ) 25 30 35 Vcc (V) Figure 15. Input high-level 40 u d o Figure 16. Input hysteresis voltage Vih (V) Vhyst (V) 3.6 1.5 r P e 1.4 3.4 t e l o 1.3 3.2 1.2 3 1.1 bs 2.8 2.6 2.4 ) s ( t 2.2 2 -50 -25 0 25 50 c u d 75 Tc (C ) 100 125 150 175 o r P Figure 17. On-state resistance vs Tcase R on (mOhm) e t e ol 50 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) Figure 18. Input low level Vil (V) 2.4 Iout=10A Vcc=8V; 36V 40 -O 1 0.9 2.6 45 s b O ) s ( ct 0 -50 2.2 35 2 30 1.8 25 20 1.6 15 1.4 10 1.2 5 1 0 -50 -25 0 25 50 75 Tc (C ) 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (C ) 15/34 Application information 3 VN920 Application information Figure 19. Application schematic +5V VCC Rprot INPUT Dld Rprot C ) s ( ct OUTPUT CURRENT SENSE RSENSE u d o GND VGND r P e RGND t e l o ) (s DGND s b O 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) t c u d o r This can be used with any type of load. P e The following is an indication on how to dimension the RGND resistor. 1. t e l o 2. s b O RGND 600mV / (IS(on)max). RGND (- VCC) / (- IGND) where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC < 0: during reverse battery situations) is: PD= (- VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high-side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 16/34 VN920 3.1.2 Application information Solution 2: diode (DGND) in the ground line A resistor (RGND = 1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift ( 600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. ) s ( ct Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 u d o Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. r P e 3.3 MCU I/Os protection t e l o s b O If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. ) (s The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. t c u d o r -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax P e Calculation example: t e l o For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V bs 5k Rprot 65k. Recommended values: Rprot =10k . O 17/34 Application information VN920 P2PAK maximum demagnetization energy (VCC = 13.5V) 3.4 Figure 20. P2PAK maximum turn-off current versus inductance ILMAX (A) 100 A B C 10 ) s ( ct u d o t e l o 1 0.01 0.1 r P e s b O 1 10 100 L(mH) ) (s t c u A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse d o r C: Tjstart = 125C repetitive pulse P e t e l o bs VIN, IL Demagnetization Demagnetization Demagnetization O t Note: 18/34 Values are generated with RL =0 .In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. VN920 3.5 Application information SO-16L maximum demagnetization energy (VCC = 13.5V) Figure 21. SO-16L maximum turn-off current versus inductance ) s ( ct u d o r P e t e l o ) (s s b O t c u A: Tjstart = 150C single pulse d o r B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse P e t e l o s b O VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL =0 .In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 19/34 Package and PCB thermal data VN920 4 Package and PCB thermal data 4.1 SO-16L thermal data Figure 22. SO-16L PC board ) s ( ct u d o r P e Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 41mm x 48mm, PCB thickness = 2mm, Cu thickness = 35m, Copper areas: 0.5cm2, 6cm2). t e l o Figure 23. SO-16L Rthj-amb Vs PCB copper area in open box free air condition 70 RTH j-amb (C/W) ) (s 65 s b O t c u 60 d o r 55 P e t e l o bs O 50 45 40 0 1 2 3 4 5 PCB Cu heatsink area (cm^2) 20/34 6 7 VN920 Package and PCB thermal data Figure 24. SO-16L thermal impedance junction ambient single pulse ) s ( ct u d o r P e t e l o ) (s Equation 1: pulse calculation formula s b O Z TH = R TH + Z THtp ( 1 - ) where t c u = tp T d o r P e Figure 25. Thermal fitting model of a single channel HSD in SO-16L s b O t e l o Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 21/34 Package and PCB thermal data Table 13. VN920 SO-16L thermal parameters Area / island (cm2) Footprint R1 (C/W) 0.02 R2 (C/W) 0.1 R3 (C/W) 2.2 R4 (C/W) 12 R5 (C/W) 15 R6 (C/W) 35 C1 (W.s/C) 0.0015 C2 (W.s/C) 7E-03 C3 (W.s/C) 1.5E-02 C4 (W.s/C) 0.14 C5 (W.s/C) 1 P2PAK thermal data Figure 26. P2PAK PC board ) (s 20 5 ) s ( ct u d o r P e C6 (W.s/C) 4.2 6 8 t e l o s b O t c u d o r P e s b O t e l o Note: 22/34 Layout condition of Rth and Zth measurements (PCB FR4 area = 60mm x 60mm, PCB thickness = 2 mm, Cu thickness = 35m , Copper areas: 0.97cm2, 8cm2). VN920 Package and PCB thermal data Figure 27. P2PAK Rthj-amb Vs. PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 ) s ( ct 35 u d o r P e 30 0 2 4 6 t e l o 8 10 PCB Cu heatsink area (cm^2) ) (s s b O Figure 28. P2PAK thermal impedance junction ambient single pulse ZTH (C /W) 1000 100 t c u d o r 0.97 cm2 P e s b O t e l o 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 23/34 Package and PCB thermal data VN920 Equation 2: pulse calculation formula Z TH = R TH +Z THtp ( 1 - ) where = tP/T Figure 29. Thermal fitting model of a single channel HSD in P2PAK ) s ( ct u d o r P e Area/island (cm2) R1 (C/W) )- s ( t c R2 (C/W) so b O 24/34 6 0.02 0.1 0.22 R4 (C/W) 4 R5 (C/W) 9 R6 (C/W) 37 C1 (W*s/C) 0.0015 C2 (W*s/C) 0.007 C3 (W*s/C) 0.015 C4 (W*s/C) 0.4 C5 (W*s/C) 2 C6 (W*s/C) 3 ro P e 0.97 du R3 (C/W) let s b O P2PAK thermal parameter Table 14. t e l o 22 5 VN920 Package and packing information 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Figure 30. SO-16L package dimensions ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e s b O t e l o Table 15. SO-16L mechanical data mm. DIM. Min. Typ. A a1 Max. 2.65 0.1 0.2 a2 2.45 b 0.35 0.49 b1 0.23 0.32 C 0.5 c1 45 (typ.) 25/34 Package and packing information Table 15. VN920 SO-16L mechanical data (continued) mm. DIM. Min. Typ. Max. D 10.1 10.5 E 10.0 10.65 e 1.27 e3 8.89 F 7.4 L 0.5 7.6 M S 5.2 PENTAWATT mechanical data t c u d o r t e l o s b O 26/34 r P e t e l o Figure 31. PENTAWATT package dimensions P e u d o 8 (max.) ) (s ) s ( ct 1.27 s b O 0.75 VN920 Package and packing information Table 16. PENTAWATT mechanical data mm Dim. Min. Typ. A 4.8 C 1.37 D 2.4 2.8 D1 1.2 1.35 E 0.35 0.55 F 0.8 F1 1 G 3.2 3.4 G1 6.6 6.8 H3 ete bs L -O (s) L2 ct L3 du L5 o r P L6 s b O L7 ol 10.05 L1 Pr u d o 1.4 3.6 7 10.4 10.4 17.85 15.75 21.4 22.5 2.6 3 15.1 15.8 6 6.6 M 4.5 M1 4 Diam. ) s ( ct 1.05 H2 e t e ol Max. 3.65 3.85 27/34 Package and packing information VN920 P2PAK mechanical data 5.3 Figure 32. P2PAK package dimensions ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 28/34 P010R VN920 Package and packing information P2PAK mechanical data Table 17. mm Dim. Min. Typ. A 4.30 4.80 A1 2.40 2.80 A2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 D 8.95 10.00 e t e ol E1 8.50 e 3.20 e1 6.60 L 13.70 (s) L2 ct L3 du L5 V2 Package weight Pr bs -O 9.35 10.40 3.60 7.00 14.50 1.25 1.40 0.90 1.70 1.55 2.40 ro P e u d o 8.00 E R ) s ( ct 1.37 D2 t e l o Max. 0.40 0 8 1.40 Gr (typ) s b O 29/34 Package and packing information 5.4 VN920 SO-16L packing information Figure 33. SO-16L tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) C B 50 1000 532 3.5 13.8 0.6 All dimensions are in mm. A ) s ( ct Figure 34. SO-16L tape and reel shipment (suffix "TR") u d o Reel dimensions r P e Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) t e l o ) (s t c u Tape dimensions s b O 1000 1000 330 1.5 13 20.2 16.4 60 22.4 According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 d o r Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing P e t e l o s b O W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) All dimensions are in mm. 16 4 12 1.5 1.5 7.5 6.5 2 End Start Top cover tape No components Components Empty components pockets saled with cover tape. User direction of feed 30/34 No components 500mm min 500mm min VN920 5.5 Package and packing information PENTAWATT packing information Figure 35. PENTAWATT tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) B C 50 1000 532 18 33.1 1 ) s ( ct All dimensions are in mm. A u d o r P e P2PAK packing information 5.6 t e l o Figure 36. P2PAK tube shipment (no suffix) ) (s B t c u C od r P e s b O Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) 50 1000 532 18 33.1 1 All dimensions are in mm. A t e l o s b O 31/34 Package and packing information VN920 Figure 37. P2PAK tape and reel (suffix "13TR") REEL DIMENSIONS All dimensions are in mm. Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 ) s ( ct TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 12 1.5 1.5 11.5 6.5 2 All dimensions are in mm. s ( t c u d o t e l o s b O 32/34 r P e t e l o s b O End )- r P e u d o Top cover tape Start No components Components No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min VN920 6 Revision history Revision history Table 18. Document revision history Date Revision 22-Jun-2004 1 Initial release. 2 Current and voltage convention update (page 2). Configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 2). 6cm2 Cu condition insertion in thermal data table (page 3). 09-Jul-2004 3 VCC - output diode section update (page 5). Protections note insertion (page 5). Revision history table insertion (page 24). Disclaimers update (page 25). 03-May-2006 4 Suggested connections for unused and n.c.pins? correction (page 2). 17-Dec-2008 5 Document reformatted and restructured. Added content, list of figures and tables. Added ECOPACK(R) packages information. Updated Figure 37.: P2PAK tape and reel (suffix "13TR"): changed component spacing (P) in tape dimensions table from 16 mm to 12 mm. 24-Sep-2013 6 Updated Disclaimer. 07-Jul-2004 Changes ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 33/34 VN920 ) s ( ct Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. u d o r P e All ST products are sold pursuant to ST's terms and conditions of sale. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 34/34 DocID7371 Rev 6