6N137 ICPL2601 HIGH CMR, VERY HIGH SPEED OPTICALLY COUPLED ISOLATOR LOGIC GATE OUTPUT APPROVALS l UL recognised, File No. E91231 DESCRIPTION The 6N137 / ICPL2601 optocouplers consist of a GaAsP light emitting diode and a high gain integrated photo detector to provide 2500Volts RMS electrical isolation between input and output. An enable input allows the detector to be strobed. The output of the detector I.C. is an open collector Schottky clamped transistor. The ICPL2601 has an internal shield which provides a guaranteed common mode transient immunity specification of 1000V/s minimum.This unique design provides maximum ac and dc circuit isolation while achieving TTL compatibility. The coupled parameters are guaranteed over the temperature range of 0C to 70C, such that a maximum input signal of 5mA will provide a minimum output sink current of 13mA(equivalent to fan-out of eight gates) FEATURES l High speed - 10MBit/s l High Common Mode Transient Immunity 10kV/s typical l Logic gate output l ICPL2601 has improved noise shield for superior common mode rejection l Options :10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. APPLICATIONS l Line receiver, data transmission l Computer-peripheral interface l Data multiplexing l Pulse transformer replacement OPTION SM OPTION G 7.62 SURFACE MOUNT 1.2 0.6 10.2 9.5 1.4 0.9 0.3 10.16 ISOCOM COMPONENTS LTD Unit 25B, Park View Road West, Park View Industrial Estate, Brenda Road Hartlepool, TS25 1YD England Tel: (01429)863609 Fax : (01429) 863581 e-mail sales@isocom.co.uk http://www.isocom.com 19/4/99 Dimensions in mm 2.54 VCC 6.9 6.3 1 8 2 7 4 1.3 6 3 * 5GND * ICPL2601 NOISE SHIELD 9.7 9.1 7.62 4.0 3.6 0.5 3.3 0.5 15 Max 0.3 1.3 TRUTH TABLE INPUT ENABLE OUTPUT H H L L H H H L H L L H A 0.1F bypass capacitor must be connected between pins 8 and 5 ( See note 1) ABSOLUTE MAXIMUM RATINGS (25C unless otherwise specified) Storage Temperature -55C to + 125C Operating Temperature 0C to + 70C Lead Soldering Temperature (1/16 inch (1.6mm) from case for 10 secs) 260C INPUT DIODE Average Forward Current Reverse Voltage 20mA 5V DETECTOR Enable Input Voltage ( VE ) (not to exceed VCC by more than 500mV) Reverse Supply Voltage(-VCC ) Supply Voltage(VCC ) (1 minute maximum) Output Current ( IO ) Output Voltage ( VO ) Collector Output Power Dissipation 5.5V -500mV 7V 25mA 7V 40mW ISOCOM INC 1024 S. Greenville Ave, Suite 240, Allen, TX 75002 USA Tel: (214) 495-0755 Fax: (214) 495-0901 e-mail info@isocom.com http://www.isocom.com DB91063-AAS/A1 ELECTRICAL CHARACTERISTICS ( TA= 0C to 70C Unless otherwise noted ) PARAMETER SYM DEVICE MIN TYP* MAX UNITS TEST CONDITION High Level Output Current IOH 0.02 250 A VCC = 5.5V, VO = 5.5V IF = 250A, VE = 2V Low Level Output Voltage VOL 0.4 0.6 V VCC = 5.5V, IF = 5mA VE = 2V IOL (sinking ) = 13mA High Level Supply Current ICCH 10 15 mA VCC = 5.5V, IF = 0mA VE = 0.5V Low Level Supply Current ICCL 15 18 mA VCC = 5.5V, IF = 10mA VE = 0.5V High Level Enable Current IEH -1.0 mA VCC = 5.5V, VE = 2V Low Level Enable Current IEL -1.5 mA VCC = 5.5V, VE = 0.5V High Level Enable Voltage (note 10) VEH V VCC = 5.5V, IF = 10mA Low Level Enable Voltage VEL 0.8 V VCC = 5.5V, IF = 10mA Input Forward Voltage VF 1.75 V IF = 10mA, TA = 25oC Input Reverse Breakdown Voltage VBR V IR = 10A, TA = 25oC Input Capacitance CIN 60 pF VF = 0, f = 1MHz Temperature Coefficient of Forward Voltage V F TA -1.4 mV/C IF = 10mA Input-output Isolation Voltage (note 3) VISO 5000 VRMS R.H.equal to or less than 50%, t = 1min, TA= 25C A R.H. = 45% t = 5s, TA= 25C VI-O = 3000V dc -2.0 2 1.55 5 2500 Input-output Insulation Leakage II-O Current (note 3) 1 Resistance (Input to Output) (note 3) RI-O 1012 VI-O = 500V dc Capacitance (Input to Output) (note 3) CI-O 0.6 pF f = 1MHz * All typicals at TA= 25C RECOMMMENDED OPERATING CONDITIONS PARAMETER 19/4/99 SYMBOL MIN MAX UNITS Input Current, Low Level IFL 0 250 A Input Current, High Level IFH 6.3* 15 mA Supply Voltage, Output VCC 4.5 5.5 V Enable Voltage, Low Level VEL 0 0.8 V Enable Voltage, High Level VEH 2.0 VCC V Fan Out ( TTL Load ) N Operating Temperature TA *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less 8 0 70 C DB91063-AAS/A1 SWITCHING SPECIFICATIONS AT TA = 25C ( VCC = 5V, IF = 7.5mA Unless otherwise noted ) PARAMETER Propagation Delay Time to Logic Low at Output ( fig 1 )( note4 ) SYM DEVICE MIN TYP MAX UNITS TEST CONDITION tPHL 55 75 ns RL = 350, CL = 15pF Propagation Delay Time to Logic High at Output ( fig 1 )( note5 ) tPLH 45 75 ns RL = 350, CL = 15pF Propagation Delay Time of Enable from VEH to VEL ( note6 ) tEHL 14 ns RL = 350, CL = 15pF VEL = 0V, VEH = 3V Propagation Delay Time of Enable from VEL to VEH ( note7 ) tELH 25 ns RL = 350, CL = 15pF VEL = 0V, VEH = 3V Common Mode Transient Immunity at Logic High Level Output ( fig 2 )( note8 ) CMH 6N137 ICPL2601 10000 1000 10000 V/s V/s IF = 0mA, VCM = 50VPP RL= 350,VOH= 2Vmin. Common Mode Transient Immunity at Logic Low Level Output ( fig 2 )( note9 ) CML 6N137 -10000 ICPL2601 -1000 -10000 V/s V/s VCM= 50VPP RL=350,VOL=0.8Vmax. NOTES:1 Bypassing of the power supply line is required, with a 0.01F ceramic disc capacitor adjacent to each isolator. The power supply bus for the isolator(s) should be seperate from the bus for any active loads. Otherwise a larger value of bypass capacitor (up to 0.1F) may be needed to supress regenerative feedback via the power supply. 2 Peaking circuits may produce transient input currents up to 50mA, 50ns maximum pulse width, provided average current does not exceed 20mA. 3 Device considered a two terminal device; pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7 and 8 shorted together. 4 The tPHL propagation delay is measured from the 3.75 mA level Low to High transition of the input current pulse to the 1.5V level on the High to Low transition of the output voltage pulse. 5 The tPLH propagation delay is measured from the 3.75mA level High to Low transition of the input current pulse to the 1.5V level on the Low to High transition of the output voltage pulse. 6 The tEHL enable input propagation delay is measured from the 1.5V level on the Low to High transition of the enable input voltage pulse to the 1.5V level on the High to Low of the output voltage pulse. 7 The tELH enable input propagation delay is measured from the 1.5V level on the High to Low transition of the enable input voltage pulse to the 1.5V level on the Low to High of the output voltage pulse. 8 CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (ie Vout > 2.0V). 9 CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (ie Vout < 0.8V) 10 No external pull up is required for a high logic state on the enable input. FIG.1 SWITCHING TEST CIRCUIT IF PULSE GENERATOR ZO = 50 tr = 5ns 0 VO 5V 1.5V tPHL tPLH 1.5V VOL IF 10% Duty Cycle 1/f < 100s IF Monitor 100 19/4/99 1 8 2 7 3 6 4 5 5V RL VO CL = 15pF DB91063-AAS/A1 FIG. 2 TEST CIRCUIT FOR TRANSIENT IMMUNITY AND TYPICAL WAVEFORMS VCM 0V IF 10V 10% 90% 10% tr 90% VCC 8 2 7 3 6 4 5 A tf 5V VO VO 1 SWITCH AT A: IF = 0mA VOL B VFF 5V RL VO VCM + SWITCH AT B: IF = 7.5mA - PULSE GEN. Output Voltage vs. Forward Input Current Forward Current vs. Forward Voltage 9 10 4 TA = 25C 7 2 1 Output voltage V O (V) Forward current I F (mA) VCC = 5V TA = 25C 8 0.4 0.2 0.1 0.04 0.02 0.01 1.0 6 5 4 RL = 1k 3 2 1 1.2 1.4 0 1.6 0 1 2 3 4 5 Forward input current IF (mA) Forward voltage VF (V) High level output current I OH ( A ) Low level output voltage V OL (V) 1.0 VCC = 5.5V VE = 2V IF = 5mA 0.7 0.6 0.5 IO = 16mA 0.4 IO = 12.8mA 0.3 0.2 IO = 6.4mA IO = 9.6mA 0.1 0 0 19/4/99 10 20 30 40 50 60 Ambient temperature TA ( C ) 6 High Level Output Current vs. Ambient Temperature Low Level Output Voltage vs. Ambient Temperature 0.8 RL = 350 70 VCC = 5.5V VO = 5.5V VE = 2V IF = 250A 0.4 0.2 0.1 0.04 0.02 0.01 0.004 0.002 0.001 0 10 20 30 40 50 60 Ambient temperature TA ( C ) 70 DB91063-AAS/A1