19/4/99
DB91063-AAS/A1
6N137
ICPL2601
HIGH CMR, VERY HIGH SPEED
OPTICALLY COUPLED ISOLATOR
LOGIC GATE OUTPUT
ABSOLUTE MAXIMUM RATINGS
(25°C unless otherwise specified)
Storage Temperature -55°C to + 125°C
Operating Temperature 0°C to + 70°C
Lead Soldering Temperature
(1/16 inch (1.6mm) from case for 10 secs) 260°C
INPUT DIODE
Average Forward Current 20mA
Reverse Voltage 5V
DETECTOR
Enable Input Voltage ( VE )5.5V
(not to exceed VCC by more than 500mV)
Reverse Supply Voltage(-VCC ) -500mV
Supply Voltage(VCC ) 7V
(1 minute maximum)
Output Current ( IO ) 25mA
Output Voltage ( VO ) 7V
Collector Output Power Dissipation 40mW
APPROVALS
lUL recognised, File No. E91231
DESCRIPTION
The 6N137 / ICPL2601 optocouplers consist of
a GaAsP light emitting diode and a high gain
integrated photo detector to provide 2500Volts RMS
electrical isolation between input and output. An
enable input allows the detector to be strobed.
The output of the detector I.C. is an open
collector Schottky clamped transistor. The
ICPL2601 has an internal shield which provides
a guaranteed common mode transient immunity
specification of 1000V/µs minimum.This unique
design provides maximum ac and dc circuit
isolation while achieving TTL compatibility. The
coupled parameters are guaranteed over the
temperature range of 0°C to 70°C, such that a
maximum input signal of 5mA will provide a
minimum output sink current of 13mA(equivalent
to fan-out of eight gates)
FEATURES
lHigh speed - 10MBit/s
lHigh Common Mode Transient
Immunity 10kV/µs typical
lLogic gate output
lICPL2601 has improved noise shield
for superior common mode rejection
lOptions :-
10mm lead spread - add G after part no.
Surface mount - add SM after part no.
Tape&reel - add SMT&R after part no.
APPLICATIONS
lLine receiver, data transmission
lComputer-peripheral interface
lData multiplexing
lPulse transformer replacement
0.3
0.5
Dimensions in mm
6.9
6.3
1.3
15°
Max
3.3
4.0
3.6
2.54
9.7
9.1
0.5 1.3
* ICPL2601 NOISE SHIELD
7.62
4
3
2
18
7
6
5
*
OPTION GOPTION SM
10.16
10.2
9.5
0.3
1.2
0.6 1.4
0.9
7.62
SURFACE MOUNT
INPUT ENABLE OUTPUT
HHL
LH H
HLH
LLH
TRUTH TABLE A 0.1µF bypass
capacitor must be
connected between
pins 8 and 5 ( See
note 1)
VCC
GND
ISOCOM INC
1024 S. Greenville Ave, Suite 240,
Allen, TX 75002 USA
Tel: (214) 495-0755 Fax: (214) 495-0901
e-mail info@isocom.com
http://www.isocom.com
ISOCOM COMPONENTS LTD
Unit 25B, Park View Road West,
Park View Industrial Estate, Brenda Road
Hartlepool, TS25 1YD England Tel: (01429)863609
Fax : (01429) 863581 e-mail sales@isocom.co.uk
http://www.isocom.com
DB91063-AAS/A1
19/4/99
ELECTRICAL CHARACTERISTICS ( TA= 0°C to 70°C Unless otherwise noted )
PARAMETER SYM DEVICE MIN TYP* MAX UNITS TEST CONDITION
High Level Output Current IOH 0.02 250 µAVCC = 5.5V, VO = 5.5V
IF = 250µA, VE = 2V
Low Level Output Voltage VOL 0.4 0.6 V VCC = 5.5V, IF = 5mA
VE = 2V
IOL (sinking ) = 13mA
High Level Supply Current ICCH 10 15 mA VCC = 5.5V, IF = 0mA
VE = 0.5V
Low Level Supply Current ICCL 15 18 mA VCC = 5.5V, IF = 10mA
VE = 0.5V
High Level Enable Current IEH -1.0 mA VCC = 5.5V, VE = 2V
Low Level Enable Current IEL -1.5 -2.0 mA VCC = 5.5V, VE = 0.5V
High Level Enable Voltage VEH 2V VCC = 5.5V, IF = 10mA
(note 10)
Low Level Enable Voltage VEL 0.8 V VCC = 5.5V, IF = 10mA
Input Forward Voltage VF1.55 1.75 VIF = 10mA, TA = 25oC
Input Reverse Breakdown Voltage VBR 5VIR = 10µA, TA = 25oC
Input Capacitance CIN 60 pF VF = 0, f = 1MHz
Temperature Coefficient ∆VF-1.4 mV/°C IF = 10mA
of Forward Voltage ∆TA
Input-output Isolation Voltage VISO 2500 5000 VRMS R.H.equal to or less than
(note 3) 50%, t = 1min, TA= 25°C
Input-output Insulation Leakage II-O 1µAR.H. = 45%
Current (note 3) t = 5s, TA= 25°C
VI-O = 3000V dc
Resistance (Input to Output) RI-O 1012 ΩVI-O = 500V dc
(note 3)
Capacitance (Input to Output) CI-O 0.6 pF f = 1MHz
(note 3)
* All typicals at TA= 25°C
RECOMMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN MAX UNITS
Input Current, Low Level IFL 0250 µA
Input Current, High Level IFH 6.3* 15 mA
Supply Voltage, Output VCC 4.5 5.5 V
Enable Voltage, Low Level VEL 00.8 V
Enable Voltage, High Level VEH 2.0 VCC V
Fan Out ( TTL Load ) N8
Operating Temperature TA070 °C
*6.3mA is a guard banded
value which allows for at least
20% CTR degradation.
Initial input current threshold
value is 5.0mA or less
SWITCHING SPECIFICATIONS AT TA = 25°C ( VCC = 5V, IF = 7.5mA Unless otherwise noted )
PARAMETER SYM DEVICE MIN TYP MAX UNITS TEST CONDITION
Propagation Delay Time
to Logic Low at Output tPHL 55 75 ns RL = 350Ω, CL = 15pF
( fig 1 )( note4 )
Propagation Delay Time
to Logic High at Output tPLH 45 75 ns RL = 350Ω, CL = 15pF
( fig 1 )( note5 )
Propagation Delay Time
of Enable from VEH to VEL tEHL 14 ns RL = 350Ω, CL = 15pF
( note6 ) VEL = 0V, VEH = 3V
Propagation Delay Time
of Enable from VEL to VEH tELH 25 ns RL = 350Ω, CL = 15pF
( note7 ) VEL = 0V, VEH = 3V
Common Mode Transient
Immunity at Logic High CMH6N137 10000 V/µsIF = 0mA, VCM = 50VPP
Level Output ( fig 2 )( note8 ) ICPL2601 1000 10000 V/µsRL= 350Ω,VOH= 2Vmin.
Common Mode Transient
Immunity at Logic Low CML6N137 -10000 V/µsVCM= 50VPP
Level Output ( fig 2 )( note9 ) ICPL2601 -1000 -10000 V/µsRL=350Ω,VOL=0.8Vmax.
NOTES:-
1Bypassing of the power supply line is required, with a 0.01µF ceramic disc capacitor adjacent to
each isolator. The power supply bus for the isolator(s) should be seperate from the bus for any
active loads. Otherwise a larger value of bypass capacitor (up to 0.1µF) may be needed to supress
regenerative feedback via the power supply.
2Peaking circuits may produce transient input currents up to 50mA, 50ns maximum pulse width,
provided average current does not exceed 20mA.
3Device considered a two terminal device; pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7
and 8 shorted together.
4The tPHL propagation delay is measured from the 3.75 mA level Low to High transition of the input
current pulse to the 1.5V level on the High to Low transition of the output voltage pulse.
5The tPLH propagation delay is measured from the 3.75mA level High to Low transition of the input
current pulse to the 1.5V level on the Low to High transition of the output voltage pulse.
6The tEHL enable input propagation delay is measured from the 1.5V level on the Low to High transition of
the enable input voltage pulse to the 1.5V level on the High to Low of the output voltage pulse.
7The tELH enable input propagation delay is measured from the 1.5V level on the High to Low transition of
the enable input voltage pulse to the 1.5V level on the Low to High of the output voltage pulse.
8CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output
will remain in a high logic state (ie Vout > 2.0V).
9CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output
will remain in a low logic state (ie Vout < 0.8V)
10 No external pull up is required for a high logic state on the enable input.
DB91063-AAS/A1
19/4/99
FIG.1 SWITCHING TEST CIRCUIT
2
IF Monitor
0
IF
VO1.5V
100Ω
1.5V
5V
tPHL tPLH VOL
RL
VO
CL = 15pF
8
7
6
5
PULSE
GENERATOR
ZO = 50Ω
tr = 5ns
IF
1
4
3
10% Duty Cycle
1/f < 100µs
5V
DB91063-AAS/A1
19/4/99
FIG. 2 TEST CIRCUIT FOR TRANSIENT IMMUNITY AND TYPICAL WAVEFORMS
1
3
4
+-
A
PULSE GEN.
VCM
0V
VCM
IF
VFF
5V
5V
VOL
VO
VO
SWITCH AT A: IF = 0mA
SWITCH AT B: IF = 7.5mA
10V
10%
90% 10%
90%
trtf
B
8
7
6
5
2RL
VO
Output voltage VO (V)
Output Voltage vs.
Forward Input Current
1.0 1.2 1.4 1.6
Forward current I F (mA)
Forward Current vs. Forward
Voltage
Forward voltage VF (V)
Low Level Output Voltage vs.
Ambient Temperature
Low level output voltage VOL (V)
Ambient temperature TA ( °C )
0 10 20 30 40 50 60 70
High level output current I OH (
µ
A )
0 1 2 3 4 5 6
Forward input current IF (mA)
High Level Output Current vs.
Ambient Temperature
0.01
0.1
0.02
0.04
0.2
0.4
1
2
4
10
TA = 25°C
00.001
0.002
0.004
0.01
0.02
0.04
0.1
0.2
0.4
1.0
VCC = 5V
TA = 25°C
0
1
2
3
4
5
6
7
8
9
VCC
RL = 1kΩRL = 350Ω
VCC = 5.5V
VE = 2V
IF = 5mA
IO = 12.8mA
IO = 16mA
IO = 6.4mA IO = 9.6mA
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 VCC = 5.5V
VO = 5.5V
VE = 2V
IF = 250µA
0 10 20 30 40 50 60 70
Ambient temperature TA ( °C )
