XRP6124 Non-Synchronous PFET Step-Down Controller May 2018 Rev. 1.1.1 GENERAL DESCRIPTION APPLICATIONS * Point of Load Conversions The XRP6124 is a non synchronous step down (buck) controller for up to 5Amps point of loads. A wide 3V to 30V input voltage range allows for single supply operations from industry standard 3.3V, 5V, 12V and 24V power rails. * Audio-Video Equipment * Industrial and Medical Equipment * Distributed Power Architecture With a proprietary Constant On-Time (COT) control scheme, the XRP6124 provides extremely fast line and load transient response while the operating frequency remains nearly constant. It requires no loop compensation hence simplifying circuit implementation and reducing overall component count. The XRP76124 also implements an emulated ESR circuitry allowing usage of ceramic output capacitors and insuring stable operations without the use of extra external components. FEATURES * 5A Point-of-Load Capable - Down to 1.2V Output Voltage Conversion * Wide Input Voltage Range - 3V to 18V: XRP6124 - 4.5V to 30V: XRP6124HV * Constant On-Time Operations - Constant Frequency Operations - No External Compensation Built-in soft start prevents high inrush currents while under voltage lock-out and output short protections insure safe operations under abnormal operating conditions. - Supports Ceramic Output Capacitors * Built-in 2ms Soft Start * Short Circuit Protection The XRP6124 is available in a RoHS compliant, green/halogen free space-saving 5-pin SOT23 package. * <1A shutdown current * RoHS Compliant, Green/Halogen Free 5-pin SOT23 Package TYPICAL APPLICATION DIAGRAM Figure 1: XRP6124 Application Diagram 1/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller ABSOLUTE MAXIMUM RATINGS OPERATING RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Input Voltage Range VIN (XRP6124)................ 3.0V to 18V Input Voltage Range VIN (XRP6124HV)............ 4.5V to 30V Junction Temperature Range ....................-40C to 125C Thermal Resistance JA .....................................191C/W VIN (XRP6124) ............................................ -0.3V to 20V VIN (XRP6124HV) ........................................ -0.3V to 32V GATE ...................................................... VIN-GATE<8V FB, EN ..................................................... -0.3V to 5.5V Storage Temperature .............................. -65C to 150C Power Dissipation ................................ Internally Limited Lead Temperature (Soldering, 10 sec) ................... 300C ESD Rating (HBM - Human Body Model) .................... 2kV ELECTRICAL SPECIFICATIONS Specifications are for an Operating Junction Temperature of TJ = 25C only; limits applying over the full Operating Junction Temperature range are denoted by a "*". Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25C, and are provided for reference purposes only. Unless otherwise indicated, VIN = 3.0V to 18V, TJ = -40C to 125C. Min. Typ. Max. Units UVLO Turn-On Threshold Parameter 2.5 2.8 3.0 V * XRP6124 UVLO Turn-On Threshold 3.8 4.2 4.5 V * XRP6124HV XRP6124 UVLO Hysteresis Operating Input Voltage Range 0.1 Conditions V 3.0 18 V * 4.5 30 V * 3 A EN=0V, VIN=12V VFB=1.2V and after fault Shutdown VIN Current 1.5 Operating VIN Current XRP6124HV 0.5 1 mA 0.792 0.8 0.808 V 0.784 0.8 0.816 V * 0.50 0.55 0.65 V * TON, Switch On-Time 0.4 0.5 0.6 s * VIN=12V, XRP6124 TON, Switch On-Time 0.4 0.5 0.6 s * VIN=24V, XRP6124HV 250 350 ns * VIN=12V Reference Voltage VSC_TH, Feedback pin Short Circuit Latch Threshold TOFF_MIN, Minimum Off-Time Soft Start Time EN Turn-On Threshold 2 ms 2 V EN Turn-Off Threshold EN Bias Current Gate Driver Pull-Down Resistance Gate Driver Pull-up Resistance 1 V 0.01 0.1 A 6 9 5 8 tr, gate rise time 45 ns tf, gate fall time 35 ns VIN - GATE voltage difference 5.5 VIN - GATE voltage difference 2.6 6.4 8 2/12 CGATE=1nF CGATE=1nF V * VIN=12V V * VIN=3.0V Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller BLOCK DIAGRAM VREF 0.8V BIAS VIN Enable Improved COT with Emulated ESR GATE FB VIN-6V + 0.55V + - FAULT SS Done UVLO GND Figure 2: XRP6124 Block Diagram PIN ASSIGNMENT EN 1 GND 2 FB 3 5 VIN 4 GATE XRP6124 Figure 3: XRP6124 Pin Assignment PIN DESCRIPTION Name Pin Number Description EN 1 Enable Pin. Actively pull high to enable the part. GND 2 Ground FB 3 Feedback pin GATE 4 Gate Pin. Connect to gate of PFET. This pin pulls the gate of the PFET approximately 6V below Vin in order to turn on the FET. For 6V>VIN>3V the gate pulls to within 0.4V of ground. Therefore a PFET with a gate rating of 2.6V or lower should be used. VIN 5 Input Voltage ORDERING INFORMATION(1) Part Number XRP6124ESTR0.5-F XRP6124HVESTR0.5-F XRP6124EVB XRP6124HVEVB Operating Temperature Range Lead-Free Package Packing Method -40CTJ125C Yes(2) 5-pin SOT23 Tape & Reel Note 1 0.5s/18V max 0.5s/30V max XRP6124 Evaluation Board XRP6124HV Evaluation Board NOTES: 1.Refer to www.exar.com/XRP6124 for most up-to-date Ordering Information 2. Visit www.exar.com for additional information on Environmental Rating. 3/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller TYPICAL PERFORMANCE CHARACTERISTICS All data taken at TJ = TA = 25C, unless otherwise specified - Curves are based on Schematic and BOM from Application Information section of this datasheet. Refer to figure 20 for XRP6124 and to figure 21 for XRP6124HV. Fig. 4: Efficiency versus IOUT, VIN=12V Fig. 5: Efficiency versus IOUT, VIN=24V Fig. 6: TON versus VIN Fig. 7: TON versus VIN Fig. 8: Load Regulation Fig. 9: Load Regulation 4/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller XRP6124ES0.5-F Fig. 10: Line Regulation Fig. 11: Line Regulation XRP6124ES0.5-F VOUT AC coupled 10mV/div VOUT AC coupled 20mV/div LX 10V/div LX 20V/div IL 2A/div IL 2A/div 1s/div Fig. 12: Steady state, VIN = 12V, VOUT = 3.3V, IOU T= 3A 2s/div Fig. 13: Steady state, VIN = 24V, VOUT = 5.0V, IOUT = 3A XRP6124ES0.5-F XRP6124HVES0.5-F 90mV VOUT AC coupled 100mV/div XRP6124HVES0.5-F 180mV VOUT AC coupled 200mV/div IOUT 1A/div IOUT 1A/div 10s/div 20s/div Fig. 15: Load step transient response, 1.4A-3A-1.4A Fig. 14: Load step transient response, 1.4A-3A-1.4A 5/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller XRP6124ES0.5-F XRP6124HVES0.5-F 90mV 180mV VOUT AC coupled 100mV/div VOUT AC coupled 200mV/div IOUT 1A/div IOUT 1A/div 50s/div 50s/div Fig. 16: Load step transient response corresponding to a CCM-DCM transition, 0.05A-1.6A-0.05A Fig. 17: Load step transient response corresponding to a CCM-DCM transition, 0.05A-1.6A-0.05A Fig. 18: Shutdown current versus VIN, VEN = 0V Fig. 19: Shutdown current versus VIN, VEN = 0V 6/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller THEORY OF OPERATION fs = THEORY OF OPERATION Since for each voltage option, the product of VIN and TON is the constant K shown in table 1, then switching frequency is determined by VOUT as shown in table 2. The XRP6124 utilizes a proprietary Constant On-Time (COT) control with emulated ESR. The on-time is internally set and automatically adjusts during operation, inversely with the voltage VIN, in order to maintain a constant frequency. Therefore the switching frequency is independent of the inductor and capacitor size, unlike hysteretic controllers. The emulated ESR ramp allows the use of ceramic capacitors for output filtering. VOUT At the beginning of each cycle, the XRP6124 turns on the P-Channel FET for a fixed duration. The on-time is internally set and adjusted by VIN. At the end of the on-time the FET is turned off, for a predetermined minimum off time TOFF-MIN (nominally 250ns). After the TOFF-MIN has expired the voltage at feedback pin FB is compared to a voltage ramp at the feedback comparators positive input. Once VFB drops below the ramp voltage, the FET is turned on and a new cycle starts. This voltage ramp constitutes an emulated ESR and makes possible the use of ceramic capacitors, in addition to other capacitors, as output filter for the buck converter. 3-18 4.5-30 TON (s) XRP6124ES0.5-F 0.5 @ 12VIN XRP6124HVES0.5-F 1.2 200 100 1.5 250 125 1.8 300 150 2.5 417 208 3.3 550 275 5.0 833 417 12 --- 1000 VOUT K=TONxVIN (s.V) XRP6124HVES0.5-F 0.5 @ 24VIN XRP6124ES0.5-F Where it is advantageous, the high-voltage option may be used for low-voltage applications. For example a 12VIN to 5VOUT conversion using a low-voltage option will result in switching frequency of 833kHz as shown in table 2. If it is desired to increase the converter efficiency, then switching losses can be reduced in half by using a high-voltage option operating at a switching frequency of 417kHz. The XRP6124 is available in two voltage options as shown in table 1. The low-voltage and high-voltage options have TON of 0.5s at 12VIN and 24VIN respectively. Note that TON is inversely proportional to VIN. The constant of proportionality K, for each voltage option is shown in table 1. Variation of TON versus VIN is shown graphically in figures 6 and 7. Part Number Switching frequency fs(kHz) Table 2: Switching frequency fs for the XRP6124 voltage options VOLTAGE OPTIONS Voltage rating (V) VOUT VIN x TON 6 Maximum Output Current IOUT(A) XRP6124ES0.5-F XRP6124HVES0.5-F 3.3VIN 5.0VIN 12VIN 18VIN 1.2 5 5 4 --- 24VIN --- 1.5 5 5 4 4 --- 1.8 5 5 4 4 4 2.5 4 4 4 4 4 3.3 --- 4 3 4 4 5.0 --- --- 3 3 3 12 --- --- --- 2 2 Table 3: Maximum recommended IOUT 12 SHORT-CIRCUIT PROTECTION Table 1 : XRP6124 voltage options The purpose of this feature is to prevent an accidental short-circuit at the output from damaging the converter. The XRP6124 has a short-circuit comparator that constantly monitors the feedback node, after soft-start is For a buck converter the switching frequency fs can be expressed in terms of VIN, VOUT and TON as follows: 7/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller finished. If the feedback voltage drops below 0.55V, equivalent to output voltage dropping below 69% of nominal, the comparator will trip causing the IC to latch off. In order to restart the XRP6124, the input voltage has to be reduced below UVLO threshold and then increased to its normal operating point. XRP6124 will latch up. In applications where an independent enable signal is not available, a Zener diode can be used to derive VEN from VIN. DISCONTINUOUS CONDUCTION MODE, DCM Because XRP6124 is a non-synchronous controller, when load current IOUT is reduced to less than half of peak-to-peak inductor current ripple IL, the converter enters DCM mode of operation. The switching frequency fs is now IOUT dependent and no longer governed by the relationship shown in table 2. As IOUT is decreased so does fs until a minimum switching frequency, typically in the range of few hundred Hertz, is reached at no load. This contributes to good converter efficiency at light load as seen in figures 4 and 5. The reduced fs corresponding to light load, however, increases the output voltage ripple and causes a slight increase in output voltage as seen in figures 8 and 9. Another effect of reduced fs at light load is slow down of transient response when a load step transitions from a high load to a light load. This is shown in figures 16 and 17. SOFT-START To limit in-rush current the XRP6124 has an internal soft-start. The nominal soft-start time is 2ms and commences when VIN exceeds the UVLO threshold. As explained above, the short-circuit comparator is enabled as soon as soft-start is complete. Therefore if the input voltage has a very slow rising edge such that at the end of soft-start the output voltage has not reached 69% of its final value then the XRP6124 will latch-off. ENABLE By applying a logic-level signal to the enable pin EN the XRP6124 can be turned on and off. Pulling the enable below 1V shuts down the controller and reduces the VIN leakage current to 1.5A nominal as seen in figure 18. Enable signal should always be applied after the input voltage or concurrent with it. Otherwise APPLICATION INFORMATION SETTING THE OUTPUT VOLTAGE FEED-FORWARD CAPACITOR CFF Use an external resistor divider to set the output voltage. Program the output voltage from: CFF, which is placed in parallel with R1, provides a low-impedance/high-frequency path for the output voltage ripple to be transmitted to FB. It also helps get an optimum transient response. An initial value for CFF can be calculated from: V R1 = R 2 x OUT - 1 0.8 where: CFF = R1 is the resistor between VOUT and FB 1 2 x x fs x 0.1 x R1 R2 is the resistor between FB and GND (nominally 2k) where: 0.8V is the nominal feedback voltage. This value can be adjusted as necessary to provide an optimum load step transient response. fs is the switching frequency from table 2 8/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller ESR of the capacitor has to be selected such that the output voltage ripple requirement VOUT(ripple), nominally 1% of VOUT, is met. Voltage ripple VOUT(ripple) is composed mainly of two components: the resistive ripple due to ESR and capacitive ripple due to COUT charge transfer. For applications requiring low voltage ripple, ceramic capacitors are recommended because of their low ESR which is typically in the range of 5m. Therefore VOUT(ripple) is mainly capacitive. For ceramic capacitors calculate the VOUT(ripple) from: OUTPUT INDUCTOR Select the output inductor L1 for inductance L, DC current rating IDC and saturation current rating ISAT. IDC should be larger than regulator output current. ISAT, as a rule of thumb, should be 50% higher than the regulator output current. Calculate the inductance from: VOUT L = (VIN - VOUT ) I L x fs x VIN Where: VOUT(ripple) = IL is peak-to-peak inductor current ripple nominally set to 30% of IOUT fS is nominal switching frequency from table 2 Where: COUT is the value calculated above OUTPUT CAPACITOR COUT If tantalum or electrolytic capacitors are used then VOUT(ripple) is essentially a function of ESR: Select the output capacitor for voltage rating, capacitance COUT and Equivalent Series Resistance ESR. The voltage rating, as a rule of thumb, should be twice the output voltage. When calculating the required capacitance, usually the overriding requirement is current load-step transient. If the unloading transient requirement (i.e., when IOUT transitions from a high to a low current) is met, then usually the loading transient requirement (when IOUT transitions from a low to a high current) is met as well. Therefore calculate the COUT capacitance based on the unloading transient requirement from: COUT I L 8 x COUT x fs VOUT(ripple) = I L x ESR INPUT CAPACITOR CIN Select the input capacitor for voltage rating, RMS current rating and capacitance. The voltage rating, as a rule of thumb, should be 50% higher than the regulator's maximum input voltage. Calculate the capacitor's current rating from: I CIN,RMS = I OUT x D x (1 - D ) 2 2 I High - I LOW = Lx 2 2 (V OUT + Vtransient ) - VOUT Where: IOUT is regulator's maximum current Where: D is duty cycle (D=VOUT/VIN) L is the inductance calculated in the preceding step Calculate the CIN capacitance from: IHigh is the value of IOUT prior to unloading. This is nominally set equal to regulator current rating. C IN = ILow is the value of IOUT after unloading. This is nominally set equal to 50% of regulator current rating. I OUT x VOUT x (VIN - VOUT ) 2 fs x VIN x VIN Where: VIN is the permissible input voltage ripple, nominally set to 1% of VIN. Vtransient is the maximum permissible voltage transient corresponding to the load step mentioned above. Vtransient is typically specified from 3% to 5% of VOUT. 9/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller TYPICAL APPLICATIONS 12V TO 3.3V / 3A CONVERSION 1 2 3 EN VIN 6V to 18V 5 VIN XRP6124ES CIN, X5R 22uF, 25V GND FB GATE 4 M1 IRF9335 L1, 4.7uH DR74-4R7-R D1 MBRA340 CFF 1nF VOUT 3.3V/3A R1, 1% 6.34k COUT, X5R 2x22uF, 10V R2, 1% 2k Fig. 20: 12V to 3.3V/3A regulator 24V TO 5V / 3A CONVERSION 1 2 3 EN VIN 8V to 30V 5 VIN XRP6124HVES CIN, X5R 10uF, 50V GND FB GATE 4 D1 MBRA340 M1 DMP4050SSS L1, 8.2uH HCM0730 CFF 0.47nF VOUT 5.0V/3A R1, 1% 10.5k COUT, X5R 2x22uF, 16V R2, 1% 2k Fig. 21: 24V to 5V/3A regulator 10/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller MECHANICAL DIMENSIONS 5-PIN SOT23 11/12 Rev. 1.1.1 XRP6124 Non-Synchronous PFET Step-Down Controller REVISION HISTORY Revision Date Description 1.0.0 01/26/2011 1.1.0 01/31/2011 Corrected typo (changed V to I) on formula under Input Capacitor CIN paragraph 1.1.1 05/24/2018 Updated to MaxLinear logo. Updated format and Ordering Information. Initial release of datasheet Corporate Headquarters: 5966 La Place Court Suite 100 Carlsbad, CA 92008 Tel.:+1 (760) 692-0711 Fax: +1 (760) 444-8598 www.maxlinear.com High Performance Analog: 1060 Rincon Circle San Jose, CA 95131 Tel.: +1 (669) 265-6100 Fax: +1 (669) 265-6101 www.exar.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc.. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. 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MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property. Company and product names may be registered trademarks or trademarks of the respective owners with which they are associated. (c) 2011 - 2018 MAXLINEAR, INC. ALL RIGHTS RESERVED 12/12 Rev. 1.1.1