ICS671-03
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER ZDB AND MULTIPLIER
IDT™
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER 3
ICS671-03 REV C 110409
External Components
The ICS671-03 requires a minimum number of external
components for proper operation. Decoupling capacitors of
0.01µF should be connected between VDD and GND on
pins 4 and 5, and VDD and GND on pins 13 and 12, as close
to the device as possible. A series termination resistor of 33
Ω may be used close to each clock output pin to reduce
reflections.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND, as close to these pins as possible.
For optimum device performance, the decoupling capacitor
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ω resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω.
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 0.01µF decoupling capacitor should be mounted on
the component side of the board as close to the VDD pin as
possible. No vias should be used between decoupling
capacitor and VDD pin. The PCB trace to VDD pin should
be kept as short as possible, as should the PCB trace to the
ground via.
2) The external crystal should be mounted just next to the
device with short traces. The X1 and X2 traces should not
be routed next to each other with minimum spaces, instead
they should be separated and away from other traces.
3) To minimize EMI, the 33Ω series termination resistor (if
needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
ICS671-03. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.