General Description
The MAX4530/MAX4531/MAX4532 are low-voltage,
CMOS analog ICs configured as an 8-channel multi-
plexer (mux) (MAX4530), two 4-channel muxes
(MAX4531), and three single-pole/double-throw
switches (MAX4532). These devices are pin compatible
with the industry-standard 74HC4351/74HC4352/
74HC4353. All devices have two complementary
switch-enable inputs and address latching.
The MAX4530/MAX4531/MAX4532 operate from a sin-
gle supply of +2V to +12V, or from dual supplies of
±2V to ±6V. On-resistance (150Ωmax) is matched
between switches to 8Ωmax. Each switch can handle
rail-to-rail analog signals. Off-leakage current is only
1nA at TA= +25°C and 50nA at TA= +85°C.
All digital inputs have 0.8V and 2.4V logic thresholds,
ensuring both TTL- and CMOS-logic compatibility when
using ±5V or a single +5V supply.
________________________Applications
Battery-Operated Equipment
Data Acquisition
Test Equipment
Avionics
Networking
ATE Equipment
Audio-Signal Routing
____________________________Features
♦Pin Compatible with
74HC4351/74HC4352/74HC4353
♦±2.0V to ±6V Dual Supplies
+2.0V to +12V Single Supply
♦75ΩSignal Paths with ±5V Supplies
150Ω Signal Paths with +5V Supply
♦Rail-to-Rail®Signal Handling
♦tON and tOFF = 150ns and 120ns at ±4.5V
♦<1µW Power Consumption
♦>2kV ESD Protection per Method 3015.7
♦TTL/CMOS-Compatible Inputs
♦Small, 20-Pin SSOP/SO/DIP Packages
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
________________________________________________________________ Maxim Integrated Products 1
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
V+
NO2
NO4
NO0
COM
N.C.
NO3
NO1
TOP VIEW
NO6
ADDC
N.C.
ADDBEN2
EN1
NO5
NO7
12
11
9
10
ADDA
LE
GND
V-
NARROW DIP/WIDE SO
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
V+
NO1A
NO2A
COMA
COMB
N.C.
NO1B
NO0B
NO0A
NO3A
N.C.
ADDBEN2
EN1
NO2B
NO3B
12
11
9
10
ADDA
LE
GND
V-
NARROW DIP/WIDE SO
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
V+
COMB
COMC
NOC
NOA
N.C.
NCB
NOB
NCC
ADDC
N.C.
ADDBEN2
EN1
NCA
COMA
12
11
9
10
ADDA
LE
GND
V-
MAX4532MAX4531MAX4530
NARROW DIP/WIDE SO
LOGIC
LOGIC LOGIC
N.C. = NOT CONNECTED
Pin Configurations
PART
MAX4530CPP
MAX4530CWP
MAX4530CAP 0°C to +70°C
0°C to +70°C
0°C to +70°C
TEMP. RANGE PIN-PACKAGE
20 Plastic DIP
20 SO
20 SSOP
Ordering Information
Ordering Information continued at end of data sheet.
*Contact factory for availability.
MAX4530C/D 0°C to +70°C Dice*
Truth Table appears at end of data sheet.
19-1162; Rev 0a; 12/96
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX4531
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltages Referenced to V-
V+ .............................................................................-0.3 to +13V
Voltage into Any Terminal (Note 1)
.................-0.3 to (V+ + 0.3V) or ±20mA (whichever occurs first)
Continuous Current into Any Terminal..............................±20mA
Peak Current, NO, NC, or COM_
(pulsed at 1ms, 10% duty cycle)...................................±40mA
ESD per Method 3015.7 ..................................................>2000V
Continuous Power Dissipation (TA= +70°C)
20-Pin Plastic DIP (derate 11.11mW/°C
above +70°C)................................................................889mW
20-Pin SO (derate 10.00mW/°C above +70°C).............800mW
20-Pin SSOP (derate 8.00mW/°C above +70°C) ..........640mW
Operating Temperature Ranges
MAX453_C_P .......................................................0°C to +70°C
MAX453_E_P ....................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
-50 50
VCOM = ±4.5V,
VNO = 4.5V,
V+ = 5.5V, V- = -5.5V
-100 100
VCOM = ±4.5V,
VNO = 4.5V,
V+ = 5.5V, V- = -5.5V
TA= TMIN to TMAX
TA= TMIN to TMAX
CONDITIONS
ICOM(OFF)
COM-Off Leakage Current
(Note 6) -1 0.01 1
nA
-2 0.01 2
Ω
45 75
VV- V+
VCOM, VNO,
VNC_
Analog-Signal Range
INO(OFF)
NO-Off Leakage Current
(Note 6) nA
-10 10
13
RFLAT(ON)
On-Resistance Flatness
(Note 5)
100
RON
Channel On-Resistance
Ω
18
12
∆RON
On-Resistance Matching
Between Channels (Note 4)
Ω
410
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
VNO = ±4.5V, VCOM = 4.5V,
V+ = 5.5V, V- = -5.5V
MAX4530
INO = 2mA; VCOM = -3V, 0V, +3V;
V+ = 5V; V- = -5V
INO = 2mA, VCOM = ±3.5V,
V+ = +4.5V, V- = -4.5V
INO = 2mA, VCOM = ±4.5V,
V+ = +4.5V, V- = -4.5V
TA= +25°C
(Note 3)
TA= +25°C
TA= TMIN to TMAX
TA= TMIN to TMAX
TA= TMIN to TMAX
TA= +25°C
TA= TMIN to TMAX
TA= +25°C
TA= +25°C
ELECTRICAL CHARACTERISTICS—Dual Supplies
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
Note 1: Voltages exceeding V+ or V- on any signal terminal are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
TA= TMIN to TMAX -100 100
TA= TMIN to TMAX -50 50
COM-On Leakage Current
(Note 6) ICOM(ON)
VCOM = ±4.5V,
V+ = 5.5V,
V- = -5.5V nA
TA= +25°C -2 0.01 2
TA= +25°C -1 0.01 1
MAX4530
TA= +25°C -1 0.01 1
SWITCH
±
±MAX4531/
MAX4532
MAX4531/
MAX4532
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
_______________________________________________________________________________________ 3
ns
60
tS
V
Setup Time, Channel
Select to Latch Enable
50
Figure 4 TA= TMIN to TMAX
TA= +25°C
ns
ns
0
TA= TMIN to TMAX
TA= TMIN to TMAX
µAVADD_H = 2.4V, VADD_L = 0.8V
VADD_H = 2.4V, VADD_L = 0.8V
tH
µA
Hold Time, Latch Enable
to Channel Select
CONDITIONS
0
Figure 6 TA= TMIN to TMAX
TA= +25°C
150
tOFF(EN)
Enable Turn-Off Time
dB-92VCT
Crosstalk Between
Channels
dB-65VISO
Off Isolation (Note 7)
pC1.5 5Q
Charge Injection
(Note 3)
ns
250
tON(EN)
Enable Turn-On Time 10 150
-0.1 0.01 0.1
IADD_H, IEN_H,
ILE
V1.5 2.4
VADD_H, VEN_H,
VLE
Logic High Threshold
ns
60 150
tTRANS
Transition Time
V±2.0 ±6V+, V-Power-Supply Range
µA
-10 10
I+Positive Supply Current
µA
-10 10
I-
Negative Supply
Current
-1 1
Input Current with
Input Voltage High
-0.1 0.1
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
0.8 1.5
VADD_L, VEN_L,
VLE
Logic Low Threshold
IADD_L, IEN_L,
ILE
Input Current with
Input Voltage Low
VEN_ = VADD_ = VLE = 0V/V+,
V+ = 5.5V, V- = -5.5V
40 100
Figure 2 TA= TMIN to TMAX
TA= +25°C
VEN1 = 0V, VEN2 = 2.4V,
f = 1MHz, VGEN = 1Vp-p,
RL= 1kΩ
Figure 1
VEN2 = 0V, RL= 1kΩ,
f = 1MHz
CL= 1nF, VNO = 0V, Figure 6
VEN_ = VADD_ = VLE = 0V/V+,
V+ = 5.5V, V- = -5.5V
Figure 2
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= TMIN to TMAX
TA= TMIN to TMAX
TA= TMIN to TMAX
TA= +25°C
TA= +25°C
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
TA= +25°C
TA= +25°C
-1 0.001 1
-1 0.001 1
ns410tBBM
Break-Before-Make
Interval Figure 3 TA= +25°C
250TA= TMIN to TMAX
IGND
IGND Supply Current µA
-10 10
VEN_ = VADD_ = VLE = 0V/V+,
V+ = 5.5V, V- = -5.5V TA= TMIN to TMAX
ns
70
tMPW
Pulse Width,
Latch Enable
60
Figure 5 TA= TMIN to TMAX
TA= +25°C
SUPPLY
DIGITAL LOGIC INPUT
DYNAMIC
CONDITIONS
MAX4531
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±10%, V- = 0, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
6
9
pF3CNO(OFF)
NO-Off Capacitance
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
TA= +25°C
CONDITIONS
MAX4532
MAX4531
f = 1MHz, VEN = VCOM = 0V
0/0
0.025THD
Distortion, Total
Harmonic TA= +25°C
MAX4530
f = 1MHz,
VEN2 = VCOM = 0V pF
15
CCOM(OFF)
COM-Off Capacitance TA= +25°C
f = 1MHz 3CIN
Logic Input
Capacitance TA= +25°C
MAX4532
MAX4531
MAX4530
f = 1MHz,
VEN1 = VCOM = 0V,
VEN2 = 2.4V
pF
26
CCOM(ON)
COM-On Capacitance TA= +25°C
17
20
MAX4531/
MAX4532
nA
MAX4531/
MAX4532
-50 50TA= TMIN to TMAX
MAX4530
nA
-50 50
-2 2
TA= TMIN to TMAX
MAX4530
VCOM = 4.5V, 1V;
VNO = 1V, 4.5V;
V+ = 5.5V
ICOM(ON)
CONDITIONS
-2 2
ICOM(OFF)
COM-Off Leakage
Current (Note 8)
TA= +25°C
INO = 1mA, VCOM = 3.5V,
V+ = 4.5V Ω
80 150
RON
On-Resistance TA= +25°C
(Note 3) V0V+VCOM, VNO
Analog Signal Range
TA= TMIN to TMAX 200
COM-On Leakage
Current (Note 8)
INO = 1mA, VCOM = 3.5V,
V+ = 4.5V Ω
TA= +25°C
∆RON
On-Resistance
Matching Between
Channels (Notes 3, 4) 20
-1 1
TA= TMIN to TMAX
-100 100
INO = 1mA; VCOM = 3V, 2V, 1V;
V+ = 5V Ω
10RFLAT
On-Resistance Flatness TA= +25°C
TA= +25°C
-1 1
TA= TMIN to TMAX
-100 100
VNO = 4.5V; VCOM = 4.5V, 1V;
V+ = 5.5V nA
-1 1
INO(OFF)
NO-Off Leakage
Current (Note 8)
TA= +25°C
TA= TMIN to TMAX -10 10
215TA= +25°C
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
TA= +25°C
TA= TMIN to TMAX
SWITCH
250
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +5V ±10%, V- = 0, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
CONDITIONS
V0.8 1.5
VADD_L,
VEN_L, VLE
Logic-Low Threshold TA= TMIN to TMAX
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
V1.5 2.4
VADD_H,
VEN_H, VLE
Logic-High Threshold TA= TMIN to TMAX
µA
-1.0 1.0
I+Positive Supply Current VEN_ = VADD = VLE = 0V, V+;
V+ = 5.5V; V- = 0V
µA-0.1 0.1
IADD_H,
IEN_H, ILE
Input Current with
Input Voltage High VH= 2.4V, VL= 0.8V
µA-0.1 0.1
IADD_L,
IEN_L, ILE
Input Current with
Input Voltage Low VH= 2.4V, VL= 0.8V
V2.0 12Power-Supply Range
µA
-1.0 1.0
I-
Negative Supply
Current
VEN_ = VADD = VLE = 0V, V+;
V+ = 5.5V; V- = 0V
VEN_ = VADD = VLE = 0V, V+;
V+ = 5.5V; V- = 0V
-1.0 1.0
IGND
IGND Supply Current TA= +25°C
TA= TMIN to TMAX -10 10 µA
ns
90 200TA= +25°C
Figure 3 (Note 3) ns10 20tBBM
Break-Before-Make
Interval TA= +25°C
250
Figure 2 ns
100 200
tON(EN)
Enable Turn-On Time
(Note 3)
TA= +25°C
125
Figure 3 ns
40 100
tOFF(EN)
Enable Turn-Off Time
(Note 3)
TA= +25°C
TA= TMIN to TMAX
TA= TMIN to TMAX
60
Figure 7 ns
50
tS
Set-Up Time, Channel
Select to Latch Enable
TA= +25°C
TA= TMIN to TMAX
0
Figure 7 ns
0
tH
Hold Time, Latch Enable
to Channel Select
TA= +25°C
TA= TMIN to TMAX
70
Figure 7 ns
60
tMPW
Pulse Width, Latch
Enable
TA= +25°C
TA= TMIN to TMAX
1.5 5Figure 7, CL= 1nF, VNO = 0V pCQ
Charge Injection
(Note 3) TA= +25°C
TA= +25°C
TA= +25°C
TA= TMIN to TMAX
TA= TMIN to TMAX
-10 10
-10 10
Figure 1, VNO = 3V 250
tTRANS
Transition Time TA= TMIN to TMAX
DIGITAL LOGIC INPUT
SUPPLY
DYNAMIC
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
6 _______________________________________________________________________________________
Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in
this data sheet.
Note 3: Guaranteed by design.
Note 4: ∆RON = RON(max) - RON(min).
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges, i.e., VNO = 3V to 0V and 0V to -3V.
Note 6: Leakage parameters are 100% tested at maximum-rated hot-operating temperature, and guaranteed by correlation at
TA= +25°C.
Note 7: Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log VCOM / VNO,
VCOM = output, VNO = input to off switch.
Note 8: Leakage testing at single supply is guaranteed by correlation testing with dual supplies.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +5V ±10%, V- = 0, GND = 0, VADD_H = VEN_H = VLE = 2.4V, VADD_L = VEN_L = 0.8V, TA= TMIN to TMAX, unless
otherwise noted.)
Ω
600
RON
On-Resistance INO = 1mA, VCOM = 1.5V,
V+ = 2.7V TA= TMIN to TMAX
ns150 350tTRANS
ns100tS
ns
Transition Time (Note 3) Figure 1, VIN = 2.4V,
VNO1 = 1.5V, VNO8 = 0V TA= +25°C
Set-Up Time, Channel
Select to Latch Enable)
CONDITIONS
60 150tOFF(EN)
ns150 350
TA= +25°C
tON(EN)
Enable Turn-On Time
(Note 3)
Figure 3, VINH = 2.4V,
VINL = 0V, VNO1 = 1.5V TA= +25°C
(Note 3)
ns0tHTA= +25°C
Hold Time, Latch Enable to
Channel Select (Note 3)
Enable Turn-Off Time
(Note 3)
ns120tMPW
Pulse Width, Latch Enable
220 500
V0V+VANALOG
Analog Signal Range
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
Figure 3, VINH = 2.4V,
VINL = 0V, VNO1 = 1.5V
(Note 3)
TA= +25°C
(Note 3)
TA= +25°C
SWITCH
DYNAMIC
TA= +25°C
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
_______________________________________________________________________________________ 7
100
0
-6
ON-RESISTANCE vs. VCOM
(DUAL SUPPLIES)
40
30
80
MAX4530/1/2-01
VCOM (V)
RON (Ω)
4
60
90
10
20
70
50
6-4 0
-2 2
V± = ±2.4V
V± = ±3V
V± = ±5V
V± = ±6V
110
30
-5 -3 1
ON-RESISTANCE vs. VCOM
AND TEMPERATURE
(DUAL SUPPLIES)
50
90
MAX4530/1/2-02
VCOM
(
V
)
RON (Ω)
-1 3
70
100
40
80
60
5-4 0-2 2 4
V+ = 5V
V- = -5V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -55°C
250
0
068
ON-RESISTANCE vs. VCOM
(SINGLE SUPPLY)
50
150
MAX4530/1/2-03
VCOM (V)
RON (Ω)
14
100
200
24 1610 12
V+ = 2.4V
V+ = 3V
V+ = 5V
V+ = 10V
V+ = 12V
V- = 0V
180
02
ON-RESISTANCE vs. VCOM
AND TEMPERATURE
(SINGLE SUPPLY)
100
MAX4530/1/2-04
VCOM
(
V
)
RON (Ω)
4
60
140
160
120
80
40
153
TA = +25°C
TA = -55°C
TA = +85°C
TA = +125°C
V+ = 5V
V- = 0V
-5 -3 1
CHARGE INJECTION vs. VCOM
-5
5
MAX4530/1/2-06
VCOM (V)
Qj (pC)
-1 3
0
5-4 0-2 2 4
V+ = 5V
V- = -5V
V+ = 5V
V- = 0V
0.1
OFF-LEAKAGE vs.
TEMPERATURE
1000
MAX4530/1/2-05
TEMPERATURE (°C)
OFF-LEAKAGE (pA)
10
1
100
-50 12525-25 0 7550 100
V+ = 5.5V
V- = -5.5V
0
-90
0.1 10 1001 1000
FREQUENCY RESPONSE
-70
-80
-60
MAX4530/1/2-08
FREQUENCY (MHz)
LOSS
(dB)
-50
-40
-10
-20
-30
180
-180
-100
-140
-60
PHASE (DEGREES)
-20
20
140
100
60
INSERTION LOSS
OFF ISOLATION
ON PHASE
50Ω IN/OUT
0.1
SUPPLY CURRENT vs.
TEMPERATURE
10
MAX4530/1/2-07
TEMPERATURE (°C)
I+, I- (nA)
1
-50 12525-25 0 7550 100
V+ = 5V
V- = -5V
VEN = VA = 0V, 5V
I+
I-
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
8 _______________________________________________________________________________________
______________________________________________________________Pin Description
COMA17—
NCA——
EN177
EN288
V-99
N.C.3, 143, 14
COM—4
COMB4—
NOA——
NCB——
NOB——
PIN
NO0B–NO3B1, 2, 5, 6—
NO0–NO7—
1, 2, 5, 6,
16, 17, 18, 19
Analog Switch “A” Common
Analog Switch “A” Normally Closed Input
Enable Logic Input #1 (see Truth Table).
Enable Logic Input #2 (see Truth Table).
Negative Analog Supply Voltage Input. Connect
to GND for single supply operation.
Not Internally Connected
Analog Switch Common
Analog Switch “B” Common
Analog Switch “A” Normally Open Input
Analog Switch “B” Normally Closed Input
Analog Switch “B” Normally Open Input
Analog Switch “B” Inputs 0–3
Analog Switch Inputs 0–7
5
6
7
8
9
3, 14
—
19
4
2
1
—
—
MAX4531MAX4530 MAX4532
GND1010
Negative Digital Supply Voltage Input. Connect
to digital ground. (Analog signals have no
ground
10
LE1111 Address Latch Logic Input (see Truth Table).11
ADDA1212 Address “A” Logic Input (see Truth Table).12
ADDB1313 Address “B” Logic Input (see Truth Table).13
ADDC—15 Address “C” Logic Input (see Truth Table).15
NO0A–NO3A15, 16, 18, 19—Analog Switch “A” Inputs 0–3—
NCC—— Analog Switch “C” Normally Closed Input16
NOC—— Analog Switch “C” Normally Open Input17
COMC—— Analog Switch “C” Common18
FUNCTIONNAME
V+2020 Positive Analog and Digital Supply-Voltage
Input
20
NO_, NC_, and COM_ pins are identical and interchangeable. Either may be considered as an input or output; signals pass equally
well in both directions.
__________Applications Information
Power-Supply Considerations
Overview
The MAX4530/MAX4531/MAX4532 construction is typi-
cal of most CMOS analog switches. They have three
supply pins: V+, V-, and GND. V+ and V- drive the
internal CMOS switches and set the limits of the analog
voltage on any switch. Reverse ESD-protection diodes
are internally connected between each analog-signal
pin and both V+ and V-. One of these diodes conducts
if any analog signal exceeds V+ or V-. During normal
operation, these and other reverse-biased ESD diodes
leak, forming the only current drawn from V+ or V-.
Virtually all of the analog leakage current comes from
the ESD diodes. Although the ESD diodes on a given
signal pin are identical and therefore fairly well bal-
anced, they are reverse-biased differently. Each is
biased by either V+ or V- and the analog signal. This
means their leakages vary as the signal varies. The
difference in the two diode leakages to the V+ and V-
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. For this reason, both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
The analog-signal paths and GND are not connected.
V+ and GND power the internal logic and logic-level
translators, and set both the input and output logic lim-
its. The logic-level translators convert the logic levels
into switched V+ and V- signals to drive the analog sig-
nals’ gates. This drive signal is the only connection
between the logic supplies and signals and the analog
supplies. V+ and V- have ESD-protection diodes to
GND.
The logic-level thresholds are TTL/CMOS compatible
when V+ = +5V. As V+ rises, the threshold increases
slightly, so when V+ reaches +12V, the threshold is
about 3.1V—above the TTL guaranteed, high-level min-
imum of 2.8V, but still compatible with CMOS outputs.
Bipolar Supplies
The MAX4530/MAX4531/MAX4532 operate with bipolar
supplies between ±2.0V and ±6V. The V+ and V- sup-
plies need not be symmetrical, but their sum cannot
exceed the +13V absolute maximum rating.
Single Supply
The MAX4530/MAX4531/MAX4532 operate from a sin-
gle supply between +2V and +12V when V- is connect-
ed to GND. All of the bipolar precautions must be
observed. At room temperature, they actually work with
a single supply at, near, or below +1.7V, although as
supply voltage decreases, switch on-resistance and
switching times become very high.
High-Frequency Performance
In 50Ωsystems, signal response is reasonably flat up
to 50MHz (see Typical Operating Characteristics).
Above 20MHz, the on response has several minor
peaks that are highly layout-dependent. The problem is
not in turning the switch on, but in turning it off. The off-
state switch acts like a capacitor and passes higher
frequencies with less attenuation. At 10MHz, off isola-
tion is about -65dB in 50Ωsystems, becoming worse
(approximately 20dB per decade) as frequency
increases. Higher circuit impedances also make off iso-
lation worse. Adjacent channel attenuation is about 3dB
above that of a bare IC socket, and is due entirely to
capacitive coupling.
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
_______________________________________________________________________________________ 9
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
10 ______________________________________________________________________________________
50%
0
VADD_
VOUT 0
VNO0
VNO7
V-
COM
V-
300Ω
GND
ADDC
ADDB
ADDA
EN2
V+
VADD_
50Ω
90%
90%
tTRANS
tTRANS
35pF
V+
V+
V+
VOUT
MAX4530
NO7 -3V
NO1–NO6
NO0 +3V
EN1
50%
0
VADD_
VOUT 0
VNO0
VNO3
V-
COM
V-
300Ω
GND
ADDA
ADDB
EN2
V+
VADD_
50Ω
90%
90%
tTRANS
tTRANS
35pF
V+
V+
V+
VOUT
MAX4531
NO3_ -3V
NO1_, NO2_
NO0 +3V
EN1
50%
0
VADD_
VOUT 0
VNC_
VNO_
V-
COM
V-
300Ω
GND
ADD_
EN2
V+
VADD_
50Ω
90%
90%
tTRANS
tTRANS
35pF
V+
V+
V+
VOUT
MAX4532
NC_ -3V
NO_ +3V
EN1
LE
LE
LE
Figure 1. Address Transition Time
______________________________________________Test Circuits/Timing Diagrams
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
______________________________________________________________________________________ 11
Figure 2. Enable Switching Time
_________________________________Test Circuits/Timing Diagrams (continued)
50%
0
VOUT
VNO0
0
V-
COM
V-
300Ω
GND
ADDC
ADDB
ADDA
EN1
V+
50Ω90%
90%
tOFF
tON
35pF
V+
V+
V+
VOUT
MAX4530
NO1–NO7
NO0 +3V
EN2
V-
COM_
V-
300Ω
GND
ADDA
ADDB
EN1
50Ω
35pF
V+
V+
V+
VOUT
MAX4531
NO1_, N02_, NO3_
NO0_ +3V
EN2
50%
0
VOUT
VNO0
0
V+
90%
90%
tOFF
tON
V-
COM_
V-
300Ω
GND
ADD_
EN1
50Ω
35pF
V+
V+
V+
VOUT
MAX4532
NC_
NO_
+3V
EN2
VEN1
VEN1
VEN1
VEN1
VEN1
VEN1
50%
0
VOUT
VNC_
0
V+
90%
90%
tOFF
tON
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
REPEAT TEST FOR EN2, WITH PULSE INVERTED
AND EN1 CONNECTED TO GND.
LE
LE
LE
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
12 ______________________________________________________________________________________
Figure 3. Break-Before-Make Interval
_________________________________Test Circuits/Timing Diagrams (continued)
V-
COM
V-
300Ω
GND
ADDC
ADDB
ADDA
EN2
VADD_
50Ω
35pF
V+
V+
V+
VOUT
MAX4530
NO0–NO7 +3V
EN1
V-
COM_
V-
300Ω
GND
ADDA
ADDB
EN2
VADD_
50Ω
35pF
V+
V+
V+
VOUT
MAX4531
NO0_–NO3_ +3V
EN1
V-
COM
V-
300Ω
GND
ADD_
EN2
VADD_
50Ω
35pF
V+
V+
V+
VOUT
MAX4532
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
NO_, NC_ +3V
EN1
tF < 20ns
tR < 20ns
tBBM
VNO_
0
0
90%
50%
VADD_
VOUT
V+
LE
LE
LE
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
______________________________________________________________________________________ 13
Figure 4. Charge Injection
_________________________________Test Circuits/Timing Diagrams (continued)
V-
COM
V-
V+ GND
ADDC
ADDB
ADDA
EN1
50Ω
CL = 1000pF
V+
CHANNEL
SELECT
V+
VNO = 0V
VOUT
MAX4530
MAX4531
MAX4532
NO_
EN2
V- = 0 FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
VEN1 ∆VOUT
VOUT
VEN1
V+
0
∆VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE-TRANSFER
ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = ∆VOUT x CL
LE
Figure 5. Off Isolation, On Loss, and Crosstalk
V-
COM_
ADDC
ADDB
ADDA
EN2
V+
V+
CHANNEL
SELECT
V+
MAX4530
MAX4531
MAX4532
EN1
NO_
V-
GND
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ TERMINAL ON EACH SWITCH.
ON LOSS IS MEASURED BETWEEN COM_ AND ON TERMINAL ON EACH SWITCH.
CROSSTALK (MAX4531/MAX4532 IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
VOUT
VIN
MEASUREMENT REF
50Ω
50Ω50Ω
50Ω
10nF
NETWORK
ANALYZER OFF ISOLATION = 20log VOUT
VIN
ON LOSS = 20log VOUT
VIN
CROSSTALK = 20log VOUT
VIN
LE
V-
COM
V-
GND
ADDC
ADDB
ADDA
EN2
V+
V+
CHANNEL
SELECT
V+
MAX4530
MAX4531
MAX4532
EN1
NO_
NO_
1MHz
CAPACITANCE
ANALYZER
LE
Figure 6. NO/COM Capacitance
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
14 ______________________________________________________________________________________
_________________________________Test Circuits/Timing Diagrams (continued)
Figure 7. Setup and Hold Times, Minimum
LE
Width
V-
COM
V-
300Ω
GND
ADDC
ADDB
ADDA
LE
VADD_
50Ω
50Ω35pF
EN1
V+
VLE
V+
VOUT
MAX4530
NO1–NO7 +3V
NO0
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
0
0
3V 90%
50%
50%
VADD_
VLE
VOUT
3V
3V
0
EN2
V-
COM_
V-
300Ω
GND
ADDA
ADDB
LE
VADD_
50Ω
50Ω35pF
EN1
V+
VLE
V+
VOUT
MAX4531
NO1_, NO2_, NO3_ +3V
NO0_
EN2
V-
COM_
V-
300Ω
GND
ADD_
LE
VADD_
50Ω
50Ω35pF
EN1
V+
VLE
V+
VOUT
MAX4532
NO_
+3V
NC_
EN2
tMPW
tH
tS
tH
tON, tOFF
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
______________________________________________________________________________________ 15
___________________________________________Truth Table/Switch Programming
EENN11
ADDC*
0 0 X
LLEE
X X X
X 1 X
1 0 0
1 0 0
1 0 0
1 0 0
1 0 1
1 0 1
1 0 1
1 0 1
1
EN2
0
X
1
1
1
1
1
1
1
1
ON SWITCHES
MAX4530
Last address
All switches open
All switches open
COM–NO3
COM–NO2
COM–NO1
COM–NO0
COM–NO7
COM–NO6
COM–NO5
COM–NO4
ADDRESS BITS
ADDA
X
X
X
1
0
1
0
1
0
1
0
ADDB
X
X
X
1
1
0
0
1
1
0
0
MAX4531
Last address
All switches open
All switches open
COMA–NO3A,
COMB–NO3B
COMA–NO2A,
COMB–NO2B
COMA–NO1A,
COMB–NO1B
COMA–NO0A,
COMB–NO0B
COMA–NO3A,
COMB–NO3B
COMA–NO2A,
COMB–NO2B
COMA–NO1A,
COMB–NO1B
COMA–NO0A,
COMB–NO0B
MAX4532
Last address
All switches open
All switches open
COMA–NOA,
COMB–NOB,
COMC–NCC
COMA–NCA,
COMB–NOB,
COMC–NCC
COMA–NOA,
COMB–NCB,
COMC–NCC
COMA–NCA,
COMB–NCB,
COMC–NCC
COMA–NOA,
COMB–NOB,
COMC–NOC
COMA–NCA,
COMB–NOB,
COMC–NOC
COMA–NOA,
COMB–NCB,
COMC–NOC
COMA–NCA,
COMB–NCB,
COMC–NOC
X = Don’t Care *ADDC not present on MAX4531.
Note: NO_ and COM_ pins are identical and interchangeable. Either may be considered an input or an output; signals pass equally
well in either direction. LE is independent of EN1 and EN2.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX4530/MAX4531/MAX4532
Low-Voltage, CMOS Analog Multiplexers/Switches
with Enable Inputs and Address Latching
___________________________________________Ordering Information (continued)
*Contact factory for availability.
TRANSISTOR COUNT: 255
SUBSTRATE CONNECTED TO V+
PART TEMP. RANGE PIN-PACKAGE
MAX4531CPP 0°C to +70°C 20 Plastic DIP
MAX4531CWP 0°C to +70°C 20 SO
MAX4531CAP 0°C to +70°C 20 SSOP
MAX4531C/D 0°C to +70°C Dice*
MAX4531EPP -40°C to +85°C 20 Plastic DIP
MAX4531EWP -40°C to +85°C 20 SO
MAX4531EAP -40°C to +85°C 20 SSOP
MAX4530EAP -40°C to +85°C 20 SSOP
MAX4530EWP -40°C to +85°C 20 SO
MAX4530EPP -40°C to +85°C 20 Plastic DIP
__________________________________________________________Chip Topographies
PART TEMP. RANGE PIN-PACKAGE
MAX4532CPP 0°C to +70°C 20 Plastic DIP
MAX4532CWP 0°C to +70°C 20 SO
MAX4532CAP 0°C to +70°C 20 SSOP
MAX4532C/D 0°C to +70°C Dice*
MAX4532EPP -40°C to +85°C 20 Plastic DIP
MAX4532EWP -40°C to +85°C 20 SO
MAX4532EAP -40°C to +85°C 20 SSOP
NO4 (COMC)
0.081"
(2.06mm)
0.053"
(1.35mm)
COM
(NOA)
NO3 (NCB)
NO1 (NOB)
V+
NO2 (COMB)
NO7
(COMA)
NO5
(NCA)
EN1
EN2
( ) ARE FOR MAX4532
N.C.
NO0 (NOC)
NO6 (NCC)
ADDC
ADDB
V- GND LE ADDA
NO1A
0.081"
(2.06mm)
0.053"
(1.35mm)
COMB
NO2B
NO0B
V+
NO2A
NO3B
NO1B
EN1
EN2
COMA
NO0A
NO3A
ADDB
N.C.
V- GND LE ADDA
MAX4530/MAX4532 MAX4531
