IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 1
Rev. B, 08/08/2013
20VP-P CHARGE PUMP CERAMIC SPEAKER DRIVER
August 2013
GENERAL DESCRIPTION
The IS31AP4915A features a mono power amplifier
with an integrated charge-pump power supply
specifically designed to drive the high capacitance of
a ceramic loudspeaker.
The IS31AP4915A maximizes battery life by offering
high performance efficiency.
The IS31AP4915A is ideally suited to deliver the high
output-voltage swing required to drive
ceramic/piezoelectric speakers.
The device utilizes comprehensive click-and-pop
suppression and shutdown control. The
IS31AP4915A is fully specified over the -40°C to
+85°C extended temperature range and is available
in small lead-free 16-pin QFN (4mm × 4mm)
packages.
TYPICAL APPLICATION CIRCUIT
FEATURES
Integrated charge-pump power supply - no
inductor required
Thermal protection
Pop reduction circuitry
20VP-P voltage swing into piezoelectric speaker
QFN-16, 4mm × 4mm
ESD (HBM): 2kV
ESD (MM): 200V
APPLICATIONS
CD/MP3 players
Smart phones
Cellular phones
PDAs
Handheld gaming
Figure 1 Typical Application Circuit
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 2
Rev. B, 08/08/2013
PIN CONFIGURATION
Package Pin Configuration (Top View)
QFN-16
PIN DESCRIPTIO N
No. Pin Description
1 C1P Charge pump flying capacitor positive terminal.
2 PGND Power ground, connect to ground.
3 C1N Charge pump flying capacitor negative terminal.
4 PVSS Output from charge pump.
5, 13 NC No connection.
6 SVSS Amplifier negative supply, connect to PVSS.
7 OUT+ Positive output signal.
8 SVCC Amplifier positive supply, connect to PVCC.
9 OUT- Negative output signal.
10 FB Feed back.
11, 15 SDB Shutdown, active low logic.
12 IN Audio input signal.
14 SGND Signal ground, connect to ground.
16 PVCC Charge pump supply voltage, connect to positive supply.
Thermal Pad Connect to GND.
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 3
Rev. B, 08/08/2013
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel
IS31AP4915A-QFLS2-TR QFN-16, Lead-free 2500
Copyright©2013IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatany
timewithoutnotice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersare
advisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts.
IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionofthe
productcanreasonablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenot
authorizedforuseinsuchapplicationsunlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 4
Rev. B, 08/08/2013
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC -0.3V ~ +7.0V
Voltage at any input pin -0.3V ~ VCC+0.3V
Maximum junction temperature, TJMAX 150°C
Storage temperature range, TSTG -65°C ~ +150°C
Operating temperature range, TA −40°C ~ +85°C
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
TA=25°C, VCC = 2.5V ~ 5.5V (unless otherwise noted). (Note 1)
Symbol Parameter Condition Min. Typ. Max. Unit
SVCC, PVCC Supply voltage 2.5 5.5 V
VIH High level input voltage 1.75 V
VIL Low level input voltage 0.5 V
|VOS| Output offset voltage 6 mV
ICC Supply current VCC = 3V, VSDB = VCC 6.0 8.0
mA
VCC = 5V, VSDB = VCC 8.5 10.5
ISD Shutdown current VSDB = 0V 1 µA
ELECTRICAL CHARACTERISTICS
VCC = 3.6V, TA = 25°C (unless otherwise noted). (Note 2)
Symbol Parameter Condition Min. Typ. Max. Unit
VOUT Output voltage
f = 1kHz
THD+N = 10%
RL= 1μF+10Ω
VCC = 5.0V 7.8
VRMS
VCC = 3.6V 5.6
VCC = 2.7V 4.3
THD+N Total harmonic distortion plus
noise
RL= 1μF+10Ω,VOUT = 1kHz/2VRMS 0.004 %
RL= 1μF+10Ω,VOUT = 1kHz/4VRMS 0.014
VNO Noise output voltage 10 µVRMS
fOSC Charge pump switching
frequency 320 kHz
tON Start-up time from shutdown 450 µs
SNR Signal-to-noise ratio 100 dB
TOVP Thermal shutdown threshold 160 °C
THY Thermal shutdown hysteresis 15 °C
Note 1: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other
temperature range, are guaranteed by design, characterization and process control.
Note 2: Guaranteed by design.
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 5
Rev. B, 08/08/2013
TYPICAL OPERATING CHARACTERISTICS
THD+N(%)
20 20k50 100 200 500 1k 2k 5k 10k
Frequency(H z)
0.001
20
0.01
0.1
1
5
VCC = 2.7V
RL= 10Ω+1µH
VOUT = 3.0Vrms
VOUT = 1.25Vrms
Figure 2 THD+N vs. Frequency
THD+N(%)
20 20k50 100 200 500 1k 2k 5k 10k
Frequency(H z)
0.001
20
0.01
0.1
1
5
V
CC
= 5.0V
R
L
= 10Ω+1µH
V
OUT
= 3.0Vrms
V
OUT
= 6.0Vrms
Figure 4 THD+N vs. Frequency
Supply Current(mA)
Supply Voltage(V)
2
3
4
5
6
7
8
2.5 3 3.5 4 4.5 5 5.5
Figure 6 Supply Current vs. Supply Voltage
THD+N(%)
20 20k50 100 200 500 1k 2k 5k 10k
Frequency(H z)
0.001
20
0.01
0.1
1
5
V
CC
= 3.6V
R
L
= 10Ω+1µH
V
OUT
= 2.0Vrms
V
OUT
= 4.0Vrms
Figure 3 THD+N vs. Frequency
THD+N(%)
Output Voltage(V)
0.001
20
0.01
0.1
1
5
18234567
500m
R
L
= 10Ω+1µH
f = 1kHz
V
CC
= 2.7V
V
CC
= 5.0V
V
CC
= 3.6V
Figure 5 THD+N vs. Output Voltage
Supply Current(mA)
Output Voltage(V
RMS
)
0
10
20
30
40
50
60
70
01234567
VCC =5V
f=1kHz
Figure 7 Supply Current vs. Output Voltage
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 6
Rev. B, 08/08/2013
FUNCTIONAL BLOCK DIAGRAM
Bias
IN
SDB
C1P
OUT+
SVCC Click-and-pop
Suppression UVLO &
SD Control Charge Pump
C1N
OUT-
PVCC
SGND
PGND
FB
SVSS
PVSS
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 7
Rev. B, 08/08/2013
APPLICATION INFORMATION
INPUT-BLOCKING CAPACITORS
DC input-blocking capacitors are required to be added
in series with the audio signal into the input pin of the
IS31AP4915A. This capacitor block the DC portion of
the audio source and allow the IS31AP4915A inputs to
be properly biased to provide maximum performance.
These capacitors form a high-pass filter with the input
impedance of the IS31AP4915A. The cutoff frequency
is calculated using Equation 1. For this calculation, the
capacitance used is the input-blocking capacitor and
the resistance is the input impedance of the
IS31AP4915A. Because the gains of both the
IS31AP4915A is fixed, the input impedance remains a
constant value. Using the input impedance value from
the operating characteristics table, the frequency
and/or capacitance can be determined when one of
the two values is given.
ININ
CIN CR
f
2
1
(1)
or
INCIN
IN Rf
C
2
1
CHARGE PUMP FLYING CAPACITOR AND PVSS
CAPACITOR
The charge pump flying capacitor serves to transfer
charge during the generation of the negative supply
voltage. The PVSS capacitor must be at least equal to
the charge pump capacitor in order to allow maximum
charge transfer. Low ESR capacitors are an ideal
selection, and a value of 10μF is typical. Capacitor
values that are smaller than 10μF can be used, but
the maximum output power is reduced and the device
may not operate to specifications
DECOUPLING CAPACITORS
The IS31AP4915A require adequate power supply
decoupling to ensure that the noise and total harmonic
distortion (THD) are low. A good low
equivalent-series-resistance (ESR) ceramic capacitor,
typically 1μF, placed as close as possible to the device
VCC lead works best. Placing this decoupling capacitor
close to the IS31AP4915A is important for the
performance of the amplifier. For filtering lower
frequency noise signals, a 10μF or greater capacitor
placed near the audio power amplifier would also help,
but it is not required in most applications because of
the high PSRR of this device.
LAYOUT RECOMMENDATIONS
The SGND and PGND pins of the IS31AP4915A must
be routed separately back to the decoupling capacitor
in order to provide proper device operation. If the
SGND and PGND pins are connected directly to each
other, the part functions without risk of failure, but the
noise and THD performance do not meet the
specifications.
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 8
Rev. B, 08/08/2013
CLASSIFICATION REFLOW PROFI LES
Profile Feature Pb-Free Assembly
Preheat & So ak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp) 3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc) Max 30 seconds
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.
Figure 8 Classification Profile
IS31AP4915A
Integrated Silicon Solution, Inc. – www.issi.com 9
Rev. B, 08/08/2013
PACKAGE INFORMATION
QFN-16
Note: All dimensions in millimeters unless otherwise stated.
