a High-Speed, Dual Operational Amplifier OP271 PIN CONNECTIONS FEATURES Excellent Speed: 8.5 V/ms Typ Fast Settling (0.01%): 2 ms Typ Unity-Gain Stable High-Gain Bandwidth: 5 MHz Typ Low Input Offset Voltage: 200 mV Max Low Offset Voltage Drift: 21 mV/C Max High Gain: 400 V/mV Min Outstanding CMR: 106 dB Min Industry Standard 8-Pin Dual Pinout Available in Die Form GENERAL DESCRIPTION -IN A 1 16 OUT A +IN A 2 15 NC NC 3 14 NC V- 4 13 V+ NC 5 12 NC +IN B 6 11 NC -IN B 7 10 OUT B NC 8 9 NC NC = NO CONNECT The OP271 is a unity-gain stable monolithic dual op amp featuring excellent speed, 8.5 V/ms typical, and fast settling time, 2 ms typical to 0. 01%. The OP271 has a gain bandwidth of 5 MHz with a high phase margin of 62. 16-Pin SOL (S-Suffix) Input offset voltage of the OP271 is under 200 mV with input offset voltage drift below 2 mV/C, guaranteed over the full military temperature range. Open-loop gain exceeds 400,000 into a 10 kW load ensuring outstanding gain accuracy and linearity. The input bias current is under 20 nA limiting errors due to source resistance. The OP271's outstanding CMR, over 106 dB, and low PSRR, under 5.6 mV/V, reduce errors caused by ground noise and power supply fluctuations. In addition, the OP27l exhibits high CMR and PSRR over a wide frequency range, further improving system accuracy. 8 V+ OUT A 1 -IN A 2 A - + B + - 7 OUT B +IN A 3 6 -IN B V- 4 5 +IN B Epoxy Mini-DIP (P-Suffix) 8-Pin Hermetic DIP (Z-Suffix) V+ BIAS OUT -IN +IN V- REV. A Figure 1. Simplified Schematic (One of the two amplifiers is shown.) Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002 OP271-SPECIFICATIONS ELECTRICAL CHARACTERISTICS (V = 15 V, T = 25C, unless otherwise noted.) S Parameter Symbol INPUT OFFSET VOLTAGE VOS INPUT OFFSET CURRENT IOS INPUT BIAS CURRENT INPUT NOISE VOLTAGE DENSITY LARGE-SIGNAL VOLTAGE GAIN INPUT VOLTAGE RANGE Conditions A OP271A/E Min Typ Max Min OP271F Typ Max Min OP271G Typ Max Unit 75 200 150 300 200 400 mV VCM = 0 V 1 10 4 15 7 20 nA IB VCM = 0 V 4 20 6 40 12 60 nA en fO = 1 kHz 7.6 AVO VO = 10 V RL = 10 kW RL = 2 kW IVR 7.6 7.6 nV/Hz 400 300 650 500 300 200 500 300 250 175 400 250 V/mV V/mV 12 12.5 12 12.5 12 12.5 V OUTPUT VOLTAGE SWING VO RL 2 kW 12 13 12 13 12 13 V COMMON-MODE REJECTION CMR VCM = 12 V 106 120 100 115 90 105 dB POWER SUPPLY REJECTION RATIO PSRR VS = 4.5 V to 18 V SLEW RATE SR PHASE MARGIN um AV = +1 62 SUPPLY CURRENT (ALL AMPLIFIERS) ISY No Load 45 GAIN BANDWIDTH PRODUCT CHANNEL SEPARATION 0.6 5.5 GBW CS 3.2 8.5 1.8 5.5 125 125 8.5 6.5 4.5 175 175 125 125 2.4 5.5 62 5 VO = 20 Vp-p fO = 10 Hz 5.6 6.5 7.0 mV/V 8.5 V/ms 62 degrees 4.5 6.5 mA 5 5 MHz 175 175 175 175 dB dB INPUT CAPACITANCE CIN 3 3 3 pF INPUT RESISTANCE DIFFERENTIALMODE RIN 0.4 0.4 0.4 MW INPUT RESISTANCE COMMON MODE RINCM 20 20 20 GW SETTLING TIME tS 2 2 2 ms AV = +1, 10 V Step to 0.01% NOTES 1 Guaranteed by CMR test. 2 Guaranteed but not 100% tested. -2- REV. A OP271 ELECTRICAL CHARACTERISTICS (V = 15 V, -55C T 125C for OP271A, unless otherwise noted.) S A OP271A Typ Max Unit VOS 115 400 mV AVERAGE INPUT OFFSET VOLTAGE DRIFT TCVOS 0.4 2 mV/C INPUT OFFSET CURRENT IOS VCM = 0 V 1.5 30 nA INPUT BIAS CURRENT IB VCM = 0 V 7 60 nA LARGE-SIGNAL VOLTAGE GAIN AVO VO = 10 V RL = 10 kW RL = 2 kW INPUT VOLTAGE RANGE1 IVR OUTPUT VOLTAGE SWING VO COMMON-MODE REJECTION Parameter Symbol INPUT OFFSET VOLTAGE Conditions Min 300 200 600 500 V/mV V/mV 12 12.5 V RL 2 kW 12 13 V CMR VCM = 12 V 100 120 dB POWER SUPPLY REJECTION RATIO PSRR VS = 4.5 V to 18 V 1.0 5.6 mV/V SUPPLY CURRENT (ALL AMPLIFIERS) ISY No Load 5.3 75 mA OP271G Typ Max Unit NOTE 1 Guaranteed by CMR test. ELECTRICAL CHARACTERISTICS (VS = 15 V, -40C TA +85C, unless otherwise noted.) Parameter Symbol Min INPUT OFFSET VOLTAGE VOS Conditions AVERAGE INPUT OFFSET VOLTAGE DRIFT TCVOS OP271A/E Typ Max Min OP271F Typ Max Min 100 330 215 560 300 700 mV 0.4 2 1 4 2.0 5 mV/C INPUT OFFSET CURRENT IOS VCM = 0 V 1 30 5 40 15 50 nA INPUT BIAS CURRENT IB VCM = 0 V 6 60 10 70 15 80 nA AVO VO = 10 V RL = 10 kW RL = 2 kW LARGE-SIGNAL VOLTAGE GAIN INPUT VOLTAGE RANGE1 IVR 300 200 600 500 200 100 500 400 150 90 400 300 V/mV V/mV 12 12.5 12 12.5 12 12.5 V OUTPUT VOLTAGE SWING VO RL 2 kW 12 13 12 13 12 13 V COMMON-MODE REJECTION CMR VCM = 12 V 100 120 94 115 90 100 dB PSRR VS = 4.5 V to 18 V 0.7 5.6 No Load 5.2 7.2 POWER SUPPLY REJECTION RATIO SUPPLY CURRENT (ALL AMPLIFIERS) ISY NOTE 1 Guaranteed by CMR test. REV. A -3- 51.8 5.2 10 7.2 2.0 5.2 15 mV/V 7.2 mA OP271 (Continued from Page 1) ORDERING GUIDE The OP271 offers outstanding dc and ac matching between channels. This is especially valuable for applications such as multiple gain blocks, high-speed instrumentation and amplifiers, buffers and active filters. Package TA = 25C VOS Max (mV) The OP271 conforms to the industry standard, 8-pin dual op amp pinout. It is pin compatible with the TL072, TL082, LF412, and 1458/1558 dual op amps and can be used to significantly improve systems using these devices. 200 200 300 400 400 For applications requiring lower voltage noise, see the OP270. For a quad version of the OP271, see the OP471. CERDIP 8-Pin Plastic Operating Temperature Range OP271GP *OP271GS MIL XND XND XND XND *OP271AZ *OP271EZ *OP271FZ *Not for new design, obsolete April 2002. ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . 1.0 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . 25 mA Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . 300C Junction Temperature (Tj) . . . . . . . . . . . . . -65C to +150C Operating Temperature Range OP271A . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C OP271E, OP271F, OP271G . . . . . . . . . . . -40C to +85C Package Type jA3 jC Unit 8-Pin Hermetic DIP (Z) 8-Pin Plastic DIP (P) 8-Pin SOIC (S) 134 96 92 12 37 27 C/W C/W C/W NOTES 1 Absolute maximum ratings apply to packaged parts, unless otherwise noted. 2 The OP271's inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low-noise performance. If differential voltage exceeds 1.0 V, the input current should be limited to 25 mA. 3 jA is specified for worst case mounting conditions, i.e., jA is specified for device in socket for CERDIP and P-DIP packages; jA is specified for device soldered to printed circuit board for SOIC package. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP271 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. -4- WARNING! ESD SENSITIVE DEVICE REV. A Typical Performance Characteristics- OP271 25 VOLTAGE NOISE DENSITY - nV/ Hz 40 20 10 5 4 3 1/f CORNER = 40Hz 2 1 100 10 FREQUENCY - Hz 10 AT 1kHz 0 5 10 15 SUPPLY VOLTAGE - Volts 20 100 1/f CORNER = 40Hz 0.1 10 100 1k FREQUENCY - Hz 80 60 40 20 0 -20 -75 10k TPC 4. Current Noise Density vs. Frequency 0.001 10 INPUT OFFSET CURRENT - nA 4 2 0 10k -50 -25 0 25 50 75 TEMPERATURE - C 100 TA = 25C VS = 15V 9 8 7 6 5 4 3 2 1 125 0 1 2 3 TIME - Minutes 4 5 TPC 6. Warm-Up Offset Voltage Drift 7 TA = 25C VS = 15V 4 6 100 1k FREQUENCY - Hz TPC 3. Total Harmonic Distortion vs. Frequency 5 VS = 15V VCM = 0V AV = 10 AV = 1 0 TPC 5. Input Offset Voltage vs. Temperature 10 AV = 100 10 VS = 15V 1.0 TA = 25C VS = 15V VO = 10Vp-p RL = 2k 0.01 120 TA = 25C VS = 15V INPUT OFFSET VOLTAGE - V CURRENT NOISE DENSITY - pA/ Hz 15 TPC 2. Voltage Noise Density vs. Supply Voltage 10.0 INPUT BIAS CURRENT - nA AT 10Hz 5 1k TPC 1. Voltage Noise Density vs. Frequency 8 20 CHANGE IN OFFSET VOLTAGE - V 1 0.1 TA = 25C 3 INPUT BIAS CURRENT - nA VOLTAGE NOISE DENSITY - nV/ Hz TA = 25C VS = 15V TOTAL HARMONIC DISTORTION - % 100 2 1 0 -1 -2 -3 6 5 4 3 -4 -2 -75 -50 -25 0 25 50 75 TEMPERATURE - C 100 125 TPC 7. Input Bias Current vs. Temperature REV. A -5 -75 -50 -25 0 25 50 75 TEMPERATURE - C 100 125 TPC 8. Input Offset Current vs. Temperature -5- 2 -12.5 -7.5 -2.5 0 2.5 7.5 COMMON MODE VOLTAGE - Volts 12.5 TPC 9. Input Bias Current vs. Common-Mode Voltage OP271 130 7 7 VS = 15V 110 100 80 70 60 50 40 30 TA = 25C VS = 15V 20 10 1 10 100 1k 10k FREQUENCY - Hz 100k 6 TA = +125C 5 3 1M TPC 10. CMR vs. Frequency TA = +25C 4 TA = -55C 10 15 5 SUPPLY VOLTAGE - Volts 0 +PSR 60 40 80 60 40 1 10 100 0 1k 10k 100k 1M 10M 100M FREQUENCY - Hz TPC 13. PSR vs. Frequency 1 10 100 40 20 0 -20 1k 1k 10k 100k 1M 10M 100M FREQUENCY - Hz TPC 14. Open-Loop Gain vs. Frequency 25 PHASE MARGIN = 62C 140 5 160 0 180 10M 8 VS = 15V 1500 PHASE MARGIN - DEG 120 GAIN 10 100 OPEN-LOOP GAIN - V/mV 15 100k 1M FREQUENCY - Hz 80 TA = 25C RL = 10k PHASE SHIFT - DEG PHASE TA = 25C VS = 15V 10k TPC 15. Closed-Loop Gain vs. Frequency 2000 20 OPEN-LOOP GAIN - dB 60 20 20 0 100 125 TA = 25C VS = 15V CLOSED-LOOP GAIN - dB OPEN-LOOP GAIN - dB PSR - dB -PSR -25 0 25 50 75 TEMPERATURE - C 80 100 80 -50 TA = 25C VS = 15V 120 100 4 TPC 12. Total Supply Current vs. Temperature 140 TA = 25C 120 5 3 -75 20 TPC 11. Total Supply Current vs. Supply Voltage 140 6 1000 500 6 70 GBW 60 50 m 4 2 -5 -10 1 2 3 4 5 FREQUENCY - MHz 6 7 8 10 TPC 16. Open-Loop Gain, Phase Shift vs. Frequency 0 0 5 10 15 SUPPLY VOLTAGE - Volts 20 TPC 17. Open-Loop Gain vs. Supply Voltage -6- 40 -75 -50 -25 GAIN-BANDWIDTH PRODUCT - MHz CMR - dB 90 TOTAL SUPPLY CURRENT - mA TOTAL SUPPLY CURRENT - mA 120 0 0 25 50 75 100 125 150 TEMPERATURE - C TPC 18. Gain-Bandwidth Product, Phase Margin vs. Temperature REV. A OP271 180 20 24 20 TA = 25C VS = 15V 18 16 12 8 16 160 POSITIVE SWING 14 120 12 100 NEGATIVE SWING 10 4 8 6 4 10k 100k 1M FREQUENCY - Hz 0 100 10M TPC 19. Maximum Output Swing vs. Frequency 1k LOAD RESISTANCE - 10k TPC 20. Maximum Output Voltage vs. Load Resistance 12 AV = 1 60 40 AV = 100 0 100 1k 100k 10k FREQUENCY - Hz CHANNEL SEPARATION - dB 10 TA = 25C VS = 15V 180 11 -SR 9 +SR 8 7 170 160 150 140 130 120 110 100 90 80 6 0 25 50 75 -75 -50 -25 TEMPERATURE - C 70 10 100 125 TPC 22. Slew Rate vs. Temperature 1M 10M TA = 25C VS = 15V AV = +1 50mV 5s TPC 24. Large-Signal Transient Response REV. A 1k 10k 100k FREQUENCY - Hz TPC 23. Channel Separation vs. Frequency TA = 25C VS = 15V AV = +1 5V 100 200ns TPC 25. Small Signal Transient Response -7- 1M 10M TPC 21. Output Impedance vs. Frequency 190 VS = 15V SLEW RATE - V/S 80 20 2 0 1k TA = 25C VS = 15V 140 OUTPUT IMPEDANCE - TA = 25C VS = 15V THD = 1% RL = 10k MAXIMUM OUTPUT - Volts PEAK-TO-PEAK AMPLITUDE - Volts 28 OP271 When Rf > 3 k, a pole created by Rf and the amplifier's input capacitance (3 pF) creates additional phase shift and reduces phase margin. A small capacitor in parallel with Rf helps eliminate this problem. APPLICATION INFORMATION Capacitive Load Driving and Power Supply Considerations The OP217 is unity-gain stable and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP271. Computer Simulations Many electronic design and analysis programs include models for op amps which calculate AC performance from the location of poles and zeros. As an aid to designers utilizing such a program, major poles and zeros of the OP271 are listed below. Their location will vary slightly between production lots. Typically, they will be within 15% of the frequency listed. Use of this data will enable the designer to evaluate gross circuit performance quickly, but should not supplant rigorous characterization of a breadboard circuit. In the standard feedback amplifier, the op amp's output resistance combines with the load capacitance to form a low-pass filter that adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 2. The added components, C1 and R3, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 8 are for a load capacitance of up to 1000 pF when used with the OP271. POLES V+ C2 10F + C3 0.1F Low Phase Error Amplifier The simple amplifier depicted in Figure 4, utilizes a monolithic dual operational amplifier and a few resistors to substantially reduce phase error compared to conventional amplifier designs. At a given gain, the frequency range for a specified phase accuracy is over a decade greater than for a standard single op amp amplifier. R3 50 VIN VOUT OP271 C4 10F + C5 0.1F 2.5 MHz 4 X 23 MHz - APPLICATIONS R2 C1 200pF R1 ZEROS 15Hz 1.2 MHz 2 X 32 MHz 8 X 40 MHz CL 1000pF The low phase error amplifier performs second-order frequency compensation through the response of op amp A2 in the feedback loop of A1. Both op amps must be extremely well matched in frequency response. At low frequencies, the A1 feedback loop forces V2/(K1 + 1)=VIN. The A2 feedback loop forces VO/VIN=K1 + 1. The DC gain is determined by the resistor divider around A2. Note that, like a conventional single op amp amplifier, the DC gain is set by resistor ratios only. Minimum gain for the low phase error amplifier is 10. PLACE SUPPLY DECOUPLING CAPACITORS AT OP271 V- Figure 2. Driving Large Capacitive Loads Unity-Gain Buffer Applications When Rf 100 and the input is driven with a fast, large-signal pulse (>1 V), the output waveform will look as shown in Figure 3. R2 R2 = R1 R2 K1 During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf 500 , the output is capable of handling the current requirements (IL 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. 1/2 OP271E A2 1/2 OP271E A1 R1 V2 R1 R1 K1 VIN VO ASSUME: A1 AND A2 ARE MATCHED. OP271 8.5V/s AO(s) = s VO = (K1+1) VIN Figure 4. Low Phase Error Amplifier Figure 3. Pulsed Operation -8- REV. A OP271 Dual 12-Bit Voltage Output DAC The dual voltage output DAC shown in Figure 6 will settle to 12-bit accuracy from zero to full scale in 2 s typically. The CMOS DAC-8222 utilizes a 12-bit, double-buffered input structure allowing faster digital throughput and minimizing digital feedback. 0 PHASE SHIFT - DEG -1 -2 -3 SINGLE OP AMP, CONVENTIONAL DESIGN -4 -5 Fast Current Pump Maximum output current of the fast current pump shown in Figure 7 is 11 mA. Voltage compliance exceeds 10 V with 15 V supplies. The current pump has an output resistance of over 3 M and maintains 12-bit linearity over its entire output range. CASCADED (TWO STAGES) LOW PHASE ERROR AMPLIFIER -6 -7 0.001 0.1 0.01 0.005 0.005 FREQUENCY RATIO - 1/ / 1.0 0.5 R3 10k Figure 5. Phase Error Comparison R1 10k Figure 5 compares the phase error performance of the low phase error amplifier with a conventional single op amp amplifier and a cascaded two-stage amplifier. The low phase error amplifier shows a much lower phase error, particularly for frequencies where T<0.1. For example, phase error of -0.1 occurs at 0.002 T for the single op amplifier, but at 0.11 T for the low phase error amplifier. VIN 2 1/2 OP271FZ R2 10k R5 100 1 3 +15V R4 10k For more detailed information on the low phase error amplifier, see Application Note AN-107. 5 8 7 1/2 OP271FZ 6 4 IOUT = V VIN = IN =10mA/V RS 100 -15V Figure 7. Fast Current Pump +15V 10F 5V 0.1F 21 VDD DAC-8222EW 10V REFERENCE VOLTAGE RFBA 3 8 10pF 4 VREFA DAC A IOUTA 2 2 - 1/2 OP271EZ 3 AGND 12-BIT DATABUS PINS 6-17 VOUTA + 1 4 -15V 0.1F 22 VREFB DAC CONTROL DAC B 18 DAC A/DAC B 19 LDAC 20 WR IOUTB RFBB 24 6 23 - 1/2 OP271EZ 10pF 5 7 + DGND Figure 6. Dual 12-Bit Voltage Output DAC REV. A -9- 10F VOUTB IOUT 11mA OP271 OUTLINE DIMENSIONS 8-Lead Ceramic Dip-Glass Hermetic Seal [CERDIP] (Q-8) 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 8 0.055 (1.40) MAX 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 5 0.310 (7.87) 0.220 (5.59) PIN 1 1 4 8 5 1 4 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 0.180 (4.57) MAX 0.150 (3.81) MIN SEATING 0.070 (1.78) PLANE 0.030 (0.76) 0.015 (0.38) MIN 15 0 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.015 (0.38) 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) 8-Lead Standard Small Outline Package [SOIC] Narrow Body (RN-8) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE 6.20 (0.2440) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.33 (0.0130) 0.50 (0.0196) 0.25 (0.0099) 45 8 0.25 (0.0098) 0 1.27 (0.0500) 0.41 (0.0160) 0.19 (0.0075) COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN -10- REV. A OP271 Revision History Location Page 10/02--Data Sheet changed from REV. 0 to REV. A. Deleted PIN CONNECTIONS Caption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 REV. A -11- -12- PRINTED IN U.S.A. C00326-0-10/02(A)