1
GAL16V8/883
High Performance E2CMOS PLD
Generic Array Logic™
Devices have been discontinued.
Features
HIGH PERFORMANCE E2CMOS® TECHNOLOGY
7.5 ns Maximum Propagation Delay
Fmax = 100 MHz
6 ns Maximum from Clock Input to Data Output
TTL Compatible 12 mA Outputs
UltraMOS® Advanced CMOS Technology
50% REDUCTION IN POWER FROM BIPOLAR
75mA Typ Icc
ACTIVE PULL-UPS ON ALL PINS (GAL16V8D-7 and
GAL16V8D-10)
•E
2 CELL TECHNOLOGY
Reconfigurable Logic
Reprogrammable Cells
100% Tested/100% Yields
High Speed Electrical Erasure (<100ms)
20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
Maximum Flexibility for Complex Logic Designs
Programmable Output Polarity
Also Emulates 20-pin PAL® Devices with Full Function/
Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
100% Functional Testability
APPLICATIONS INCLUDE:
DMA Control
State Machine Control
High Speed Graphics Processing
Standard Logic Speed Upgrade
ELECTRONIC SIGNATURE FOR IDENTIFICATION
I/CLK
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
CLK
8
8
8
8
8
8
8
8
OE
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
PROGRAMMABLE
AND-ARRAY
(64 X 32)
I/OE
Description
The GAL16V8/883 is a high performance E2CMOS program-
mable logic device processed in full compliance to MIL-STD-883.
This military grade device combines a high performance CMOS
process with Electrically Erasable (E2) floating gate technology to
provide the highest speed/power performance available in the
883 qualified PLD market. The GAL16V8D/883, at 7.5ns maxi-
mum propagation delay time, is the world's fastest military quali-
fied CMOS PLD.
The generic GAL architecture provides maximum design flexibil-
ity by allowing the Output Logic Macrocell (OLMC) to be config-
ured by the user. The GAL16V8/883 is capable of emulating all
standard 20-pin PAL® devices with full function/fuse map/para-
metric compatibility.
Unique test circuitry and reprogrammable cells allow complete
AC, DC, and functional testing during manufacture. Therefore,
Lattice Semiconductor delivers 100% field programmability and
functionality of all GAL products. In addition, 100 erase/write
cycles and data retention in excess of 20 years are specified.
220
I/CLKII
I
I
I
I
I
I GND
Vcc
I/O/Q I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/OE
3
4
6
891113
14
16
18
19
1
10 11
20
I/CLK
I
I
I
I
I
I
I
I
GND
Vcc
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/OE
5
15
GAL16V8
Top View
LCC
CERDIP
GAL
16V8
Copyright © 2010 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. April 2010
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
16v8mil_04
Functional Block Diagram
Pin Configuration
Specifications GAL16V8D-7/10/883
2
Devices have been discontinued.
VIL Input Low Voltage Vss – 0.5 0.8 V
VIH Input High Voltage 2.0 Vcc+1 V
IIL1Input or I/O Low Leakage Current 0V VIN VIL (MAX.) 100 μA
IIH Input or I/O High Leakage Current 3.5V VIN VCC ——10μA
VOL Output Low Voltage IOL = MAX. Vin = VIL or VIH 0.5 V
VOH Output High Voltage IOH = MAX. Vin = VIL or VIH 2.4 V
IOL Low Level Output Current 12 mA
IOH High Level Output Current –2 mA
IOS2Output Short Circuit Current VCC = 5V VOUT = 0.5V TA= 25°C –30 –150 mA
ICC Operating Power VIL = 0.5V VIH = 3.0V L-7/-10 75 130 mA
Supply Current ftoggle = 15MHz Outputs Open
1) The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information.
2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester
ground degradation. Characterized but not 100% tested.
3) Typical values are at Vcc = 5V and TA = 25 °C
Recommended Operating Conditions
Case Temperature (TC) .............................. –55 to 125°C
Supply voltage (VCC)
with Respect to Ground ..................... +4.50 to +5.50V
DC Electrical Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
SYMBOL PARAMETER CONDITION MIN. TYP.3MAX. UNITS
Absolute Maximum Ratings(1)
Supply voltage VCC ...................................... –0.5 to +7V
Input voltage applied .......................... –2.5 to VCC +1.0V
Off-state output voltage applied ......... –2.5 to VCC +1.0V
Storage Temperature ................................ –65 to 150°C
Case Temperature with
Power Applied ........................................ –55 to 125°C
1.Stresses above those listed under the “Absolute Maximum Rat-
ings” may cause permanent damage to the device. These are
stress only ratings and functional operation of the device at these
or at any other conditions above those indicated in the operational
sections of this specification is not implied (while programming,
follow the programming specifications).
Specifications GAL16V8D-7/10/883
3
Devices have been discontinued.
tpd A Input or I/O to Combinational Output 1 7.5 2 10 ns
tco A Clock to Output Delay 1617ns
tcf2 Clock to Feedback Delay 6 7 ns
tsu Setup Time, Input or Feedback before Clock7—10ns
th Hold Time, Input or Feedback after Clock0—0—ns
A Maximum Clock Frequency with 76.9 58.8 MHz
External Feedback, 1/(tsu + tco)
fmax3A Maximum Clock Frequency with 76.9 58.8 MHz
Internal Feedback, 1/(tsu + tcf)
A Maximum Clock Frequency with 100 62.5 MHz
No Feedback
twh Clock Pulse Duration, High 5 8 ns
twl Clock Pulse Duration, Low 5 8 ns
ten B Input or I/O to Output Enabled 1 9 10 ns
B OE to Output Enabled 1 7 10 ns
tdis C Input or I/O to Output Disabled 1 9 10 ns
C OE to Output Disabled 1 7 10 ns
PARAMETER UNITS
TEST
COND1.DESCRIPTION
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
SYMBOL PARAMETER MAXIMUM* UNITS TEST CONDITIONS
CIInput Capacitance 10 pF VCC = 5.0V, VI = 2.0V
CI/O I/O Capacitance 10 pF VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
-10
MIN. MAX.
-7
MIN. MAX.
Capacitance (TA = 25°C, f = 1.0 MHz)
AC Switching Characteristics
Over Recommended Operating Conditions
Specifications GAL16V8D/883
4
Devices have been discontinued.
VIL Input Low Voltage Vss – 0.5 0.8 V
VIH Input High Voltage 2.0 Vcc+1 V
IIL Input or I/O Low Leakage Current 0V VIN VIL (MAX.) 10 μA
IIH Input or I/O High Leakage Current 3.5V VIN VCC ——10μA
VOL Output Low Voltage IOL = MAX. Vin = VIL or VIH 0.5 V
VOH Output High Voltage IOH = MAX. Vin = VIL or VIH 2.4 V
IOL Low Level Output Current 12 mA
IOH High Level Output Current –2 mA
IOS1Output Short Circuit Current VCC = 5V VOUT = 0.5V TA= 25°C –30 –150 mA
ICC Operating Power VIL = 0.5V VIH = 3.0V L -15/ -20/-30 75 130 mA
Supply Current ftoggle = 15MHz Outputs Open
1) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester
ground degradation. Characterized but not 100% tested.
3) Typical values are at Vcc = 5V and TA = 25 °C
DC Electrical Characteristics
Over Recommended Operating Conditions (Unless Otherwise Specified)
SYMBOL PARAMETER CONDITION MIN. TYP.2MAX. UNITS
Absolute Maximum Ratings(1)
Supply voltage VCC ...................................... –0.5 to +7V
Input voltage applied .......................... –2.5 to VCC +1.0V
Off-state output voltage applied ......... –2.5 to VCC +1.0V
Storage Temperature ................................ –65 to 150°C
Case Temperature with
Power Applied ........................................ –55 to 125°C
1.Stresses above those listed under the “Absolute Maximum Rat-
ings” may cause permanent damage to the device. These are
stress only ratings and functional operation of the device at these
or at any other conditions above those indicated in the operational
sections of this specification is not implied (while programming,
follow the programming specifications).
Recommended Operating Conditions
Case Temperature (TC) .............................. –55 to 125°C
Supply voltage (VCC)
with Respect to Ground ..................... +4.50 to +5.50V
Specifications GAL16V8D/883
5
Devices have been discontinued.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL PARAMETER MAXIMUM* UNITS TEST CONDITIONS
CIInput Capacitance 10 pF VCC = 5.0V, VI = 2.0V
CI/O I/O Capacitance 10 pF VCC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
tpd A Input or I/O to Combinational Output 3 15 3 20 3 30 ns
tco A Clock to Output Delay 2 12 2 15 2 20 ns
tcf2 Clock to Feedback Delay 12 15 20 ns
tsu Setup Time, Input or Feedback before Clock12 15 25 ns
th Hold Time, Input or Feedback after Clock0— 0— 0 ns
A Maximum Clock Frequency with 41.6 33.3 22.2 MHz
External Feedback, 1/(tsu + tco)
fmax3A Maximum Clock Frequency with 41.6 33.3 22.2 MHz
Internal Feedback, 1/(tsu + tcf)
A Maximum Clock Frequency with 50 41.6 33.3 MHz
No Feedback
twh Clock Pulse Duration, High 10 12 15 ns
twl Clock Pulse Duration, Low 10 12 15 ns
ten B Input or I/O to Output Enabled 15 20 30 ns
B OE to Output Enabled 15 18 25 ns
tdis C Input or I/O to Output Disabled 15 20 30 ns
C OE to Output Disabled 15 18 25 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
-20
MIN. MAX.
-15
MIN. MAX.
PARAMETER UNITS
DESCRIPTION
TEST
COND1.
-30
MIN. MAX.
AC Switching Characteristics
Over Recommended Operating Conditions
Specifications GAL16V8/883
6
Devices have been discontinued.
Registered OutputCombinatorial Output
OE to Output Enable/DisableInput or I/O to Output Enable/Disable
fmax with Feedback
Clock Width
COMBINATIONAL
OUTPUT
VALID INPUT
INPUT or
I/O FEEDBACK
tpd
COMBINATIONAL
OUTPUT
INPUT or
I/O FEEDBACK
ten
tdis
CLK
(
w/o fb
)
1/fmax
twl
twh
INPUT or
I/O FEEDBACK
REGISTERED
OUTPUT
CLK
VALID INPUT
(external fdbk)
tsu
tco
th
1/fmax
OE
REGISTERED
OUTPUT
ten
tdis
CLK
REGISTERED
FEEDBACK
tcf tsu
1/fmax (internal fdbk)
Switching Waveforms
Specifications GAL16V8/883
7
Devices have been discontinued.
fmax with Internal Feedback 1/(tsu+tcf)
Note: tcf is a calculated value, derived by subtracting tsu from
the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The
value of tcf is used primarily when calculating the delay from
clocking a register to a combinatorial output (through registered
feedback), as shown above. For example, the timing from clock
to a combinatorial output is equal to tcf + tpd.
fmax with External Feedback 1/(tsu+tco)
Note: fmax with external feedback is calculated from measured
tsu and tco.
Input Pulse Levels GND to 3.0V
Input Rise and Fall Times 3ns 10% – 90%
Input Timing Reference Levels 1.5V
Output Timing Reference Levels 1.5V
Output Load See Figure
3-state levels are measured 0.5V from steady-state active level.
Output Load Conditions (see figure)
Test Condition R1R2CL
A 390Ω750Ω50pF
B Active High 750Ω50pF
Active Low 390Ω750Ω50pF
C Active High 750Ω5pF
Active Low 390Ω750Ω5pF
TEST POINT
C *
L
FROM OUTPUT (O/Q) 
UNDER TEST
+5V
*C
L
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
R
2
R
1
REGISTER
LOGIC
ARRAY
t
co
t
su
CLK
fmax with No Feedback
Note: fmax with no feedback may be less than 1/(twh + twl). This
is to allow for a clock duty cycle of other than 50%.
REGISTER
LOGIC
ARRAY
CLK
tsu + th
CLK
REGISTER
LOGIC
ARRAY
t
cf
t
pd
fmax Descriptions
Switching Test Conditions
Specifications GAL16V8/883
8
Devices have been discontinued.
MIL Process /883 = 883 Process
Package
PowerL = Low Power
Speed (ns)
XXXXXXXX XX X X X
Device Name
_
D = CERDIP
R = LCC
GAL16V8D
Note: Lattice Semiconductor recognizes the trend in military device procurement
towards using SMD compliant devices, as such, ordering by this number is recom-
mended.
GAL16V8 Ordering Information (MIL-STD-883 and SMD)
Part Number Description
1. Discontinued per PCN #06-07.
2. Discontinued per PCN #05A-10.
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