4
LT1007/LT1037
sn100737 100737fbs
The ● denotes the specifications which apply over the temperature range –40°C ≤ TA ≤ 85°C, VS = ±15V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 seconds after application of power. AM
and AC grades are guaranteed fully warmed up.
Note 3: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs Time over extended periods after the first 30
days of operation. Excluding the initial hour of operation, changes in V
OS
during the first 30 days are typically 2.5µV. Refer to typical performance
curve.
Note 4: This parameter is tested on a sample basis only.
Note 5: 10Hz noise voltage density is sample tested on every lot. Devices
100% tested at 10Hz are available on request.
Note 6: See the test circuit and frequency response curve for 0.1Hz to
10Hz tester in the Applications Information section.
Note 7: See the test circuit for current noise measurement in the
Applications Information section.
Note 8: This parameter is guaranteed by design and is not tested.
Note 9: The inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±0.7V, the input current should be limited to 25mA.
Note 10: The Average Input Offset Drift performance is within the
specifications unnulled or when nulled with a pot having a range of 8kΩ to
20kΩ.
The ● denotes the specifications which apply over the temperature range –55°C ≤ TA ≤ 125°C, VS = ±15V, unless otherwise noted.
LT1007I/LT1037I
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage (Note 2) ●40 125 µV
∆V
OS
Average Input Offset Drift (Note 10) ●0.3 1.0 µV/°C
∆Temp
I
OS
Input Offset Current ●20 80 nA
I
B
Input Bias Current ●±25 ±90 nA
Input Voltage Range ●±10 ±11.7 V
CMRR Common Mode Rejection Ratio V
CM
= ±10.5V ●105 120 dB
PSRR Power Supply Rejection Ratio V
S
= ±4.5V to ±18V ●101 120 dB
A
VOL
Large-Signal Voltage Gain R
L
≥ 2k, V
O
= ±10V ●2.0 15.0 V/µV
R
L
≥ 1k, V
O
= ±10V ●1.5 12.0 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2k ●±12.0 ±13.6 V
P
D
Power Dissipation ●95 165 mW
LT1007AM/LT1037AM LT1007M/LT1037M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage (Note 2) ●25 60 50 160 µV
∆V
OS
Average Input Offset Drift (Note 10) ●0.2 0.6 0.3 1.0 µV/°C
∆Temp
I
OS
Input Offset Current ●15 50 20 85 nA
I
B
Input Bias Current ●±20 ±60 ±35 ±95 nA
Input Voltage Range ●±10.3 ±11.5 ±10.3 ±11.5 V
CMRR Common Mode Rejection Ratio V
CM
= ±10.3V ●112 126 104 120 dB
PSRR Power Supply Rejection Ratio V
S
= ±4.5V to ±18V ●104 126 100 120 dB
A
VOL
Large-Signal Voltage Gain R
L
≥ 2k, V
O
= ±10V ●3.0 14.0 2.0 14.0 V/µV
R
L
≥ 1k, V
O
= ±10V ●2.0 10.0 1.5 10.0 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2k ●±12.5 ±13.5 ±12.0 ±13.5 V
P
D
Power Dissipation ●100 150 100 170 mW