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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FL7733A Primary-Side-Regulated LED Driver with Power Factor Correction Features Description Performance The FL7733A is a highly-integrated PWM controller with advanced Primary-Side Regulation (PSR) technique to minimize components in low-to-mid-power LED lighting converters. < 3% Total Constant Current Tolerance Over All Conditions < 1% Over Universal Line Voltage Variation < 1% from 50% to 100% Load Voltage Variation < 1% with 20% Magnetizing Inductance Variation Primary-Side Regulation (PSR) Control for CostEffective Solution without Requiring Input Bulk Capacitor and Secondary Feedback Circuitry Application Input Voltage Range: 80 VAC - 308 VAC Fast < 200 ms Start-up (at 85 VAC) using Internal High-Voltage Startup with VDD Regulation Adaptive Feedback Loop Control for Startup without Overshoot High PF of >0.9, and Low THD of < 10% Over Universal Line Input Range System Protection LED Short / Open Protection Output Diode Short Protection Sensing Resistor Short / Open Protection VDD Over-Voltage Protection (OVP) VDD Under-Voltage Lockout (UVLO) Over-Temperature Protection (OTP) All Protections are Auto Restart (AR) Using an innovative TRUECURRENT(R) technology to provide tight tolerance constant-current output, this LED driver enables designs with constant current (CC) tolerance of less than 1% over the universal line voltage range to meet stringent LED brightness requirements. By minimizing turn-on time fluctuation, high power factor and low THD over the universal line range are obtained in the FL7733A. An integrated high-voltage startup circuit implements fast startup and high system efficiency. During startup, adaptive feedback loop control anticipates the steady-state condition and sets initial feedback condition close to the steady state to ensure no overshoot or undershoot of LED current. The FL7733A also provides powerful protections, such as LED short / open, output diode short, sensing resistor short / open, and over-temperature for high system reliability. The FL7733A controller is available in an 8-pin SmallOutline Package (SOP). Related Product Resources FL7733A Product Folder . Cycle-by-Cycle Current Limit Applications Low to Mid Power LED Lighting Systems of 5 W to greater than 60 W Compatible with Analog Dimming function Ordering Information Part Number Operating Temperature Range FL7733AMX -40C to +125C (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 Package Packing Method 8-Lead, Small Outline Package (SOP-8) Tape & Reel www.fairchildsemi.com FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction December 2014 DC Output AC Input 2 8 HV GATE 6 COMI 3 GND CS 1 VDD 4 NC VS 5 7 Figure 1. Typical Application Block Diagram Shutdown HV Max. Duty Controller 8 250 ms Timer Gate Driver S EAV Q + VDD 4 R VDD Good + + VOVP GATE 1 CS 6 COMI 5 VS OCP 1.35 V Current Limit Control 2 SRSP Monitor SRSP VCS-CL + 0.1 V - VDD OVP + + LEB Sawtooth Generator Internal Bias OSC 3 EAI Q Error Amp. R SLP OCP VDD Good OTP SRSP VS OVP VREF tDIS Detector Line Compensator TRUECURRENT(R) Calculation 3V VS OVP + N.C DCM Controller + GND S 7 EAV SLP Monitor + SLP Figure 2. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 Sample & Hold 0.3 V Functional Block Diagram www.fairchildsemi.com 2 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Application Diagram 4 3 F: Z: X: Y: TT: T: M: 4 3 ZXYTT 7733A TM Fairchild Logo Plant Code 1-Digit Year Code 1-Digit Week Code 2-Digit Die Run Code Package Type (M=SOP) Manufacture Flow Code Figure 3. Top Mark Pin Configuration CS 1 8 HV GATE 2 7 NC GND 3 6 3 COMI VDD 4 5 4 VS Figure 4. Pin Configuration (Top View) Pin Descriptions Pin # Name Description 1 CS 2 GATE PWM Signal Output. This pin uses the internal totem-pole output driver to drive the power MOSFET. 3 GND Ground 4 VDD Power Supply. IC operating current and MOSFET driving current are supplied using this pin. 5 VS 6 COMI 7 NC No Connect 8 HV High Voltage. This pin is connected to the rectified input voltage via a resistor. Current Sense. This pin connects a current-sense resistor to detect the MOSFET current for constant output current regulation. Voltage Sense. This pin detects the output voltage and discharge time information for CC regulation. This pin is connected to the auxiliary winding of the transformer via a resistor divider. Constant Current Loop Compensation. This pin is connected to a capacitor between COMI and GND for compensating the current loop gain. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 www.fairchildsemi.com 3 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Marking Information Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol HV Parameter Min. HV Pin Voltage Max. Unit 700 V (1,2) VVDD DC Supply Voltage 30 V VVS VS Pin Input Voltage -0.3 6.0 V VCS CS Pin Input Voltage -0.3 6.0 V VCOMI COMI Pin Input Voltage -0.3 6.0 V VGATE GATE Pin Input Voltage -0.3 30.0 V PD Power Dissipation (TA50C) 633 mW TJ Maximum Junction Temperature 150 C 150 C 260 C TSTG TL Storage Temperature Range -55 Lead Temperature (Soldering) 10 Seconds Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to GND pin. Thermal Impedance TA=25C, unless otherwise specified. Symbol Parameter Value Unit JA Junction-to-Ambient Thermal Impedance 158 C/W JC Junction-to-Case Thermal Impedance 39 C/W Note: 3. Referenced the JEDEC recommended environment, JESD51-2, and test board, JESD51-3, 1S1P with minimum land pattern. ESD Capability Symbol ESD Parameter Value Human Body Model, ANSI/ESDA/JEDEC JS-001-2012 5 Charged Device Model, JESD22-C101 2 Unit kV Note: 4. Meets JEDEC standards JESD22-A114 and JESD 22-C101. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 www.fairchildsemi.com 4 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Absolute Maximum Ratings VDD=15 V, TJ=-40 to +125C, unless otherwise specified. Currents are defined as positive into the device and negative out of device. Symbol Parameter Conditions Min. Typ. Max. Unit VDD-ON Turn-On Threshold Voltage 14.5 16.0 17.5 V VDD-OFF Turn-Off Threshold Voltage 6.75 7.75 8.75 V 3 4 5 mA 30 50 A 24 25 V 1.5 V IDD-OP Operating Current CL=1 nF, f=fMAX-CC IDD-ST Startup Current VDD=VDD-ON-1.6 V VVDD-OVP VDD Over-Voltage Protection Level 23 GATE SECTION VOL Output Voltage Low TA=25C, VDD=20 V, IDD_GATE=1 mA VOH Output Voltage High TA=25C, VDD=10 V, IDD=1 mA ISOURCE ISINK Peak Sourcing Current Peak Sinking Current (5) (5) 5 V VDD=10 ~ 20 V -60 mA VDD=10 ~ 20 V 180 mA tR Rising Time TA=25C, VDD=15 V, CLOAD =1 nF 100 150 200 ns tF Falling Time TA=25C, VDD=15 V, CLOAD=1 nF 20 60 100 ns Output Clamp Voltage VDD=20 V, VCS=0 V, VVS=0 V, VCOM=0 V 12 15 18 V 9 mA 1 10 A 190 250 310 ms VCLAMP HV STARTUP SECTION IHV Supply Current From HV Pin IHV-LC Leakage Current after Startup tR-JFET JFET Regulation Time after (5) Startup TA=25C, VIN=90 VAC, VDD =0 V TA=25C VJFET-HL JFET Regulation High Limit Voltage 17.5 19.0 20.5 V VJFET-LL JFET Regulation Low Limit Voltage 11.5 13.0 14.5 V TA=25C 11 17 23 mho CURRENT-ERROR-AMPLIFIER SECTION (5) gM Transconductance ICOMI-SINK COMI Sink Current TA=25C, VEAI=2.55 V, VCOMI=5 V 12 18 24 A |COMI Source Current| TA=25C, VEAI=0.45 V, VCOMI=0 V 12 18 24 A VCOMI-HGH COMI High Voltage VEAI=0 V 4.7 VCOMI-LOW COMI Low Voltage ICOMI-SOURCE VCOMI_INT.CLP tCOMI_INT.CLP Initial COMI Clamping Voltage V VEAI=5 V (5) Time for Initial COMI Clamping (5) 0.1 V 1.2 V 15 ms Continued on the following page... (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 www.fairchildsemi.com 5 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Electrical Characteristics VDD=15 V, TJ=-40 to +125C, unless otherwise specified. Currents are defined as positive into the device and negative out of device. Symbol Parameter Conditions Min. Typ. Max. Unit VOLTAGE-SENSE SECTION (5) tDIS-BNK tDIS Blanking Time of VS 0.85 1.15 1.45 s IVS-BNK VS Current for VS Blanking -75 -90 -105 A VVS-OVP VS Level for Output Over-Voltage Protection 2.95 3.00 3.15 V VVS-LOW-CL-EN VS Threshold Voltage to Enable Low (5) Current Limit 0.25 0.30 0.35 V VVS-HIGH-CL-DIS VS Threshold Voltage to Disable (5) Low Current Limit 0.54 0.60 0.66 V VVS-SLP-TH VS Threshold Voltage for Output Short-LED Protection 0.25 0.30 0.35 V tSLP-BNK VS Detection Disable Time after (5) Startup TA=25C 15 ms CURRENT-SENSE SECTION VRV tLEB Reference Voltage TA=25C Leading-Edge Blanking Time 1.485 (5) (5) VCOMI=0 V 1.500 1.515 V 300 ns 500 ns tMIN Minimum On Time in CC tPD Propagation Delay to GATE Output 50 100 150 ns VCS-HIGH-CL High Current Limit Threshold 0.9 1.0 1.1 V VCS-LOW-CL Low Current Limit Threshold 0.16 0.20 0.24 V tLOW-CM Low Current Mode Operation Time (5) at Startup VCS-SRSP VCS Threshold Voltage for Sensing Resistor Short Protection VCS-OCP VCS Threshold Voltage for OverCurrent Protection VCS / IVS Relation of Line Compensation (5) Voltage and VS Current 20 TA=25C 1.20 1.35 ms 0.1 V 1.50 V 21.5 V/A OSCILLATOR SECTION fMAX-CC Maximum Frequency in CC TA=25C, VS=3.0 V 65 70 75 kHz fMIN-CC Minimum Frequency in CC TA=25C, VS=0.3 V 23.0 26.5 30.0 kHz tON-MAX Maximum Turn-On Time TA=25C, f=fMAX-CC 11.0 13.0 15.0 s OVER-TEMPERATURE-PROTECTION SECTION TOTP TOTP-HYS Threshold Temperature for OTP (5) Restart Junction Temperature (5) Hysteresis 150 o C 10 o C Note: 5. These parameters, although guaranteed by design, are not production tested. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 www.fairchildsemi.com 6 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Electrical Characteristics (Continued) 1.5 1.3 1.3 Normalized Normalized 1.5 1.1 0.9 0.7 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 0 Temperature () VDD-ON vs. Temperature Figure 6. 1.5 1.5 1.3 1.3 Normalized Normalized Figure 5. 1.1 0.9 0.7 50 75 100 125 VDD-OFF vs. Temperature 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 0 Temperature () Figure 7. 25 50 75 100 125 Temperature () IDD-OP vs. Temperature Figure 8. 1.5 1.5 1.3 1.3 Normalized Normalized 25 Temperature () 1.1 0.9 0.7 VDD-OVP vs. Temperature 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 0 Temperature () Figure 9. fMAX-CC vs. Temperature (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 25 50 75 100 125 Temperature () Figure 10. fMIN-CC vs. Temperature www.fairchildsemi.com 7 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Typical Performance Characteristics 1.5 1.3 1.3 Normalized Normalized 1.5 1.1 0.9 0.7 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 0 Temperature () VVR vs. Temperature Figure 12. 1.5 1.5 1.3 1.3 Normalized Normalized Figure 11. 1.1 0.9 0.7 50 75 100 125 100 125 Gm vs. Temperature 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 0 Temperature () Figure 13. 25 50 75 Temperature () ICOMI-SOURCE vs. Temperature Figure 14. 1.5 1.5 1.3 1.3 Normalized Normalized 25 Temperature () 1.1 0.9 0.7 ICOMI-SINK vs. Temperature 1.1 0.9 0.7 0.5 0.5 -40 -20 0 25 50 75 100 125 -40 -20 Temperature () Figure 15. 25 50 75 100 125 Temperature () VVS-OVP vs. Temperature (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 0 Figure 16. VCS-OCP vs. Temperature www.fairchildsemi.com 8 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Typical Performance Characteristics (Continued) VDD = VDD_ON FL7733A is AC-DC PWM controller for LED lighting (R) applications. TRUECURRENT technology regulate accurate constant LED current independent of input voltage, output voltage, and magnetizing inductance variations. The DCM control in the oscillator reduces conduction loss and maintains DCM operation over a wide range of output voltage, which implements high power factor correction in a single-stage flyback or buck-boost topology. A variety of protections, such as LED short / open protection, sensing resistor short / open protection, over-current protection, overtemperature protection, and cycle-by-cycle current limitation stabilize system operation and protect external components. VIN High Line Low line Current Mode VCS Voltage Mode 0.2 V VCOMI Low line High Line 1.0 V 15 ms ILED Startup Time 20 ms Startup Time At startup, an internal high-voltage JFET supplies startup current and VDD capacitor charging current, as shown in Figure 17. When VDD reaches 16 V, switching begins and the internal high-voltage JFET continues to supply VDD operating current for an initial 250 ms to maintain VDD voltage higher than VDD-OFF. As the output voltage increases, the auxiliary winding becomes the dominant VDD supply current source. Figure 18. PFC and THD In the flyback or the buck-boost topology, constant turnon time and constant frequency in Discontinuous Conduction Mode (DCM) operation can achieve high PF and low THD, as shown in Figure 19. Constant turn-on time is maintained by the internal error amplifier and a large external COMI capacitor (typically over 1 F) at COMI pin. Constant frequency and DCM operation are managed by DCM control. VDC RVS1 CVDD RVS2 HV VDD 8 Startup Sequence Primary current peak envelope Secondary current peak envelope Average input current 4 VS 250 ms Timer Internal Bias 5 VDD Good 16 V / 7.75 V Figure 17. Constant tON Startup Block Figure 19. Switching is controlled by current-mode for 20 ms after VDD-ON. During current-mode switching with the flyback or buck-boost topology, output current is only determined by output voltage. Therefore, the output voltage increases with constant slope, regardless of line voltage variation. Short-LED Protection (SLP) is enabled after the 15 ms SLP blanking time so that the output voltage is higher than SLP threshold voltage and successful startup is guaranteed without SLP in normal condition. Constant-Current Regulation The output current can be estimated using the peak drain current and inductor current discharge time because output current is the same as the average of the diode current in steady state. The peak value of the drain current is determined by the CS peak voltage detector. The inductor current discharge time (tDIS) is sensed by a tDIS detector. With peak drain current, inductor current discharging time and operating switching period information, the TRUECURRENT(R) calculation block estimates output current as follows: During current-mode switching, COMI voltage, which determines turn-on time in voltage mode, is adjusted close to the steady state level. The COMI capacitor is charged to 1.2 V for 15 ms and adjusted to a modulated level inversely proportional to VIN peak value for 5 ms. Turn-on time right after 20 ms startup time can be controlled close to steady state on time so that voltage mode is smoothly entered without LED current overshoot or undershoot. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 Constant tOFF Power Factor Correction Io 1 t DIS 1 VCS nPS 2 tS RS t DIS VCS 0.25 tS Io 0.125 nPS RS www.fairchildsemi.com 9 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Functional Description Gate Driver VCS RS ID.pk VOUT tDIS Detector IO 5 ID IDS VF * Vo * Na Ns Na Ns S/H Figure 21. DCM and BCM Control Figure 20. Key Waveforms for Primary-Side Regulation 3 n Vo 5 Lm Ipk 5 Tdis 3 Figure 22. Ipk 4 / 3 Tdis 4 / 3T Iavg Ipk 5 / 3Tdis 5 / 3T 5 T 3 Primary and Secondary Current BCM Control The end of secondary diode conduction time could possibly be behind the end of a switching period set by DCM control. In this case, the next switching cycle starts at the end of secondary diode conduction time since FL7733A doesn't allow CCM. Consequently, the operation mode changes from DCM to Boundary Conduction Mode (BCM). Analog Dimming Function DCM Control Analog dimming function can be implemented by controlling COMI voltage which determines the turn-on time of main power MOSFET. Figure 23 shows an example analog dimming circuit for the FL7733A which uses a photo-coupler so the LED current can be controlled by the dimming signal, A-Dim, from the secondary side of the isolation transformer. As mentioned above, DCM should be guaranteed for high power factor in flyback topology. To maintain DCM across a wide range of output voltage, the switching frequency is linearly adjusted by the output voltage in linear frequency control in the whole Vs range. Output voltage is detected by the auxiliary winding and the resistive divider connected to the VS pin, as shown in Figure 21. When the output voltage decreases, secondary diode conduction time is increased and the DCM control lengthens the switching period, which retains DCM operation over the wide output voltage range, as shown in Figure 22. The frequency control lowers the primary rms current with better power efficiency in full-load condition. COMI VDC ICOMI CCOMI A-Dim Signal (0 ~ VDC) Figure 23. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 Iavg 4 T 3 4 Tdis 3 The output of the current calculation is compared with an internal precise voltage reference to generate an error voltage (VCOMI), which determines the MOSFET's turn-on time in voltage-mode control. With this Fairchild's innovative TRUECURRENT(R) technology, constant-current output can be precisely controlled. Although the output current is calculated with accurate method the output current at high input voltage may still be higher than that at low input voltage due to MOSFET's turn off propagation delay caused by high Qg. To maintain tight CC regulation over the entire input voltage range, a line compensation resistor of 100 ~ 500 can be inserted between the CS pin and the source terminal of the MOSFET. The voltage across by compensation resistor is dependent on current flow out of the CS pin for MOSFET turn-on and it is proportional to input voltage. Ipk Tdis T T 3 n Vo 4 Lm Ipk tS Iavg nVo Lm Ipk tDIS VS DCM Controller Tdis tON GATE CC Control OSC Ipk = 2 Analog Dimming Control www.fairchildsemi.com 10 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction where, nPS is the primary-to-secondary turn ratio and RS is a sensing resistor connected between the source terminal of the MOSFET and ground. 8 HV - VDD In case of a short-LED condition, the secondary diode is stressed by high current. When VS voltage is lower than 0.3 V due to a short-LED condition, the cycle-by-cycle current limit level changes to 0.2 V from 1.0 V and SLP is triggered if the VS voltage is less than 0.3 V for four (4) consecutive switching cycles. Figure 24 and Figure 25 show the SLP block and operational waveforms during LED-short condition. To set enough auto-restart time for system safety under protection conditions, VDD is maintained between 13 V and 19 V, which is higher than UVLO, for 250 ms after VDD-ON. SLP is disabled for an initial 15 ms to ensure successful startup in normal LED condition. + 19 V / 13 V 250 ms Timer + VDD OVP 8 + 19 V / 13 V EAV HV VOUT 250 ms Timer LED Open 4 VDD 16 V / 7.75 V 15 ms Timer Internal OVP Block VDD-OVP x Ns Na + SLP is disabled for initial 15 ms 5 VS S/H VS-OVP Figure 26. VDD Good 16 V / 7.75 V VDD-OVP VS OVP VDD 4 VDD - VDD Good EAV 3V S/H SLP 5 VS VDD VDD-OVP 0.3 V 19 V VDD ON Figure 24. VIN Internal SLP Block 13 V VDD OFF LED short 250 ms JFET regulation Gate VCS Figure 27. Sensing Resistor Short Protection (SRSP) 0.2 V In a sensing resistor short condition, the VCS level is almost zero and pulse-by-pulse current limit or OCP is not effective. The FL7733A is designed to provide sensing resistor short protection for both current and voltage mode operation. If the VCS level is less than 0.1 V in the first switching cycle, the GATE output is stopped by current-mode SRSP. After 20 ms startup time, the GATE is shut down by the voltage-mode SRSP if VCS level is less than 0.1 V at over 60% level of peak VIN. VDD 19 V VDD-ON 13 V VDD OFF 250 ms JFET regulation Gate 15 ms Figure 25. Waveforms in LED Open Condition 15 ms Waveforms in Short-LED Condition Under-Voltage Lockout (UVLO) Open-LED Protection The VDD turn-on and turn-off thresholds are fixed internally at 16 V and 7.75 V, respectively. During startup, the VDD capacitor must be charged to 16 V through the high-voltage JFET to enable the FL7733A. The VDD capacitor continues to supply VDD until auxiliary power is delivered from the auxiliary winding of the main transformer. VDD should remain higher than 7.75 V during this startup process. Therefore, the VDD capacitor must be adequate to keep VDD over the UVLO threshold until the auxiliary winding voltage is above 7.75 V. FL7733A protects external components, such as output diodes and output capacitors, during open-LED condition. During switch turn-off, the auxiliary winding voltage is applied as the reflected output voltage. Because the VDD and VS voltages have output voltage information through the auxiliary winding, the internal voltage comparators in the VDD and VS pins can trigger output Over-Voltage Protection (OVP), as shown in Figure 26 and Figure 27. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 www.fairchildsemi.com 11 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction Short-LED Protection (SLP) When an output diode or secondary winding are shorted, switch current with extremely high di/dt can flow through the MOSFET even by minimum turn-on time. The FL7733A is designed to protect the system against this excessive current. When the CS voltage across the sensing resistor is higher than 1.35 V, the OCP comparator output shuts down GATE switching. Over-Temperature Protection (OTP) The temperature-sensing circuit shuts down PWM output if the junction temperature exceeds 150C. The hysteresis temperature after OTP triggering is 10C. In a sensing resistor open condition, the sensing resistor voltage can't be detected and output current is not PCB Layout Guidance PCB layout for a power converter is as important as circuit design because PCB layout with high parasitic inductance or resistance can lead to severe switching noise with system instability. PCB should be designed to minimize switching noise into control signals. 1. 2. The signal ground and power ground should be separated and connected only at one position (GND pin) to avoid ground loop noise. The power ground path from the bridge diode to the sensing resistors should be short and wide. 3. Control pin components; such as CCOMI, CVS, and RVS2; should be placed close to the assigned pin and signal ground. 4. High-voltage traces related to the drain of MOSFET and RCD snubber should be kept far way from control circuits to avoid unnecessary interference. 5. If a heat sink is used for the MOSFET, connect this heat sink to power ground. 6. The auxiliary winding ground should be connected closer to the GND pin than the control pin components' ground. Gate-driving current path (GATE - RGATE - MOSFET - RCS - GND) must be as short as possible. DC Output AC Input Power ground 5 RCS 2 RGATE 4 FL7733A CS HV GATE NC CCOMI 1 GND COMI CVS VDD VS 6 RVS1 Figure 28. (c) 2014 Fairchild Semiconductor Corporation FL7733AMX * Rev. 1.2 3 RVS2 CVDD Signal ground Layout Example www.fairchildsemi.com 12 FL7733A -- Primary-Side-Regulated LED Driver with Power Factor Correction regulated properly. If the sensing resistor is damaged open-circuit, the parasitic capacitor in the CS pin is charged by internal CS current sources. Therefore, the VCS level is built up to the OCP threshold voltage and then switching is shut down immediately. Over-Current Protection (OCP) ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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