ADuM5000W Data Sheet
Rev. 0 | Page 12 of 16
With a fast VDD1 slew rate (200 µs or less), the peak current
draws up to 100 mA/V of VDD1. The input voltage goes high
faster than the output can turn on; therefore, the peak current
is proportional to the maximum input voltage.
With a slow VDD1 slew rate (in the millisecond range), the input
voltage does not change quickly when VDD1 reaches UVLO. The
current surge is about 300 mA because VDD1 is nearly constant at
the 2.7 V UVLO point. The behavior during start-up is similar
to when the device load is a short circuit; these values are con-
sistent with the short-circuit current shown in Figure 7.
When starting the device for VISO = 5 V operation, do not limit
the current available to the VDD1 power pin to less than 300 mA.
The ADuM5000W may not be able to drive the output to the
regulation point if a current-limiting device clamps the VDD1
voltage during startup. As a result, the ADuM5000W can draw
large amounts of current at low voltage for extended periods.
The output voltage of the ADuM5000W device exhibits VISO
over-shoot during startup. If this could potentially damage
components attached to VISO, then a voltage-limiting device,
such as a Zener diode, can be used to clamp the voltage.
Typical behavior is shown in Figure 12 and Figure 13.
EMI CONSIDERATIONS
It is necessary for the dc-to-dc converter section of the
ADuM5000W to operate at 180 MHz to allow efficient power
transfer through the small transformers. This creates high
frequency currents that can propagate in circuit board ground
and power planes, causing edge emissions and dipole radiation
between the input and output ground planes. Grounded
enclosures are recommended for applications that use these
devices. If grounded enclosures are not possible, follow good
RF design practices in the layout of the PCB. See the AN-0971
Application Note for board layout recommendations.
THERMAL ANALYSIS
The ADuM5000W consists of four internal silicon die, attached
to a split lead frame with two die attach paddles. For the
purposes of thermal analysis, it is treated as a thermal unit with
the highest junction temperature reflected in the θJA from Table 5.
The value of θJA is based on measurements taken with the part
mounted on a JEDEC standard 4-layer board with fine width
traces and still air. Under normal operating conditions, the
ADuM5000W operates at full load across the full temperature
range without derating the output current. However, following
the recommendations in the PCB Layout section decreases the
thermal resistance to the PCB, allowing increased thermal
margin at high ambient temperatures.
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
The ADuM5000W is protected against damage due to excessive
power dissipation by thermal overload protection circuits. Thermal
overload protection limits the junction temperature to a maximum
of 150°C (typical). Under extreme conditions (that is, high ambient
temperature and power dissipation), when the junction temper-
ature starts to rise above 150°C, the PWM is turned off, which
turns off the output current. When the junction temperature
falls below 130°C (typical), the PWM turns on again, restoring
the output current to its nominal value.
Consider the case where a hard short from VISO to ground occurs.
At first, the ADuM5000W reaches its maximum current, which
is proportional to the voltage applied at VDD1. Power dissipates
on the primary side of the converter (see Figure 7). If self-heating
of the junction becomes great enough to cause its temperature to
rise above 150°C, thermal shutdown activates, turning off the
PWM and turning off the output current. As the junction
temperature cools and falls below 130°C, the PWM turns on
and power dissipates again on the primary side of the converter,
causing the junction temperature to rise to 150°C again. This
thermal oscillation between 130°C and 150°C causes the part
to cycle on and off as long as the short remains at the output.
Thermal limit protections are intended to protect the device
against accidental overload conditions. For reliable operation,
externally limit device power dissipation to prevent junction
temperatures from exceeding 130°C.
POWER CONSIDERATIONS
The ADuM5000W converter primary side is protected from
pre-mature operation by undervoltage lockout (UVLO)
circuitry. Below the minimum operating voltage, the power
converter holds its oscillator inactive.
When the primary side oscillator begins to operate, it transfers
power to the secondary power circuits. The secondary VISO voltage
starts below its UVLO limit making it inactive and unable to
generate a regulation control signal. The primary side power
oscillator is allowed to free run under this condition, supplying
the maximum amount of power to the secondary side.
As the secondary side voltage rises to its regulation setpoint,
a large inrush current transient is present at VDD1. When the
regulation point is reached, the regulation control circuit produces
the regulation control signal that modulates the oscillator on the
primary side. The VDD1 current is then reduced and is proportional
to the load current. The inrush current is less than the short-
circuit current shown in Figure 7. The duration of the inrush
depends on the VISO loading conditions and on the current and
voltage available at the VDD1 pin.