July 1, 2008
LMV861/LMV862
30 MHz Low Power CMOS, EMI Hardened Operational
Amplifiers
General Description
National’s LMV861 and LMV862 are CMOS input, low power
op amp IC's, providing a low input bias current, a wide tem-
perature range of −40°C to +125°C and exceptional perfor-
mance making them robust general purpose parts. Addition-
ally, the LMV861 and LMV862 are EMI hardened to minimize
any interference so they are ideal for EMI sensitive applica-
tions.
The unity gain stable LMV861 and LMV862 feature 30 MHz
of bandwidth while consuming only 2.25 mA of current per
channel. These parts also maintain stability for capacitive
loads as large as 200 pF. The LMV861 and LMV862 provide
superior performance and economy in terms of power and
space usage.
This family of parts has a maximum input offset voltage of
1 mV, a rail-to-rail output stage and an input common-mode
voltage range that includes ground. Over an operating range
from 2.7V to 5.5V the LMV861 and LMV862 provide a PSRR
of 93 dB, and a CMRR of 93 dB. The LMV861 is offered in the
space saving 5-Pin SC70 package, and the LMV862 in the
8-Pin MSOP.
Features
Unless otherwise noted, typical values at TA = 25°C,
V+ = 3.3V
■Supply voltage 2.7V to 5.5V
■Supply current (per channel) 2.25 mA
■Input offset voltage 1 mV max
■Input bias current 0.1 pA
■GBW 30 MHz
■EMIRR at 1.8 GHz 105 dB
■Input noise voltage at 1 kHz 8 nV/√Hz
■Slew rate 18 V/µs
■Output voltage swing Rail-to-Rail
■Output current drive 67 mA
■Operating ambient temperature range −40°C to 125°C
Applications
■Photodiode preamp
■Weight scale systems
■Filters/buffers
■Medical diagnosis equipment
Typical Application
EMI Hardened Sensor Application
30024001
© 2008 National Semiconductor Corporation 300240 www.national.com
LMV861 Single/LMV862 Dual 30 MHz Low Power CMOS, EMI Hardened Operational Amplifiers
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model 2 kV
Charge-Device Model 1 kV
Machine Model 200V
VIN Differential ± Supply Voltage
Supply Voltage (VS = V+ – V−)6V
Voltage at Input/Output Pins V+ +0.4V
V− −0.4V
Storage Temperature Range −65°C to +150°C
Junction Temperature (Note 3) +150°C
Soldering Information
Infrared or Convection (20 sec) 260°C
Operating Ratings (Note 1)
Temperature Range (Note 3) −40°C to +125°C
Supply Voltage (VS = V+ – V−)2.7V to 5.5V
Package Thermal Resistance (θJA (Note 3))
5-Pin SC70 302°C/W
8-Pin MSOP 217°C/W
3.3V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3.3V, V− = 0V, VCM = V+/2, and RL =10 kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
VOS Input Offset Voltage
(Note 9)
±273 ±1000
1260 μV
TCVOS Input Offset Voltage Temperature Drift
(Notes 9, 10)
±0.7 ±2.6 μV/°C
IBInput Bias Current
(Note 10)
0.1 10
500 pA
IOS Input Offset Current 1 pA
CMRR Common-Mode Rejection Ratio
(Note 9)
0.2V ≤ VCM ≤ V+ - 1.2V 77
75
93 dB
PSRR Power Supply Rejection Ratio
(Note 9)
2.7V ≤ V+ ≤ 5.5V,
VOUT = 1V
77
76
93 dB
EMIRR EMI Rejection Ratio, IN+ and IN−
(Note 8)
VRF_PEAK = 100 mVP (−20 dBVP),
f = 400 MHz
70
dB
VRF_PEAK = 100 mVP (−20 dBVP),
f = 900 MHz
80
VRF_PEAK = 100 mVP (−20 dBVP),
f = 1800 MHz
105
VRF_PEAK = 100 mVP (−20 dBVP),
f = 2400 MHz
110
CMVR Input Common-Mode Voltage Range CMRR ≥ 65 dB −0.1 2.1 V
AVOL Large Signal Voltage Gain
(Note 11)
RL = 2 kΩ
VOUT = 0.15V to 1.65V,
VOUT = 3.15V to 1.65V
100
97
110
dB
RL = 10 kΩ
VOUT = 0.1V to 1.65V,
VOUT = 3.2V to 1.65V
100
98
113
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LMV861 Single/LMV862 Dual
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
VOUT Output Voltage Swing High LMV861,
RL = 2 kΩ to V+/2
12 14
18
mV from
either rail
LMV862,
RL = 2 kΩ to V+/2
12 16
19
LMV861,
RL = 10 kΩ to V+/2
3 4
5
LMV862,
RL = 10 kΩ to V+/2
3 6
7
Output Voltage Swing Low LMV861,
RL = 2 kΩ to V+/2
8 12
16
LMV862,
RL = 2 kΩ to V+/2
10 14
17
LMV861,
RL = 10 kΩ to V+/2
2 4
5
LMV862,
RL = 10 kΩ to V+/2
3 7
8
IOUT Output Short Circuit Current Sourcing, VOUT = VCM,
VIN = 100 mV
61
52
70
mA
Sinking, VOUT = VCM,
VIN = −100 mV
72
58
86
ISSupply Current LMV861 2.25 2.59
3.00 mA
LMV862 4.42 5.02
5.77
SR Slew Rate (Note 7) AV = +1, VOUT = 1 VPP,
10% to 90%
18 V/μs
GBW Gain Bandwidth Product 30 MHz
ΦmPhase Margin 70 deg
enInput Referred Voltage Noise Density f = 1 kHz 8 nV/
f = 100 kHz 5
inInput Referred Current Noise Density f = 1 kHz 0.015 pA/
ROUT Closed Loop Output Impedance f = 20 MHz 80 Ω
CIN Common-Mode Input Capacitance 21 pF
Differential-Mode Input Capacitance 15
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, BW ≥ 500 kHz 0.02 %
5V Electrical Characteristics (Note 4)
Unless otherwise specified, all limits are guaranteed for T = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL =10 kΩ to V+/2. Bold-
face limits apply at the temperature extremes.
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
VOS Input Offset Voltage
(Note 9)
±273 ±1000
1260 μV
TCVOS Input Offset Voltage Temperature Drift
(Notes 9, 10)
±0.7 ±2.6 μV/°C
IBInput Bias Current
(Note 10)
0.1 10
500 pA
IOS Input Offset Current 1 pA
CMRR Common-Mode Rejection Ratio
(Note 9)
0V ≤ VCM ≤ V+ –1.2V 78
77
94 dB
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LMV861 Single/LMV862 Dual
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
PSRR Power Supply Rejection Ratio
(Note 9)
2.7V ≤ V+ ≤ 5.5V,
VOUT = 1V
77
76
93 dB
EMIRR EMI Rejection Ratio, IN+ and IN−
(Note 8)
VRF_PEAK = 100 mVP (−20 dBVP),
f = 400 MHz
70
dB
VRF_PEAK = 100 mVP (−20 dBVP),
f = 900 MHz
80
VRF_PEAK = 100 mVP (−20 dBVP),
f = 1800 MHz
105
VRF_PEAK = 100 mVP (−20 dBVP),
f = 2400 MHz
110
CMVR Input Common-Mode Voltage Range CMRR ≥ 65 dB −0.1 3.9 V
AVOL Large Signal Voltage Gain
(Note 11)
RL = 2 kΩ
VOUT = 0.15V to 2.5V,
VOUT = 4.85V to 2.5V
103
100
111
dB
RL = 10 kΩ
VOUT = 0.1V to 2.5V,
VOUT = 4.9V to 2.5V
103
100
113
VOUT Output Voltage Swing High, LMV861,
RL = 2 kΩ to V+/2
13 15
19
mV from
either rail
LMV862,
RL = 2 kΩ to V+/2
13 17
20
LMV861,
RL = 10 kΩ to V+/2
3 4
5
LMV862,
RL = 10 kΩ to V+/2
3 6
7
Output Voltage Swing Low, LMV861,
RL = 2 kΩ to V+/2
10 14
18
LMV862,
RL = 2 kΩ to V+/2
12 17
20
LMV861,
RL = 10 kΩ to V+/2
3 4
5
LMV862,
RL = 10 kΩ to V+/2
3 7
8
IOUT Output Short Circuit Current Sourcing, VOUT = VCM,
VIN = 100 mV
90
86
150
mA
Sinking, VOUT = VCM,
VIN = −100 mV
90
86
150
ISSupply Current LMV861 2.47 2.84
3.27 mA
LMV862 4.85 5.63
6.35
SR Slew Rate (Note 7) AV = +1, VOUT = 2VPP,
10% to 90%
20 V/μs
GBW Gain Bandwidth Product 31 MHz
ΦmPhase Margin 71 deg
enInput Referred Voltage Noise Density f = 1 kHz 8 nV/
f = 100 kHz 5
inInput Referred Current Noise Density f = 1 kHz 0.015 pA/
ROUT Closed Loop Output Impedance f = 20 MHz 60 Ω
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LMV861 Single/LMV862 Dual
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
CIN Common-Mode Input Capacitance 20 pF
Differential-Input Capacitance 15
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV= 1, BW ≥ 500 kHz 0.02 %
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-
Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where
TJ > TA.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality
control (SQC) method.
Note 7: Number specified is the slower of positive and negative slew rates.
Note 8: The EMI Rejection Ratio is defined as EMIRR = 20log ( VRF_PEAK/ΔVOS).
Note 9: The typical value is calculated by applying absolute value transform to the distribution, then taking the statistical average of the resulting distribution
Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 11: The specified limits represent the lower of the measured values for each output range condition.
Connection Diagrams
5-Pin SC70
30024002
Top View
8-Pin MSOP
30024003
Top View
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
5-Pin SC70
LMV861MG
AEA
1k Units Tape and Reel
MAA05ALMV861MGE 250 Units Tape and Reel
LMV861MGX 3k Units Tape and Reel
8-Pin MSOP LMV862MM AJ5A 1k Units Tape and Reel MUA08A
LMV862MMX 3.5k Units Tape and Reel
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LMV861 Single/LMV862 Dual
Typical Performance Characteristics At TA = 25°C. RL = 10 kΩ, V+ = 3.3V, V− = 0V, unless otherwise
specified.
VOS vs. VCM at V+ = 3.3V
30024010
VOS vs. VCM at V+ = 5.0V
30024011
VOS vs. Supply Voltage
30024012
VOS vs. Temperature
30024013
VOS vs. VOUT
30024014
Input Bias Current vs. VCM at 25°C
30024015
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LMV861 Single/LMV862 Dual
Input Bias Current vs. VCM at 85°C
30024016
Input Bias Current vs. VCM at 125°C
30024017
Supply Current vs. Supply Voltage Single LMV861
30024018
Supply Current vs. Supply Voltage Dual LMV862
30024019
Supply Current vs. Temperature Single LMV861
30024021
Supply Current vs. Temperature Dual LMV862
30024022
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LMV861 Single/LMV862 Dual
Sinking Current vs. Supply Voltage
30024024
Sourcing Current vs. Supply Voltage
30024025
Output Swing High vs. Supply Voltage RL = 2 kΩ
30024026
Output Swing High vs. Supply Voltage RL = 10 kΩ
30024027
Output Swing Low vs. Supply Voltage RL = 2 kΩ
30024028
Output Swing Low vs. Supply Voltage RL = 10 kΩ
30024029
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LMV861 Single/LMV862 Dual
Output Voltage Swing vs. Load Current at V+ = 3.3V
30024030
Output Voltage Swing vs. Load Current at V+ = 5.0V
30024031
Open Loop Frequency Response vs. Temperature
30024032
Open Loop Frequency Response vs. Load Conditions
30024033
Phase Margin vs. Capacitive Load
30024034
PSRR vs. Frequency
30024035
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LMV861 Single/LMV862 Dual
CMRR vs. Frequency
30024036
Channel Separation vs. Frequency
30024037
Large Signal Step Response with Gain = 1
30024038
Large Signal Step Response with Gain = 10
30024039
Small Signal Step Response with Gain = 1
30024040
Small Signal Step Response with Gain = 10
30024041
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LMV861 Single/LMV862 Dual
Slew Rate vs. Supply Voltage
30024042
Input Voltage Noise vs. Frequency
30024044
THD+N vs. Frequency
30024045
THD+N vs. Amplitude
30024046
ROUT vs. Frequency
30024047
EMIRR IN+ vs. Power at 400 MHz
30024048
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LMV861 Single/LMV862 Dual
EMIRR IN+ vs. Power at 900 MHz
30024049
EMIRR IN+ vs. Power at 1800 MHz
30024050
EMIRR IN+ vs. Power at 2400 MHz
30024051
EMIRR IN+ vs. Frequency
30024052
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LMV861 Single/LMV862 Dual
Application Information
INTRODUCTION
The LMV861 and LMV862 are operational amplifiers with ex-
cellent specifications, such as low offset, low noise and a rail-
to-rail output. These specifications make the LMV861 and
LMV862 great choices for medical and instrumentation appli-
cations such as diagnosis equipment and power line moni-
tors. The low supply current is perfect for battery powered
equipment. The small packages, SC70 package for the
LMV861, and the MSOP package for the dual LMV862, make
these parts a perfect choice for portable electronics. Addi-
tionally, the EMI hardening makes the LMV861 and LMV862
a must for almost all op amp applications. Most applications
are exposed to Radio Frequency (RF) signals such as the
signals transmitted by mobile phones or wireless computer
peripherals. The LMV861 and LMV862 will effectively reduce
disturbances caused by RF signals to a level that will be hard-
ly noticeable. This again reduces the need for additional
filtering and shielding. Using this EMI resistant series of op
amps will thus reduce the number of components and space
needed for applications that are affected by EMI, and will help
applications, not yet identified as possible EMI sensitive, to
be more robust for EMI.
INPUT CHARACTERISTICS
The input common mode voltage range of the LMV861 and
LMV862 includes ground, and can even sense well below
ground. The CMRR level does not degrade for input levels up
to 1.2V below the supply voltage. For a supply voltage of 5V,
the maximum voltage that should be applied to the input for
best CMRR performance is thus 3.8V.
When not configured as unity gain, this input limitation will
usually not degrade the effective signal range. The output is
rail-to-rail and therefore will introduce no limitations to the
signal range.
The typical offset is only 0.273 mV, and the TCVOS is
0.7 μV/°C, specifications close to precision op amps.
CMRR MEASUREMENT
The CMRR measurement results may need some clarifica-
tion. This is because different setups are used to measure the
AC CMRR and the DC CMRR.
The DC CMRR is derived from ΔVOS versus ΔVCM. This value
is stated in the tables, and is tested during production testing.
The AC CMRR is measured with the test circuit shown in
Figure 1.
30024064
FIGURE 1. AC CMRR Measurement Setup
The configuration is largely the usually applied balanced con-
figuration. With potentiometer P1, the balance can be tuned
to compensate for the DC offset in the DUT. The main differ-
ence is the addition of the buffer. This buffer prevents the
open-loop output impedance of the DUT from affecting the
balance of the feedback network. Now the closed-loop output
impedance of the buffer is a part of the balance. But as the
closed-loop output impedance is much lower, and by careful
selection of the buffer also has a larger bandwidth, the total
effect is that the CMRR of the DUT can be measured much
more accurately. The differences are apparent in the larger
measured bandwidth of the AC CMRR.
One artifact from this test circuit is that the low frequency CM-
RR results appear higher than expected. This is because in
the AC CMRR test circuit the potentiometer is used to com-
pensate for the DC mismatches. So, mainly AC mismatch is
all that remains. Therefore, the obtained DC CMRR from this
AC CMRR test circuit tends to be higher than the actual DC
CMRR based on DC measurements.
The CMRR curve in Figure 2 shows a combination of the AC
CMRR and the DC CMRR.
30024036
FIGURE 2. CMRR Curve
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LMV861 Single/LMV862 Dual
OUTPUT CHARACTERISTICS
As already mentioned the output is rail-to-rail. When loading
the output with a 10 kΩ resistor the maximum swing of the
output is typically 3 mV from the positive and negative rail.
The output of the LMV861 and LMV862 can drive currents up
to 70 mA at 3.3V, and even up to 150 mA at 5V.
The LMV861 and LMV862 can be connected as non-inverting
unity gain amplifiers. This configuration is the most sensitive
to capacitive loading. The combination of a capacitive load
placed at the output of an amplifier along with the amplifier’s
output impedance creates a phase lag, which reduces the
phase margin of the amplifier. If the phase margin is signifi-
cantly reduced, the response will be under damped which
causes peaking in the transfer and, when there is too much
peaking, the op amp might start oscillating. The LMV861 and
LMV862 can directly drive capacitive loads up to 200 pF with-
out any stability issues. In order to drive heavier capacitive
loads, an isolation resistor, RISO, should be used, as shown
in Figure 3. By using this isolation resistor, the capacitive load
is isolated from the amplifier’s output, and hence, the pole
caused by CL is no longer in the feedback loop. The larger the
value of RISO, the more stable the amplifier will be. If the value
of RISO is sufficiently large, the feedback loop will be stable,
independent of the value of CL. However, larger values of
RISO result in reduced output swing and reduced output cur-
rent drive.
30024063
FIGURE 3. Isolating Capacitive Load
A resistor value of around 50Ω would be sufficient. As an ex-
ample some values are given in the following table, for 5V and
an open loop gain of 111 dB.
CLOAD RISO
300 pF 62Ω
400 pF 55Ω
500 pF 50Ω
When increasing the closed-loop gain the capacitive load can
be increased even further. With a closed loop gain of 2 and a
27Ω isolation resistor, the load can be 1 nF
EMIRR
With the increase of RF transmitting devices in the world, the
electromagnetic interference (EMI) between those devices
and other equipment becomes a bigger challenge. The
LMV861 and LMV862 are EMI hardened op amps which are
specifically designed to overcome electromagnetic interfer-
ence. Along with EMI hardened op amps, the EMIRR param-
eter is introduced to unambiguously specify the EMI perfor-
mance of an op amp. This section presents an overview of
EMIRR. A detailed description on this specification for EMI
hardened op amps can be found in Application Note AN-1698.
The dimensions of an op amp IC are relatively small com-
pared to the wavelength of the disturbing RF signals. As a
result the op amp itself will hardly receive any disturbances.
The RF signals interfering with the op amp are dominantly
received by the PCB and wiring connected to the op amp. As
a result the RF signals on the pins of the op amp can be rep-
resented by voltages and currents. This representation sig-
nificantly simplifies the unambiguous measurement and
specification of the EMI performance of an op amp.
RF signals interfere with op amps via the non-linearity of the
op amp circuitry. This non-linearity results in the detection of
the so called out-of-band signals. The obtained effect is that
the amplitude modulation of the out-of-band signal is down-
converted into the base band. This base band can easily
overlap with the band of the op amp circuit. As an example
Figure 4 depicts a typical output signal of a unity-gain con-
nected op amp in the presence of an interfering RF signal.
Clearly the output voltage varies in the rhythm of the on-off
keying of the RF carrier.
30024065
FIGURE 4. Offset voltage variation due to an interfering
RF signal
EMIRR Definition
To identify EMI hardened op amps, a parameter is needed
that quantitatively describes the EMI performance of op
amps. A quantitative measure enables the comparison and
the ranking of op amps on their EMI robustness. Therefore
the EMI Rejection Ratio (EMIRR) is introduced. This param-
eter describes the resulting input-referred offset voltage shift
of an op amp as a result of an applied RF carrier (interference)
with a certain frequency and level. The definition of EMIRR is
given by:
In which VRF_PEAK is the amplitude of the applied un-modu-
lated RF signal (V) and ΔVOS is the resulting input-referred
offset voltage shift (V). The offset voltage depends quadrati-
cally on the applied RF level, and therefore, the RF level at
which the EMIRR is determined should be specified. The
standard level for the RF signal is 100 mVP. Application Note
AN-1698 addresses the conversion of an EMIRR measured
for an other signal level than 100 mVP. The interpretation of
the EMIRR parameter is straightforward. When two op amps
have EMIRRs which differ by 20 dB, the resulting error signals
when used in identical configurations, differs by 20 dB as well.
So, the higher the EMIRR, the more robust the op amp.
Coupling an RF Signal to the IN+ Pin
Each of the op amp pins can be tested separately on EMIRR.
In this section the measurements on the IN+ pin (which,
based on symmetry considerations, also apply to the IN- pin)
are discussed. In Application Note AN-1698 the other pins of
the op amp are treated as well. For testing the IN+ pin the op
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LMV861 Single/LMV862 Dual
amp is connected in the unity gain configuration. Applying the
RF signal is straightforward as it can be connected directly to
the IN+ pin. As a result the RF signal path has a minimum of
components that might affect the RF signal level at the pin.
The circuit diagram is shown in Figure 5. The PCB trace from
RFIN to the IN+ pin should be a 50Ω stripline in order to match
the RF impedance of the cabling and the RF generator. On
the PCB a 50Ω termination is used. This 50Ω resistor is also
used to set the bias level of the IN+ pin to ground level. For
determining the EMIRR, two measurements are needed: one
is measuring the DC output level when the RF signal is off;
and the other is measuring the DC output level when the RF
signal is switched on. The difference of the two DC levels is
the output voltage shift as a result of the RF signal. As the op
amp is in the unity gain configuration, the input referred offset
voltage shift corresponds one-to-one to the measured output
voltage shift.
30024067
FIGURE 5. Circuit for coupling the RF signal to IN+
Cell Phone Call
The effect of electromagnetic interference is demonstrated in
a setup where a cell phone interferes with a pressure sensor
application. The application is show in Figure 7.
This application needs two op amps and therefore a dual op
amp is used. The op amp configured as a buffer and con-
nected at the negative output of the pressure sensor prevents
the loading of the bridge by resistor R2. The buffer also pre-
vents the resistors of the sensor from affecting the gain of the
following gain stage. The op amps are placed in a single sup-
ply configuration.
The experiment is performed on two different op amps: a typ-
ical standard op amp and the LMV862, EMI hardened dual op
amp. A cell phone is placed on a fixed position a couple of
centimeters from the op amps in the sensor circuit.
When the cell phone is called, the PCB and wiring connected
to the op amps receive the RF signal. Subsequently, the op
amps detect the RF voltages and currents that end up at their
pins. The resulting effect on the output of the second op amp
is shown in Figure 6.
30024062
FIGURE 6. Comparing EMI Robustness
The difference between the two types of op amps is clearly
visible. The typical standard dual op amp has an output shift
(disturbed signal) larger than 1V as a result of the RF signal
transmitted by the cell phone. The LMV862, EMI hardened op
amp does not show any significant disturbances. This means
that the RF signal will not disturb the signal entering the ADC
when using the LMV862.
30024061
FIGURE 7. Pressure Sensor Application
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LMV861 Single/LMV862 Dual
DECOUPLING AND LAYOUT
Care must be given when creating a board layout for the op
amp. For decoupling the supply lines it is suggested that
10 nF capacitors be placed as close as possible to the op
amp. For single supply, place a capacitor between V+ and
V−. For dual supplies, place one capacitor between V+ and
the board ground, and a second capacitor between ground
and V−.
Even with the LMV861 and LMV862 inherent hardening
against EMI, it is still recommended to keep the input traces
short and as far as possible from RF sources. Then the RF
signals entering the chip are as low as possible, and the re-
maining EMI can be, almost, completely eliminated in the chip
by the EMI reducing features of the LMV861 and LMV862.
LOAD CELL SENSOR APPLICATION
The LMV861 and LMV862 can be used for weight measuring
system applications which use a load cell sensor. Examples
of such systems are: bathroom weight scales, industrial
weight scales and weight measurement devices on moving
equipment such as forklift trucks.
The following example describes a typical load cell sensor
application that can be used as a starting point for many dif-
ferent types of sensors and applications. Applications in en-
vironments where EMI may appear would especially benefit
from the EMIRR performance of the LMV861 and LMV862.
Load Cell Characteristics
The load cell used in this example is a Wheatstone bridge.
The value of the resistors in the bridge changes when pres-
sure is applied to the sensor. This change of the resistor
values will result in a differential output voltage depending on
the sensitivity of the sensor, the used supply voltage and the
applied pressure. The difference between the output at full
scale pressure and the output at zero pressure is defined as
the span of the load cell. A typical value for the span is
10 mV/V.
The circuit configuration should be chosen such that loading
of the sensor is prevented. Loading of the resistor bridge due
to the circuit following the sensor, could result in incorrect
output voltages of the sensor.
Load Cell Example
Figure 8 shows a typical schematic for a load cell application.
It uses a single supply and has an adjustment for both positive
and negative offset of the load cell. An ADC converts the am-
plified signal to a digital signal.
The op amps A1 and A2 are configured as buffers, and are
connected at both the positive and the negative output of the
load cell. This is to prevent the loading of the resistor bridge
in the sensor by the resistors configuring the differential op
amp circuit (op amp A4). The buffers also prevent the resis-
tors of the sensor from affecting the gain of the following gain
stage. The third buffer (A3) is used to create a reference volt-
age, to correct for the offset in the system.
Given the differential output voltage VS of the load cell, the
output signal of this op amp configuration, VOUT, equals:
To align the pressure range with the full range of an ADC the
correct gain needs to be set. To calculate the correct gain, the
power supply voltage and the span of the load cell are need-
ed. For this example a power supply of 5V is used and the
span of the sensor, in this case a 125 kg sensor, is 100 mV.
With the configuration as shown in Figure 8, this signal is
covering almost the full input range of the ADC. With no
weight on the load cell, the output of the sensor and the op
amp A4 will be close to 0V. With the full weight on the load
cell, the output of the sensor is 100 mV, and will be amplified
with the gain from the configuration. In the case of the con-
figuration of Figure 8 the gain is R3/R1 = 51 kΩ/100Ω = 50.
This will result in a maximum output of 100 mV x 50 = 5V,
which covers the full range of the ADC.
For further processing the digital signal can be processed by
a microprocessor following the ADC, this can be used to dis-
play or log the weight on the load cell. To get a resolution of
0.5 kg, the LSB of the ADC should be smaller then 0.5 kg/125
kg = 1/1000. A 12-bit ADC would be sufficient as this gives
4096 steps. A 12-bit ADC such as the two channel 12-bit
ADC122S021 can be used for this application.
30024069
FIGURE 8. Load Cell Application
www.national.com 16
LMV861 Single/LMV862 Dual
IR PHOTODIODE APPLICATION
The LMV861 and LMV862 are also very good choices to be
used in photodiode applications, such as IR communication,
monitoring, etc. The large bandwidth of the LMV861 and
LM862 makes it possible to create high speed detection. This,
together with the low noise, makes the LMV861 and LMV862
ideal for medical applications such as fetal monitors and bed
side monitors. Another application where the LMV861 and
LMV862 would fit perfectly is a bill validator, an instrument to
detect counterfeit bank notes. The following example de-
scribes an application that can be used for different types of
photodiode sensors and applications.
IR Photodiode Example
The circuit shown in Figure 10 is a typical configuration for the
readout of a photodiode. The response of a photodiode to
incoming light is a variation in the diode current. In many ap-
plications a voltage is required, i.e. when connecting to an
ADC. Therefore the first step is to convert the diode signal
current into a voltage by an I-V converter. In Figure 10 the left
op amp is configured as an I-V converter, with a gain set by
R1.
Some types of photodiodes can have a large capacitance.
This could potentially lead to oscillation. The addition of re-
sistor R2 isolates the photodiode capacitance from the feed-
back loop, thereby preventing the loop from oscillating.
The capacitor in between the two op amp configurations,
blocks the DC component, thus removing the DC offset of the
first op amp circuit, and the offset created by the ambient light
entering the photodiode. The second op amp amplifies the
signal to levels that can be converted to a digital signal by an
ADC. To prevent floating of the input of the second op amp,
resistor R5 is added. By allowing the input bias current of a
few pA to flow through this resistor a stable input is ensured.
In Figure 9 a sensed and amplified signal is shown from an
IR source, in this case an IR remote control.
The data from the ADC can then be used by a DSP or micro-
processor for further processing.
30024068
FIGURE 9. IR Photodiode Signal
30024071
FIGURE 10. IR Photodiode Application
17 www.national.com
LMV861 Single/LMV862 Dual
Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SC70
NS Package Number MAA05A
8-Pin MSOP
NS Package Number MUA08A
www.national.com 18
LMV861 Single/LMV862 Dual
Notes
19 www.national.com
LMV861 Single/LMV862 Dual
Notes
LMV861 Single/LMV862 Dual 30 MHz Low Power CMOS, EMI Hardened Operational Amplifiers
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