MC74LVX32DR2G - ON Semiconductor L.L.C.

May, 2011 − Rev. 3

1Publication Order Number:

MC74LVX32/D

MC74LVX32

Quad 2-Input OR Gate

With 5 V−Tolerant Inputs

The MC74LVX32 is an advanced high speed CMOS 2−input OR

gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of

5.0 V systems to 3.0 V systems.

Features

•High Speed: tPD = 4.4 ns (Typ) at VCC = 3.3 V

•Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C

•Power Down Protection Provided on Inputs

•Balanced Propagation Delays

•Low Noise: VOLP = 0.5 V (Max)

•Pin and Function Compatible with Other Standard Logic Families

•Latchup Performance Exceeds 300 mA

•ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

•These Devices are Pb−Free and are RoHS Compliant

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

MARKING

DIAGRAMS

TSSOP−14

DT SUFFIX

CASE 948G

SOEIAJ−14

M SUFFIX

CASE 965

SOIC−14

D SUFFIX

CASE 751A

LVX32

ALYWG

LVX32G

AWLYWW

LVX

ALYWG

LVX32 = Specific Device Code

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW, W = Work Week

G or G= Pb−Free Package

(Note: Microdot may be in either location)

MC74LVX32

http://onsemi.com

Figure 1. 14−Lead Pinout (Top View)

1314 12 11 10 9 8

21 34567

Figure 2. Logic Diagram

VCC A2 B2 O2 A3 B3 O3

A0 B0 O0 A1 B1 O1 GND

3O0

6O1

11 O2

8O3

INPUTS OUTPUTS

An Bn

FUNCTION TABLE

PIN NAMES

Function

Data Inputs

Outputs

Pins

An, Bn

ORDERING INFORMATION

Device Package Shipping†

MC74LVX32DR2G SOIC−14

(Pb−Free)

2500 Tape & Reel

MC74LVX32DTR2G TSSOP−14* 2500 Tape & Reel

MC74LVX32MG SOEIAJ−14

(Pb−Free)

50 Units / Rail

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

MC74LVX32

http://onsemi.com

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎÎÎÎ

–0.5 to +7.0

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage

ÎÎÎÎÎÎ

–0.5 to +7.0

ÎÎÎ

ÎÎÎÎ

Vout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎÎÎÎ

–0.5 to VCC +0.5

ÎÎÎ

ÎÎÎÎ

IIK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Diode Current

ÎÎÎÎÎÎ

−20

ÎÎÎ

ÎÎÎÎ

IOK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Diode Current

ÎÎÎÎÎÎ

±20

ÎÎÎ

ÎÎÎÎ

Iout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Current, per Pin

ÎÎÎÎÎÎ

±25

ÎÎÎ

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Current, VCC and GND Pins

ÎÎÎÎÎÎ

±50

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation

ÎÎÎÎÎÎ

180

ÎÎÎ

ÎÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature

ÎÎÎÎÎÎ

–65 to +150

ÎÎÎ

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit

values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,

damage may occur and reliability may be affected.

RECOMMENDED OPERATING CONDITIONS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎ

2.0

ÎÎÎÎ

3.6

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage

ÎÎÎ

ÎÎÎÎ

5.5

ÎÎÎ

ÎÎÎÎ

Vout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎ

ÎÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature, All Package Types

ÎÎÎ

−40

ÎÎÎÎ

+85

ÎÎÎ

ÎÎÎÎ

Dt/DV

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Rise and Fall Time

ÎÎÎ

ÎÎÎÎ

100

ÎÎÎ

ns/V

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC ELECTRICAL CHARACTERISTICS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎÎ

VIH

ÎÎÎÎÎÎÎÎ

High−Level Input Voltage

ÎÎÎÎÎÎ

ÎÎÎÎ

2.0

3.0

3.6

ÎÎÎ

1.5

2.0

2.4

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

1.5

2.0

2.4

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

VIL

ÎÎÎÎÎÎÎÎ

Low−Level Input Voltage

ÎÎÎÎÎÎ

ÎÎÎÎ

2.0

3.0

3.6

ÎÎÎ

ÎÎÎÎ

0.5

0.8

ÎÎÎ

ÎÎÎÎ

0.5

0.8

ÎÎÎ

ÎÎÎÎ

VOH

ÎÎÎÎÎÎÎÎ

High−Level Output Voltage

(Vin = VIH or VIL)

ÎÎÎÎÎÎ

IOH = −50mA

IOH = −4mA

ÎÎÎÎ

2.0

3.0

ÎÎÎ

1.9

2.9

2.58

ÎÎÎ

2.0

3.0

ÎÎÎÎ

ÎÎÎ

1.9

2.9

2.48

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

VOL

ÎÎÎÎÎÎÎÎ

Low−Level Output Voltage

(Vin = VIH or VIL)

ÎÎÎÎÎÎ

IOL = 50mA

IOL = 4mA

ÎÎÎÎ

2.0

3.0

ÎÎÎ

0.0

ÎÎÎÎ

0.1

0.36

ÎÎÎ

ÎÎÎÎ

0.1

0.44

ÎÎÎ

ÎÎÎÎ

Iin

ÎÎÎÎÎÎÎÎ

Input Leakage Current

ÎÎÎÎÎÎ

Vin = 5.5V or GND

ÎÎÎÎ

3.6

ÎÎÎ

ÎÎÎÎ

±0.1

ÎÎÎ

ÎÎÎÎ

±1.0

ÎÎÎ

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎ

Quiescent Supply Current

ÎÎÎÎÎÎ

Vin = VCC or GND

ÎÎÎÎ

3.6

ÎÎÎ

ÎÎÎÎ

2.0

ÎÎÎ

ÎÎÎÎ

20.0

ÎÎÎ

MC74LVX32

http://onsemi.com

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎÎ

tPLH,

tPHL

ÎÎÎÎÎÎÎÎ

Propagation Delay, Input to

Output

ÎÎÎÎÎÎÎÎÎ

VCC = 2.7V CL = 15pF

CL = 50pF

ÎÎÎ

5.8

8.3

ÎÎÎÎ

10.7

14.2

ÎÎÎ

1.0

ÎÎÎÎ

13.5

17.0

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎ

VCC = 3.3 ± 0.3V CL = 15pF

CL = 50pF

ÎÎÎ

4.4

6.9

ÎÎÎÎ

6.6

10.1

ÎÎÎ

1.0

ÎÎÎÎ

8.0

11.5

ÎÎÎ

ÎÎÎÎ

tOSHL

tOSLH

ÎÎÎÎÎÎÎÎ

Output−to−Output Skew

(Note 1)

ÎÎÎÎÎÎÎÎÎ

VCC = 2.7V CL = 50pF

VCC = 3.3 ±0.3V CL = 50pF

ÎÎÎ

ÎÎÎÎ

1.5

ÎÎÎ

ÎÎÎÎ

1.5

ÎÎÎ

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.

The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter

guaranteed by design.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

CAPACITIVE CHARACTERISTICS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = − 40 to 85°C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎÎ

Cin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Capacitance

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

CPD

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation Capacitance (Note 2)

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

ÎÎÎ

2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the

no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)

Symbol Characteristic

TA = 25°C

Unit

Typ Max

VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V

VOLV Quiet Output Minimum Dynamic VOL −0.3 −0.5 V

VIHD Minimum High Level Dynamic Input Voltage 2.0 V

VILD Maximum Low Level Dynamic Input Voltage 0.8 V

Figure 3. Switching Waveforms

VCC

GND

50%

50% VCC

A or B

tPHL

tPLH

*Includes all probe and jig capacitance

Figure 4. Test Circuit

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

MC74LVX32

http://onsemi.com

PACKAGE DIMENSIONS

SOIC−14

D SUFFIX

CASE 751A−03

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.127

(0.005) TOTAL IN EXCESS OF THE D

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

−A−

−B−

P7 PL

14 8

0.25 (0.010) B M

0.25 (0.010) A S

−T−

RX 45

SEATING

PLANE D14 PL K

_DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A8.55 8.75 0.337 0.344

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.228 0.244

R0.25 0.50 0.010 0.019

__ __

7.04

14X

0.58

14X

1.52

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT

MC74LVX32

http://onsemi.com

PACKAGE DIMENSIONS

TSSOP−14

DT SUFFIX

CASE 948G−01

ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

____

U0.15 (0.006) T

2X L/2

0.10 (0.004) V S

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇ

SECTION N−N

DETAIL E

JJ1

ÉÉÉ

DETAIL E

−W−

0.25 (0.010)

PIN 1

IDENT.

U0.15 (0.006) T

−V−

14X REFK

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT

MC74LVX32

http://onsemi.com

PACKAGE DIMENSIONS

SOEIAJ−14

CASE 965−01

ISSUE B

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.10 0.20 0.004 0.008

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0.70 0.90 0.028 0.035

--- 1.42 --- 0.056

_10 _0

_10 _

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND ARE

MEASURED AT THE PARTING LINE. MOLD FLASH

OR PROTRUSIONS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

0.13 (0.005) M0.10 (0.004)

14 8

VIEW P

DETAIL P

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

MC74LVX32/D

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your local

Sales Representative