eGaN(R) FET DATASHEET EPC2015 EPC2015 - Enhancement Mode Power Transistor VDSS , 40 V RDS(ON) , 4 mW ID , 33 A NEW PRODUCT EFFICIENT POWER CONVERSION HAL Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment leveraging the infrastructure that has been developed over the last 55 years. GaN's exceptionally high electron mobility and low temperature coefficient allows very low RDS(ON), while its lateral device structure and majority carrier diode provide exceptionally low QG and zero QRR. The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate. Maximum Ratings VDS ID VGS TJ TSTG Drain-to-Source Voltage (Continuous) 40 V Drain-to-Source Voltage (up to 10,000 5ms pulses at 125 C) 48 V Continuous (TA = 25C, JA = 13) 33 Pulsed (25C, Tpulse = 300 s) 150 Gate-to-Source Voltage 6 Gate-to-Source Voltage -5 Operating Temperature -40 to 150 Storage Temperature -40 to 150 PARAMETER EPC2015 eGaN(R) FETs are supplied only in passivated die form with solder bars Applications * High Speed DC-DC conversion * Class D Audio * Hard Switched and High Frequency Circuits A Benefits * Ultra High Efficiency * Ultra Low RDS(on) * Ultra low QG * Ultra small footprint V C TEST CONDITIONS MIN 40 TYP MAX UNIT Static Characteristics (TJ= 25C unless otherwise stated) BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 500 A IDSS Drain Source Leakage VDS = 32 V, VGS = 0 V 200 400 Gate-Source Forward Leakage VGS = 5 V 1.5 7 Gate-Source Reverse Leakage VGS = -5 V 0.3 1.5 VGS(TH) Gate Threshold Voltage VDS = VGS, ID = 9 mA 1.4 2.5 V RDS(ON) Drain-Source On Resistance VGS = 5 V, ID = 33 A 3.2 4 m IGSS 0.7 V A mA Source-Drain Characteristics (TJ= 25C unless otherwise stated) VSD Source-Drain Forward Voltage IS = 0.5 A, VGS = 0 V, T = 25C 1.75 IS = 0.5 A, VGS = 0 V, T = 150C 1.8 V All measurements were done with substrate shorted to source. Thermal Characteristics TYP RJC Thermal Resistance, Junction to Case 2.1 C/W RJB Thermal Resistance, Junction to Board 15 C/W RJA Thermal Resistance, Junction to Ambient (Note 1) 54 C/W Note 1: RJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. See http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details. EPC - EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | | PAGE 1 eGaN(R) FET DATASHEET EPC2015 PARAMETER TEST CONDITIONS MIN TYP MAX 1100 1200 575 750 UNIT Dynamic Characteristics (TJ= 25C unless otherwise stated) CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance 60 70 QG Total Gate Charge (VGS = 5 V) 10.5 11.6 QGD Gate to Drain Charge 2.2 2.7 QGS Gate to Source Charge 3 3.5 QOSS Output Charge 18.5 22 QRR Source-Drain Recovery Charge 0 0 VDS = 20 V, VGS = 0 V VDS = 20 V, ID = 33 A VDS = 20 V, VGS = 0 V pF nC All measurements were done with substrate shorted to source. Figure 1: Typical Output Characteristics Figure 2: Transfer Characteristics 150 150 VGS = 5 VGS = 4 VGS = 3 VGS = 2 50 0 0 10 RDS(ON) - Drain to Source Resistance (m) ID - Drain Current (A) 100 0.5 1 1.5 VDS - Drain to Source Voltage (V) Figure 3: RDS(on) vs VGS for Various Current ID = 10 A ID = 20 A ID = 50 A ID = 100 A 6 4 2 2 2.5 3 3.5 4 100 50 20 8 0 V DS = 3V 0 2 RDS(ON) - Drain to Source Resistance (m) ID - Drain Current (A) 25C 125C 4.5 VGS - Gate to Source Voltage (V) 5 5.5 0.5 1 1.5 1.6 2.5 3 3.5 4 4.5 Figure 4: RDS(on) vs VGS for Various Temperature 25C 125C ID = 33 A 15 10 5 0 2 2.5 3 4.5 ID = 33 A V = 20 V 3.5 4 4.5 VGS - Gate-to-Source Voltage (V) Figure 5: Capacitance Figure 6: Gate Charge 5 EPC -1.8EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | COSS = CGD + CSD C = C +C 2 VGS - Gate-to-Source Voltage (V) 5 5.5 | PAGE 2 0 2 2.5 3 3.5 4 4.5 5 VGS - Gate to Source Voltage (V) 0 5.5 2 2.5 3 eGaN(R) FET DATASHEET Figure 5: Capacitance COSS = CGD + CSD CISS = CGD + CGS CRSS = CGD 1.2 1 0.8 0.6 0.4 0.2 4 5.5 EPC2015 3.5 3 2.5 2 1.5 1 0.5 0 10 20 0 30 VDS - Drain to Source Voltage (V) Figure 7: Reverse Drain-Source Characteristics 0 2 4 6 8 10 QG - Gate Charge (nC) 12 Figure 8: Normalized On Resistance Vs Temperature 3 Normalized On-State Resistance - RDS(ON) 25C 125C ISD - Source to Drain Current (A) 5 ID = 33 A VD = 20 V 4.5 VG - Gate to Source Voltage (V) C - Capacitance (nF) 1.4 100 50 0 0.5 1 1.5 2 2.5 3 VSD - Source to Drain Voltage (V) 3.5 4 4.5 ID = 33 A VGS = 5 V 2.5 2 1.5 1 0.5 -20 Figure 9: Normalized Threshold Voltage vs. Temperature .025 1.2 IG - Gate Current (A) 1.05 1 40 60 80 100 TJ - Junction Temperature ( C ) 120 140 .015 .01 .005 0.95 0.9 -20 20 25C 125C .02 1.1 0 Figure 10: Gate Current ID = 9 mA 1.15 Normalized Threshold Voltage 4.5 5 1.6 150 4 Figure 6: Gate Charge 1.8 0 3.5 VGS - Gate-to-Source Voltage (V) 0 20 40 60 80 100 120 140 0 0 1 TJ - Junction Temperature ( C ) 2 3 4 5 6 VGS - Gate-to-Source Voltage (V) All measurements were done with substrate shortened to source. EPC - EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | | PAGE 3 eGaN(R) FET DATASHEET EPC2015 Figure 11: Transient Thermal Response Curves Normalized Maximum Transient Thermal Impedance ZJB, Normalized Thermal Impedance 1 Duty Factors: 0.5 0.1 0.2 0.1 0.05 0.01 0.02 0.01 t1 Single Pulse 0.001 0.0001 PDM 10-5 10-4 t2 Notes: Duty Factor: D = t1/t2 Peak TJ = PDM x ZJB x RJB + TB 10-3 10-2 10-1 1 10 100 tp, Rectangular Pulse Duration, seconds Normalized Maximum Transient Thermal Impedance ZJC, Normalized Thermal Impedance 1 Duty Factors: 0.5 0.1 0.2 0.1 PDM 0.05 t1 0.01 0.02 0.01 Notes: Duty Factor: D = t1/t2 Peak TJ = PDM x ZJC x RJC + TC Single Pulse 0.001 t2 10-6 10-5 10-4 10-3 10-2 10-1 1 tp, Rectangular Pulse Duration, seconds Figure 12: Safe Operating Area 100 I D- Drain Current (A) 10 s 100 s 10 limited by RDS(ON) 1 ms 10 ms 100 ms/DC 1 0.1 TJ = Max Rated, TC = +25C, Single Pulse 0.1 1 10 100 VDS - Drain-Source Voltage (V) EPC - EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | | PAGE 4 eGaN(R) FET DATASHEET EPC2015 TAPE AND REEL CONFIGURATION 4mm pitch, 12mm wide tape on 7" reel b e d g f Loaded Tape Feed Direction Die orientation dot 7" reel c a Gate solder bar is under this corner Die is placed into pocket solder bar side down (face side down) EPC2015 (note 1) Dimension (mm) target a b c (note 2) d e f (note 2) g 12.0 1.75 5.50 4.00 4.00 2.00 1.5 min max 11.7 12.3 1.65 1.85 5.45 5.55 3.90 4.10 3.90 4.10 1.95 2.05 1.5 1.6 Note 1: MSL1 (moisture sensitivity level 1) classified according to IPC/JEDEC industry standard. Note 2: Pocket position is relative to the sprocket hole measured as true position of the pocket, not the pocket hole. DIE MARKINGS 2015 YYYY Die orientation dot Part Number ZZZZ Gate Pad solder bar is under this corner Laser Markings Part # Marking Line 1 Lot_Date Code Marking line 2 Lot_Date Code Marking Line 3 2015 YYYY ZZZZ EPC2015 A DIE OUTLINE f d X2 Solder Bar View f X9 3 4 5 6 7 8 9 10 A B c d e f g 11 c B 2 DIM 1 e g MIN 4075 1602 1379 577 235 195 400 MICROMETERS Nominal 4105 1632 1382 580 250 200 400 MAX 4135 1662 1385 583 265 205 400 g X8 SEATING PLANE EPC - EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | 815 Max 100 +/- 20 (685) Side View | PAGE 5 eGaN(R) FET DATASHEET RECOMMENDED LAND PATTERN EPC2015 The land pattern is solder mask defined. Pad no. 1 is Gate; (units in m) Pads no. 3, 5, 7, 9, 11 are Drain; Pads no. 4, 6, 8, 10 are Source; 1362 560 X2 Pad no. 2 is Substrate. 180 X9 180 Efficient Power Conversion Corporation (EPC) reserves the right to make changes without further notice to any products herein to improve reliability, function or design. EPC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. eGaN(R) is a registered trademark of Efficient Power Conversion Corporation. EPC - EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2013 | Information subject to change without notice. Revised January, 2013 | PAGE 6