74VHC14MTCX_JD8 - Fairchild Semiconductor

June 1993

Revised April 1999

74VHC14 Hex Schmitt Inverter

74VHC14

Hex S chmi t t Inverter

General Descript ion

The VHC14 is an advanced high speed CMOS Hex

Schmitt Inverter fabricated with silicon gate CMOS technol-

ogy. It achieves the high speed operation similar to equiva-

lent Bipolar Schottky TTL while maintaining the CMOS low

power dissipation. Pin configuration and function are the

same as the VHC04 but the inputs have hysteresis

between the positive-going and negative-going input

thresholds, which are capable of transforming slowly

changing input signals into sharply defined, jitter-free out-

put sign als, thus pro viding greater noise ma rgin than co n-

ventional inverters.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two sup ply systems such as battery ba ck up. This cir-

cuit pr eve nts dev ic e d estr uct ion due to m i sma tche d s upp l y

and input voltages.

Features

■High Speed: tPD = 5.5 ns (typ) at VCC = 5V

■Low power dissipation: ICC = 2 µA (Max) at TA = 25°C

■High noise immunity: VNIH = VNIL = 28% VCC (Min)

■Power down protection is provided on all inputs

■Low noise: VOLP = 0.8V (Max)

■Pin and function compatible with 74HC14

Ordering Code:

Surface m ount pac k ages are also available on Tape and Reel. Sp ec if y by appending the suffix lette r “X” to the or dering code .

Logic Symbol

IEEE/IEC

Pin Descriptions

Connection Diagram

Truth Table

Order Number Package Number Package Description

74VHC14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

74VHC14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHC14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names Description

AnInputs

OnOutputs

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74VHC14

Absolute Maximum Ratings(No te 1) Recommended Operating

Conditions (Note 2)

Note 1: Absolute maximum ratings are values beyond which the device

may be d ama ged o r have its u sef ul lif e im pair ed . The da ta book sp ecific a-

tions should be met, without exception, to ensure that the system design is

reliable over its pow er supply, te mperature, a nd output/in put loading vari-

ables. Fa irc hild does not recom mend oper at ion outside data book specific a-

tions.

Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Noise Characteristics

Note 3: Parameter guara nt eed by des ign.

Supply Volt age (VCC)−0.5V to +7.0V

DC In put Voltage (VIN)−0.5V to +7.0V

DC Output Voltage (VOUT)−0.5V to VCC + 0.5V

Input Diode Current (IIK)−20 mA

Output Diode Current (IOK)±20 mA

DC Output Current (IOUT)±25 mA

DC VCC/GND Current (ICC)±50 mA

Storage Temperature (TSTG)−65°C to +150°C

Lead Temperature (TL)

Soldering (10 seconds) 260°C

Supply Voltage (VCC)+2.0V to +5.5V

Input Voltage (VIN)0V to +5.5V

Output Voltage (VOUT) 0V to VCC

Operating Temperature (TOPR)−40°C to +85°C

Symbol Parameter VCC TA = 25°CT

A = −40°C to +85°CUnits Conditions

Min Typ Max Min Max

VPPositive Threshold Voltage 3.0 2.20 2.20

4.5 3.15 3.15 V

5.5 3.85 3.85

VNNegative Threshold Voltage 3.0 0.90 0.90

4.5 1.35 1.35 V

5.5 1.65 1.65

VHHysteresis Voltage 3.0 0.30 1.20 0.30 1.20

4.5 0.40 1.40 0.40 1.40 V

5.5 0.50 1.60 0.50 1.60

VOH HIGH Level Output Voltage 2.0 1.9 2.0 1.9 VIN =VIL

3.0 2.9 3.0 2.9 V IOH = −50 µA

4.5 4.4 4.5 4.4

3.0 2.58 2.48 VIOH = −4 mA

4.5 3.94 3.80 IOH = −8 mA

VOL LOW Level Output Voltage 2.0 0.0 0.1 0.1 VIN = VIH

3.0 0.0 0.1 0.1 V IOL = 50 µA

4.5 0.0 0.1 0.1

3.0 0.36 0.44 VIOL = 4 mA

4.5 0.36 0.44 IOL = 8 mA

IIN Input Leakage Current 0–5.5 ±0.1 ±1.0 µAV

IN = 5.5V or GND

ICC Quiescent Supply Current 5.5 2.0 20.0 µAV

IN = VCC or GND

Symbol Parameter VCC TA = 25°CUnits Conditions

Typ Limits

VOLP

(Note 3) Quiet Output Maximum Dynamic VOL 5.0 0.4 0.8 V CL = 50 pF

VOLV

(Note 3) Quiet Output Minimum Dynamic VOL 5.0 −0.4 −0.8 V CL = 50 pF

VIHD

(Note 3) Minimum HIGH Level Dynamic Input Voltage 5.0 3.5 V CL = 50 pF

VILD

(Note 3) Maximum LOW Level Dynamic Input Voltage 5.0 1.5 V CL = 50 pF

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74VHC14

AC Electrical Characteristics

Note 4: CPD is defin ed as the va lue of the inte rnal equi v alent capac it ance which is calcul at ed from the operating c urrent cons umptio n w it hout load. Average

operati ng c urrent ca n be obtaine d by t he equation : ICC (Opr) = CPD * VCC * fIN + ICC/6 (per Gate)

Symbol Parameter VCC TA = 25°CT

A = −40°C to +85°CUnits Conditions

Min Typ Max Min Max

tPLH Propagation Delay 3.3 ± 0.3 8.3 12.8 1.0 15.0 ns CL = 15 pF

tPHL Time 10.8 16.3 1.0 18.5 CL = 50 pF

5.0 ± 0.5 5.5 8.6 1.0 10.0 ns CL = 15 pF

7.0 10.6 1.0 12.0 CL = 50 pF

CIN Input Capacitance 4 10 10 pF VCC = Open

CPD Power Dissipation Capacitance 21 pF (Note 4)

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74VHC14

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

14-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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74VHC14

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Packag e Num be r MTC 14

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

74VHC14 Hex Schmitt Inverter

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a life su pport

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa i lure of the life su pp ort

device or system, or to affect its safety or effectiveness.

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A