REVISIONS LTR DESCRIPTION DATE (vR-M0-DA) | APPROVED C Added CAGE number 1FN41 and 34335 to the drawing as approved 1989 OCT 30 sources of supply. Added vendor CAGE number 18324 to device MZ. types 01ZX, 02ZX, and 03ZX, with changes to margin test methods A and B. Added device type 07 to the drawing for vendor CAGE number 65579 with changes to table I. Deleted figure 5 and table III. Also, deleted program method column from 6.6. Editorial changes throughout. REV SHEET REV SHEET REV STATUS REV cic yc JC ECCT cic ti clcjc Jc] cle fc OF SHEETS SHEET Li2 | 3 sie i ia node t3hiehs PMIC WA AREPARED BY DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 STANDARDIZED MILITARY MICROCIRCUITS, DIGITAL, 65,536 BIT (8K X 8) DRAWING CMOS UV ERASABLE PROM, MONOLITHIC SILICON ILABLE FOR USE BY ALL DEPARTMENTS | DRAWING APPROVAL DM Sze CAGE CODE AND AGENCIES OF THE 10 JANUARY 1986 A 14933 85102 DEPARTMENT OF DEFENSE REVISION LEVEL AMSC N/A c SHEET 1 OF 15 DESC FORM 193-1 U.S. GOVERNMENT PRINTING OFFICE: 1987 748-129/60912 SEP 87 5962-E1282 DISTRIBUTION STATEMENT A. Approved for public release; distribution Is unlimited.1, SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". 1,2 Part number. The complete part number shall be as shown in the following example: 85102 01 Y X oT 1 1 1 | | | | | | | | Drawing number Device type Case outline Lead finish per (1.2.1) (1.2.2) MIL-M-38510 1.2.1 Device types. The device types shall identify the circuit function as follows: Device type Generic number Circuit Access 01 27064-25 8K x 8-bit CMOS UVEPROM 250 ns 02 27064-35 8K x 8-bit CMOS UVEPROM 350 ns 03 27C 64-20 8K x 8-bit CMOS UVEPROM 200 ns 04 27064-90 8K x 8-bit CMOS UVEPROM 90 ns 05 27064-12 8K x 8-bit CMOS UVEPROM 120 ns 06 27064-15 8K x 8-bit CMOS UVEPROM 150 ns 07 57C64-70 8K x 8-bit CMOS UVEPROM 70 ns 1.2.2 Case outlines. The case outlines shall be as designated in appendix C of MIL-M-38510, and as follows: Outline letter Case outline 1/ Y D-10 (28-pin, 1.490" x .610" x .232"), dual-in-line package Z C-12 (32-terminal, .560" x .458" x .120"), rectangular chip carrier package 1.3 Absolute maximum ratings. Storage temperature range - - - - - - - - - -65C to +150C All input or output voltages with respect to ground-------+---+------+- -2.0 V dc to +7.0 V de 2/ Voltage on Ag with respect to ground- - - - ~2.0 V de to +13.5 V de 2/ Vpp supply voltage with respect to ground during programming- ---------- - -2.0 V de to +14.0 V de 2/ Maximum power dissipation (Pp): 3/ Device types 01 and 03- --------- 170 mW Device type 02- ------+-------- 140 mW Device types 04, 05, 06, and 07 - - - - - 550 ml Lead temperature (soldering, 10 seconds)- - +300 Thermal resistance, junction-to-case (yc): Cases YandZ--+----+---+-+--.-- See MIL-M-38510, appendix C Junction temperature (Tj) - - ---- - - - +150 C 17 Lid shal? be transparent to permit ultraviolet light erasure. 2/ Minimum dc input voltage is -0.5 V dc, during transitions, the inputs may undershoot to -2.0 V dc for periods less than 20 ns. 3/ Must withstand the added Pp due to short-circuit test; e.g., Igs. STANDARDIZED a MILITARY DRAWING $5102 DEFGNSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 c 2 DESC FORM 19 3A tr U, 8. GOVERNMENT PRINTING OFFICE: 1988-550-547 SEP 871.4 Recommended operating conditions. Case operating temperature range (Tc) - - - -55C to +125C Input low voltage #10% supply (Vy) - - - - -0.5 V dc to +0.8 V dc Input high voltage +102 supply (Vqpy)- - - - 2.0 V de to Ver 0.5 V de Supply voltage range(Vcc) - -------- 4.5 V de to 5k V de 2. APPLICABLE DOCUMENTS 2.1 Government specification, Standard, and bulletin. Unless otherwise specified, the following |speciticatton, standard, and bulletin of the Tssue Tisted in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Specification for. STANDARD MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. BULLETIN MILITARY MIL-BUL-103 - List of Standardized Military Drawings (SMD's). (Copies of the specification, standard, and bulletin required by manufacturers fn connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with 1.2.1 of MIL-STD-883, BrovTsTons for the use of MIL-STD-883 in conjunction with compliant non-JAN devices" and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-M-38510 and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.2.1 Unprogrammed or erased devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.2.2 Program devices. The requirements for supplying programmed devices are not a part of this drawing. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. STANDARDIZED ~ MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 c 3 DESC FORM 193A SE P 87 * U. 8. GOVERNMENT PRINTING OFFICE: 1988550-547TABLE I. Electrical performance characteristics. | | | T | | Test [Symbol | Conditions | Group A |Device | Limits | | | ~55C Te < +125C Isubgroups| type | {Unit { 14.5 V <Vec < 5.5 V | { [Min | Max | | lunless Sthernise specified| | | | | l I I I T I I Input load current [Pur {YIN = 5.5 V or GND 1/ | 1, 2, 3 Al |-10 10 | uA I ] T | T | Output leakage serene r = 5.5 V or GND |! 1, 2, 3 Al 1-10 | 10 | A T | 04 7 I 75 | Operating current, mit c ICE = UE = = VIL | lor, 03] 30 mA inputs 2/ if \Vpp = Vcc }1, 2,3 |~ 02 7 25 | 00 -0] = O mA | | 05] 65 | | MHz min | | te 60 | i if I [O71 65 | | | | | 04 { 60 | Operating current 3/ |Ic ITE = UE = Va, 11, 2, 3 [OT,02, 7 | 10 | mA ICMOS |Vpp = Vcc | |_ 03 | { |09- "7 = 0 mA | {05 55 | | if MHz min | [06 50 | | | | | 07] 70 | I | | JOI,02, ] | | Standby current, TTL [1 [OE = CE = Vyy }1, 2,3] 03 | 1 | mA inputs 2/ ITP lf = O MHz | (04,05, 7 z | 109-07 = disabled | | 06 | | | T 1Or,02, 1 Standby current, CMOS IIcp OE = CE = Viy 11,2,3 1 03 | 140 | uA inputs 4/ ICMOS = {f = O MHz | 104,05, 200 | \00-07 = disabled 06 | | | ] | i | ] | Vpp read current 5/ {TPP \Ypp = Vee |! 1, 2, 3 | All 100 ! pA | | | T ] I Input low voltage iV lVpp = Vc f1, 2,3 1] All [-0.5 0.8 | Vv +10% supply | | | | | 6/ | | | | I | | | I I I | | I | | Input high voltage Wry IYpp = Vcc 1, 2,3] All 1 2.0 We +0.5 | V 10% supply | | | | | | 6/ | | | | | | | | | Tr ] T T | T Output low voltage | Vou Vip = 0.8 V, Vy = 2.0 V | 1, 2, 3 | 01-06 | | 0.45 i V | Hg, = 2.1 m | oo] | | | L_o7_ | | 0.4 | i l ] | T I | Output high voltage [Voy [Vq_ = 0.8 V, Vay = 2.0V [| 1, 2,31 All | 2.4] | Vv | Igy = -400 uA | | | | | | { { | | | | l T ] I T | | Output short-circuit [Igs5 | } 1,2, 3} All | i 100 | mA current | 6/ | i | | | | | | I | | { | See footnotes at end of table. STANDARDIZED A MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 C 4 DESC FORM 193A SEP 87 wr U. . GOVERNMENT PRINTING OFFICE; 1988-550-547TABLE I, Electrical performance characteristics - Continued. | | .. conditions, I | | | Test |Symbol | -55C < Te < +125C | Group A_ |Device | Limits | | 1 4.5 V Wee < 5.5 subgroups | type | |Unit | | unless otherwise | | | Min Max | | | specified | | | | | I | | | I I Tr Vpp read voltage 7/ \Ypp 1, 2, 3 |! All cg Vec | V | Input capacitance Cin [Vin = OV | 4 1 Alt | | 10 | pF { [See 4.3.1c | | | | | | | | | | | Output it Ic V ov 4 All 12 | utput capacitance = pot \see'4.3.1 | | l 1 | | | l q T | T Functional tests | See 4.3.le 17, 8 } All | | Ir. OF to 1 OF 1 50 T ns Address to output tacc = = VIL 9, 10, 11 1) 250 I delay 8/ 9/ | | | a ae | 350 | | | | 200 | { | [~ 05 | 120 J | i | | 06 | 150 [ | | | [ 07_T 70 lor 19. 10 1 | OF] 90 ns CE to output delay tce OF = Vat 10, 1 or] 250 8/ 9/ | I | | Oe I 350 | | | | 037 T ! 200 | | | | [0s | 120 { | | |~ 06 T I 150 | | | | {07 7 1 | I | 104, Q7 30 I ns OE to output delay I tog |CE = Vor 19, 10, 11 |_ OT 100 OT 8/ 9/ | | | | 02_T T1200. J | | | 03s TI 75 | | | | | 35 | | l 06 T 5 | | 1 I 104, 07 | Of 29 | ns DE high to output itor ICE = Vy 19, 10, 11 |61, 03 T 0 55 float 8/ 9/ | 6 | | | 02 T_ 0 105 | | | {0s TO | | | [~te_T | m1 | | | | 1 | Output hold from I ton CE = OF = Viz 19, 10, 11 | 01-06 | 0 | ns addresses, TE or UE | / | | T T T whichever occurred | ~ | | 1 07 | 10 | first 8/ 9/ l | I I | I | | | i | | | | See footnotes on next page. STANDARDIZED A MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 C 5 DESC FORM 193A SEP 87 + U. S. GOVERNMENT PRINTING OFFICE: 1988-550-5471/ Pins not tested are all at GND and 5.5 V respectively. 2/ TIL inputs: Specify Vy_ and Vry levels. 3/ CMOS inputs: GND 40.2 b to Vcc #0.2 V. a/ UE = Voc #0.2 . All other inputs can have any value within specified limits. B/ Maximum active power usage is the sum of Ipp + Ic. 6/ If not tested, shall be guaranteed to the Himits specified in table I. 7/ Vpp may be connected directly to Vcc except during programming. 8/ Outputs shall be loaded in accordance with figure 3. 9/ See figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case Operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IT. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-STD-883 (see 3.1 herein}. The part shall be marked with the part number listed in 1.2 herein. In addition, the manufacturer's part number may also be marked as listed in MIL-Bul-103 (see 6.6 herein). 3.6 Certificate of compliance. A certificate of compliance shal] be required from a manufacturer in order to ba listed as an approved source of supply in MIL-BUL-103 (see 6.6 herein). The certificate of compliance submitted to DESC-ECS prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-STD-883 (see 3.1 herein) and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-STD-883 (see 3.1 hereTn) shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DESC-ECS shall be required in accordance with MIL-STD-883 (see 3.1 herein). 3.9 Verification and review. DESC, DESC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing EPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.10.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the jprocedures and characteristics specified in 4.4 herein. 3.10.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.10.3 Verification of erasure of programmability of EPROMS, When specified, devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification shat] consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shal] be in accordance with section 4 of MIL -MCIBSI0 to the extent specified in MIL-STD-883 (see 3.1 herein). STANDARDIZED i" MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 C DESC FORM 193A SE Pp 87 4 U. S. GOVERNMENT PRINTING OFFICE: 1988550-547Devices types 01-07 Case Y Devices types 01-07 Case Z 7 Ata Ypp no Yeo PGR Ne Pin names | Ag - A12 Addresses TE Chip enable | OE Output enable | 0p - 07 Outputs PGM Program pin | | (method A only) | | FIGURE 1. Terminal connections. STANDARDIZED SIZE as102 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 7 DAYTON, OHIO 45444 C DESC FORM 193A SEP 87 1-.S. GOVERNMENT PRINTING OFFICE: [987 - 748-129-60913Read modes (see notes 1 and 2) Programming modes (see notes 1 and 2) Read Output disable Standby 3 N~s mam tests nrarTerst > - = a =z => m _ So OwWAM kL ~ M NO lO S a a =x DDOnAN oo0oKnr fm em ae fe ee face fe Le oO ~ Hw ay > amd oO ~ = > oO ow ow oO oOo YQ > *@ *@ = L oO won won > => > fan me a a eye fr one ca es ee ee a a a. a wo a. a. a. a. oO oe > > > > > oO ~ oO ~< =< ~< a = < > =~ n < < x =x = <x > > re a = | =x =x i _ =< _ _ > > > > > = | a ad i _ _ ~~ _ ~ Pad > => fa a fe had a =x ! o wo _ Lon _ ra) > > > =~ > wo wo n - oa i -wd = = - - a > aad = st & ~ oo w > vad a eo ut an oe a 3 = - - Pw a a i = PO, PP i E ov c coo =o wv > - ee & veo me ms no eo & = e - oD & DD cs] oc - ow mY v - Oo .< +S -- EO nn To vo an n vol wy ra o oO ri - = = - - = c a, a _ - SHEET 85102 w U, 8, GOVERNMENT PRINTING OFFICE: 1988550-547 REVISION LEVEL Truth tables. SIZE FIGURE 2. 6.0 V #0,25 V. Ay - Ag, Aig - Aza = VIL. DAYTON, OHIO 45444 12.0 V #0.5 . DESC FORM 193A STANDARDIZED MILITARY DRAWING DEFENGE ELECTRONICS SUPPLY CENTER X can be Vyy or Vyy. Vy Voc NOTES: 1, 2. 3. 4. SEP 871. 3V 1N914 OR EQUIVALENT 3.3K DEVICE UNDER TEST OUT C, = 100 pF C, = 100 pF T L C, INCLUDES = JIG CAPACITANCE FIGURE 3. Output load. Vow _ ADDRESSES yt ADDRESS Ny VIL A .---A Nu te cE if VoL _..._/ t | OE } Vie | . ~ DF of t OUTPUT HIGH Z| L/{//|\ vaio \\\ HIGH Z OUTPUT ae VoL. WY U7 NOTES 1. OE may be delayed up to tacc - tog after the falling edge of CE without impact on tgcc. tpr is specified from OE or TE, whichever occurs first. AC characteristics tested at Vjy = 2.4 V and Vy, = 0.45 V, timing measurement made at 2.0 V and .8 V levels. FIGURE 4. AC waveforms. STANDARDIZED * a5102 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL c SHEET 4 DAYTON, OHIO 45444 DESC FORM 193A 3YU.S. GOVERNMENT PRINTING OFFICE: 1987 - 748-129-9093, SEP 874.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on art devices prior to quality conformance inspection. The following additiona} criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D using the circuit submitted with the certificate of compliance (see 3.6 herein). (2) Ty = *125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. c. The percent defective allowable (PDA) shall] be as specified in MIL-M-38510. d. A data retention stress test shall be included as part of the screening procedure and shall consist of the following steps. Margin test method A. (1) Program greater than 95 percent of the bit locations, including the slowest programming cell (see 3.10.2). The remaining cells shall provide a worst case speed pattern. (2) Bake, unbiased, for 72 hours at +140C, or at 72 hours at +225C (unassembled devices only). (3) Perform a margin test using Vm = +5.9 V (loose timing, room temperature). (4) Perform dynamic burn-in in accordance with MIL-STD-883. (5) Perform a margin test at Vp = +5.9 V. (6) Perform 100 percent electrical testing at +25C, +125C, and -55C. (7) Final quality assurance procedures. (8) Steps 1 through 3 may be performed at wafer level. (9) The max imum unbiased bake temperature shall not exceed +200C for packaged devices or +300 C for unassembled devices. Margin test method B. (1) Program at +25C 100 percent of the bits. (2) Bake, unbiased, for 24 hours at +250C, or 72 hours at +225C (unassembled devices only). (3) Perform margin test at Vm = 5.9 V. (4) Erase (see 3.10.1). (5) Perform interim electrical tests in accordance with table II. (6) Program with checkerboard pattern and verify (see 3.10.2). {7} Perform dynamic burn-in (see 4.2a). STANDARDIZED A MILITARY DRAWING 85102 DBPENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 c 10 DESC FORM 193A SEP 87 # U. 8. GOVERNMENT PRINTING OFFICE: 1988-550-547(8) One-hundred percent test at +25C (group A, subgroups 1 and 7). Vm = 5.9 V with loose timing, apply PDA. (9) Perform remaining final electrical subgroups and group A testing. (10) Erased, devices may be submitted for groups B, C, and D at this time. (11) Verify erasure (see 3.10.3). Steps 1 through 4 are performed at wafer level. (12) The maximum unbiased bake temperature shal] not exceed +200C for packaged devices or +300 C for unassembled devices. 4.3 Quality conformance ins ection. Quality conformance inspection shall be in accordance with Imethod 5005 oF MIL-STD-883 inctudtng groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (Cyy and Coyy measurements) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals tested. d. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all testing, the devices shall be erased and verified (except devices submitted for groups C and D testing). e. Subgroups 7 and 8 shall consist of verifying the EPROM pattern specified. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C or D using the circuit submitted with the certificate of compliance (see 3.6 herein). (2) Ty = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. (4) All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all testing, the devices shall be erased and verified. 4.4 Erasing procedure. The recommended erasure procedure for the device is exposure to shortwave ultraviolet Tight which has a wavelength of 2537 Angstroms (A). The integpated dose (i.e. UV intensity times exposure time) for erasure should be a minimum of 15 Ws/cm. The erasure time ith this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with a 12,000 uW/om2 power rating. The device should be placed within one inch of the lamp tubes during erasure. The ax imum integrated dose that the device can be exposed to without damage is 7,258 Ws/cm (1 week t 12,000 uW/cm*). Exposure of these CMOS EPROMS to high intensity ultraviolet light of longer periods may cause permanent damage. STANDARDIZED a MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 7 DESC FORM 193A SE Pp 87 te U. S, GOVERNMENT PRINTING OFFICE: 1986550-5474.5 Programming procedures for method A. The programming procedure shall be as specified by the device manufacture. TABLE II. Electrical test requirements. 1/ 2/ | | MIL-STD-883 test requirements Subgroups (per method 5005, table 1) Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) 1*, 2, 3, 7*, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 2, 8 (+125C), 10 ee ed * PDA applies to subgroups 1 and 7. Any or all subgroups may be combined when using a high speed tester. 1/ Subgroups 7 and 8 shall consist of verifying the pattern specified. 2/ For all electrical tests, the device shall be programmed to the pattern specified. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-M-3 . 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM application. When a military specification exists and the product covered by this drawing has been qualified for listing on QPL-38510, the device specified herein will be inactivated and will not be used for new design. The QPL-38510 product shall be the preferred item for all applications. STANDARDIZED size 85102 MILITARY DRAWING A DERPPNGE-ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 . c 12 DESC FORM 193A SEP 87 w U, S. GOVERNMENT PRINTING OFFICE: 1988550-5476.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished in accordance with MIL-STD-481 using DD Form 1693, Engineering Change Proposal (Short Form). 6.4 Record of users. Military and industrial users shall inform Defense Electronics Supply Center when a system application requires configuration control and the applicable SMD. DESC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DESC-ECS, telephone (513) 296-6022. 6.5 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or telephone (513) 296-5375. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-BUL-103. ; Additional sources will be added to MIL-BUL-103 as they become available. The vendors listed in MIL-BUL-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DESC-ECS. The approved sources of supply listed below are for information purposes only and are current only to the date of the last action of this document. | | I T | Military | Vendor | Vendor 1/ | Replacement | Margin | drawing | CAGE | similar part | military specification} test | : part number number number ! part number | method | | I ] ] I Ty } 8510201Yx | 34649 | MD27C64-25/B | | A | | J t | ] | | 27014 | NMC27C64025/883 ! A ! | | I | 1 | 18324 27C64A/BXA-25 | B | | I I 1 | | 66579 WS27C64L-25DMB | A | | 1 T | | 8510201ZX | 34649 MR27C64-25/6 | A | | | | { | | | | 66579 | WS27C64L-25CMB | | A | I l | | l | | 18324 | 27C64A/BUA-25 | | B | | T T | | 8510202YX | 34649 | MD27C64-35/B | | A | | | | | I I | 27014 | NMC 27C64035/883 | A | | | 1 | 'T | | 18324 { 27C64A/BXA-35 | | B [ T T [ | 1 | | 66579 | WS27C64L-35DMB | | A | See footnote at end of table. STANDARDIZED A MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 C 13 DESC FORM 193A SEP 87 % U.S. GOVERNMENT PRINTING OFFICE: 1988550-547| | | | | | Military | Vendor | Vendor 1/ | Replacement | Margin | | drawing | CAGE | similar part Imilitary specification | test | | part number | number | number ! part number ! method T T T qT | T | 85102022X | 34649 | MR27C64-35/B | | A | I ] ' T | | 66579 | WS27C64L-35CMB | |} A | | | | | | 18324 27C64A/BUA-35 | B ! | | | T | 8510203Yx 34649 MD27C64-20/B l | A I | | l | | ! 27014 NMC27C64Q20/883 | A | | TT T | ] | | | 18324 27C64A/BXA-20 | B | | | | y | | | | | 66579 | WS27C64L-20DMB | | A | I | | I | | 8510203ZX 34649 MR27C64-20/8 | A ! | | T | I T | { 18324 | 27C64A/BUA-20 ! B | | J | 1 | I | | 66579 | WS27C64L-20CMB | B | T T I | T | 8510204YX | 34335 | AM27C64-90/BXA | | A | | 1 66579 | WS27C64L-90DMB | A | | | 1FN41 | AT27HC64L-90DM/883| A | | | | | 1 1 85102042X | 34335 | AM27C64-90/BUA | | A { | | 66579 | WS27C64L-90CMB | | A | | 1FN4i1 | AT27HC64L-90LM/883| | A | T | I T | 7 | 8510205YX | 34335 | AM27C64-120/BXA | A | | 66579 | WS27C64L-12DMB | A | T ] | | | | 8510205ZX | 34335 | AM27C64-120/BUA | A | | 66579 | WS27C64L-12CMB | A | ] T I | | | | 8510206YX | 34335 | AM27C64-150/BXA | | A | | | 66579 | WS27C64L-15DMB | A ! I | | | 8510206ZX | 34335 | AM27C64-150/BUA | A | | 66579 | WS27C64L-15CMB | | A | See footnote at end of table. STANDARDIZED SIZE MILITARY DRAWING A asic DEPENGE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 Cc 14 DESC FORM 193A SEP 87 # U. 5. GOVERNMENT PRINTING OFFICE: 1968-S50-547| | | | I | | Military | Vendor | Vendor 1/ | Replacement | Margin | | drawing | CAGE | similar part Imilitary specification | test | | part number number number | part number ! method ! | I I I T T | 8510207YX 66579 WS57C64F ~70DMB A ! | | 1 | { dy 8510207ZX | 66579 | WS57C64F ~70CMB | ! A 1/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor Manufacturer's Intelligent CAGE Vendor name identification code identifier number and address (see figure 2) (see figure 2) 18324 Signetics Corporation 15H OB H 4130 South Market Court Sacramento, CA 95834 27014 National Semiconductor 8F H C2 4H 2900 Semiconductor Drive Santa Clara, CA 95052 34335 Advance Micro Devices 01H 15H 901 Thompson Place P.0. Box 3453 Sunnyvale, CA 94088 34649 Intel Corporation 89 H 07 H 3065 Bowers Avenue Santa Clara, CA 95051 66579 Waferscale Integration Incorporated 23 H 47280 Kato Road Fremont, CA 94539 1FN41 Atmel Corporation 1F H 91H 2095 Ringwood Avenue San Jose, CA 95131 STANDARDIZED MILITARY DRAWING 85102 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 c 15 DESC FORM 193A SEP 87 WU. S. GOVERNMENT PRINTING OFFICE: 1988--550-547