SY58607UMG TR - MICROCHIP TECHNOLOGY

SY58607U

3.2Gbps Precision, 1:2 LVPECL Fanout

Buffer with Internal Termination and Fail

Safe Input

Precision Edge is a registered trademark of Micrel, Inc.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

Oct. 1, 2013

M9999-082907-B

hbwhelp@micrel.com or (408) 955-1690

General Description

The SY58607U is a 2.5/3.3V, high-speed, fully

differential 1:2 LVPECL fanout buffer optimized to

provide two identical output copies with less than 20ps

of skew and less than 10pspp total jitter. The SY58607U

can process clock signals as fast as 2.5GHz or data

patterns up to 3.2Gbps.

The differential input includes Micrel’s unique, 3-pin

input termination architecture that interfaces to LVPECL,

LVDS or CML differential signals, (AC- or DC-coupled)

as small as 100mV (200mVpp) without any level-shifting

or termination resistor networks in the signal path. For

AC-coupled input interface applications, an integrated

voltage reference (VREF-AC) is provided to bias the VT pin.

The outputs are 800mV LVPECL, with extremely fast

rise/fall times guaranteed to be less than 110ps.

The SY58607U operates from a 2.5V ±5% supply or

3.3V ±10% supply and is guaranteed over the full

industrial temperature range (–40°C to +85°C). For

applications that require CML or LVDS outputs, consider

the SY58606U and SY58608U, 1:2 fanout buffers with

400mV and 325mV output swings respectively. The

SY58607U is part of Micrel’s high-speed, Precision

Edge® product line.

Datasheets and support documentation can be found on

Micrel’s web site at: www.micrel.com.

Functional Block Diagram

Precision Edge®

Features

•Precision 1:2, 800mV LVPECL fanout buffer

•Guaranteed AC performance over temperature and

voltage:

–DC-to > 3.2Gbps throughput

–<350ps propagation delay (IN-to-Q)

–<20ps within-device skew

–<110ps rise/fall times

•Fail Safe Input

–Prevents outputs from oscillating when input is

invalid

•Ultra-low jitter design

–85fs RMS phase jitter

•High-speed LVPECL outputs

•2.5V ±5% or 3.3V ±10% power supply operation

•Industrial temperature range: –40°C to +85°C

•Available in 16-pin (3mm x 3mm) QFN package

Applications

•All SONET clock and data distribution

•Fibre Channel clock and data distribution

•Gigabit Ethernet clock and data distribution

•Backplane distribution

Markets

•Storage

•ATE

•Test and measurement

•Enterprise networking equipment

•High-end servers

•Access

•Metro area network equipment

United States Patent No. RE44,134

Micrel, Inc.

SY58607U

Oct. 1, 2013

2 M9999-082907-

hbwhelp@micrel.com or (408) 955-1690

Ordering Information(1)

Part Number Package

Type

Operating

Range

Package Marking Lead

Finish

SY58607UMG QFN-16 Industrial 607U with Pb-Free

bar-line indicator

NiPdAu

Pb-Free

SY58607UMGTR

(2)

QFN-16 Industrial 607U with Pb-Free

bar-line indicator

NiPdAu

Pb-Free

Notes:

1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.

2. Tape and Reel.

Pin Configuration

16-Pin QFN

Pin Description

Pin Number Pin Name Pin Function

1, 4 IN, /IN Differential Input: This input pair is the differential signal input to the device. Input

accepts DC-coupled differential signals as small as 100mV (200mVpp). Each pin of

this pair internally terminates with 50Ω to the VT pin. If the input swing falls below

a certain threshold (typical 30mV), the Fail Safe Input (FSI) feature will guarantee a

stable output by latching the output to its last valid state. See “Input Interface

Applications” subsection.

2 VT Input Termination Center-Tap: Each input terminates to this pin. The VT pin

provides a center-tap for each input (IN, /IN) to a termination network for maximum

interface flexibility. See “Input Interface Applications” subsection.

4 VREF-AC Reference Voltage: This output biases to VCC–1.2V. It is used for AC-coupling

inputs IN and /IN. Connect VREF-AC directly to the corresponding VT pin. Bypass

with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA.

See “Input Interface Applications” subsection.

5, 8,13, 16 VCC Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to

the VCC pins as possible.

6, 7, 14, 15 GND,

Exposed pad

Ground: Exposed pad must be connected to a ground plane that is the same

potential as the ground pins.

9, 10

11, 12

/Q1, Q1

/Q0, Q0

LVPECL Differential Output Pairs: Differential buffered copies of the input signal.

The output swing is typically 800mV. Unused output pair may be left floating with

no impact on jitter. See “LVPECL Output Termination” subsection.

Micrel, Inc.

SY58607U

Oct. 1, 2013

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Absolute Maximum Ratings(1)

Supply Voltage (VCC) ............................... –0.5V to +4.0V

Input Voltage (VIN) ....................................... –0.5V to VCC

LVPECL Output Current(IOUT)

Continuous ....................................................... 50mA

Surge ............................................................. 100mA

Current (VT)

Source or sink on VT pin ............................. ±100mA

Input Current

Source or sink Current on (IN, /IN) ................ ±50mA

Current (VREF)

Source or sink current on VREF-AC

(4) .............. ±1.5mA

Maximum operating Junction Temperature .......... 125°C

Lead Temperature (soldering, 20sec.) .................. 260°C

Storage Temperature (Ts) .................... –65°C to +150°C

Operating Ratings(2)

Supply Voltage (VIN) ........................ +2.375V to +3.60V

Ambient Temperature (TA) ................... –40°C to +85°C

Package Thermal Resistance(3)

QFN

Still-air (θJA) ............................................ 60°C/W

Junction-to-board (ψJB) ......................... 33°C/W

DC Electrical Characteristics(5)

TA = –40°C to +85°C, unless otherwise stated.

Symbol Parameter Condition Min Typ Max Units

VCC Power Supply Voltage Range 2.375

3.0

2.5

3.3

2.625

3.6 V

ICC Power Supply Current No load, max. VCC 40 60 mA

RDIFF_IN Differential Input Resistance

(IN-to-/IN)

90 100 110 Ω

VIH Input HIGH Voltage

(IN, /IN)

IN, /IN, Note 7 VCC–1.6 VCC V

VIL Input LOW Voltage

(IN, /IN)

IN, /IN 0 VIH–0.1 V

VIN Input Voltage Swing

(IN, /IN)

see Figure 3a, Note 6 0.1 1.7 V

VDIFF_IN Differential Input Voltage Swing

(|IN - /IN|)

see Figure 3b 0.2 V

VIN_FSI Input Voltage Threshold that

Triggers FSI

30 100 mV

VREF-AC Output Reference Voltage VCC–1.3 VCC–1.2 VCC–1.1 V

IN to VT 1.28 V

Notes:

1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not

implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions

for extended periods may affect device reliability.

2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.

3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. ψJB and θJA

values are determined for a 4-layer board in still-air number, unless otherwise stated.

4. Due to the limited drive capability, use for input of the same package only.

5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.

6. VIN (max) is specified when VT is floating.

7. VIH (min) not lower than 1.2V.

Micrel, Inc.

SY58607U

Oct. 1, 2013

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LVPECL Outputs DC Electrical Characteristics(7)

VCC = +2.5V ±5% or +3.3V ±10%, RL = 50Ω to VCC-2V; TA = –40°C to +85°C, unless otherwise stated.

Symbol

Parameter

Condition

Min

Typ

Max

Units

VOH Output HIGH Voltage Q0, /Q0, Q1, /Q1 VCC-1.145 VCC -0.895 V

VOL Output LOW Voltage Q0, /Q0, Q1, /Q1 VCC-1.945 VCC-1.695 V

VOUT Output Voltage Swing See Figure 3a 550 800 950 mV

VDIFF_OUT Differential Output Voltage Swing See Figure 3b 1100 1600 mV

Notes:

7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.

Micrel, Inc.

SY58607U

Oct. 1, 2013

5 M9999-082907-

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AC Electrical Characteristics

VCC = +2.5V ±5% or +3.3V ±10%, RL = 50Ω to VCC-2V, Input tr/tf: <300ps; TA = –40°C to +85°C, unless otherwise

stated.

Symbol Parameter Condition Min Typ Max Units

fMAX Maximum Frequency NRZ Data 3.2 4.25 Gbps

VOUT > 400mV Clock 2.5 3 GHz

tPD Propagation Delay IN-to-Q VIN: 100mV-200mV 180 300 450 ps

VIN: 200mV-800mV 150 230 350 ps

tSkew Within Device Skew Note 8 4 20 ps

Part-to-Part Skew Note 9 135 ps

tJitter RMS Phase Jitter Output = 622MHz

Integration Range 12kHz – 20MHz

85 fs

tr, tf Output Rise/Fall Time

(20% to 80%)

At full output swing. 40 75 110 ps

Duty Cycle Differential I/O 47 53 %

Notes:

8. Within device skew is measured between two different outputs under identical input transitions.

9. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the

respective inputs.

Micrel, Inc.

SY58607U

Oct. 1, 2013

6 M9999-082907-

hbwhelp@micrel.com or (408) 955-1690

Functional Description

Fail-Safe Input (FSI)

The input includes a special failsafe circuit to sense

the amplitude of the input signal and to latch the

outputs when there is no input signal present, or

when the amplitude of the input signal drops

sufficiently below 100mVPK (200mVPP), typically

30mVPK. Maximum frequency of SY58607U is limited

by the FSI function.

Input Clock Failure Case

If the input clock fails to a floating, static, or extremely

low signal swing, the FSI function will eliminate a

metastable condition and guarantee a stable output.

No ringing and no undetermined state will occur at the

output under these conditions.

Note that the FSI function will not prevent duty cycle

distortion in case of a slowly deteriorating (but still

toggling) input signal. Due to the FSI function, the

propagation delay will depend on rise and fall time of

the input signal and on its amplitude. Refer to “Typical

Characteristics” for detailed information.

Timing Diagrams

Figure 1a. Propagation Delay

Figure 1b. Fail Safe Feature

Micrel, Inc.

SY58607U

Oct. 1, 2013

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Typical Characteristics

VCC = 3.3V, GND = 0V, VIN = 100mV, RL = 50Ω to VCC-2V, TA = 25°C, unless otherwise stated.

Micrel, Inc.

SY58607U

Oct. 1, 2013

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Functional Characteristics

VCC = 3.3V, GND = 0V, VIN = 400mV, Data Pattern: 223-1, RL = 50Ω to VCC-2V, TA = 25°C, unless otherwise stated.

Micrel, Inc.

SY58607U

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Functional Characteristics (continued)

VCC = 3.3V, GND = 0V, VIN = 400mV, RL = 50Ω to VCC-2V, TA = 25°C, unless otherwise stated.

Micrel, Inc.

SY58607U

Oct. 1, 2013

10 M9999-082907-

hbwhelp@micrel.com or (408) 955-1690

Input and Output Stage

Figure 2a. Simplified Differential Input Buffer

Figure 2b. Simplified LVPECL Output Buffer

Single-Ended and Differential Swings

Figure 3a. Single-Ended Voltage Swing

Figure 3b. Differential Voltage Swing

Micrel, Inc.

SY58607U

Oct. 1, 2013

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Input Interface Applications

Figure 4a. CML Interface

(DC-Coupled)

Option: May connect VT to VCC

Figure 4b. CML Interface

(AC-Coupled)

Figure 4c. LVPECL Interface

(DC-Coupled)

Figure 4d. LVPECL Interface

(AC-Coupled)

Figure 4e. LVDS Interface

Micrel, Inc.

SY58607U

Oct. 1, 2013

12 M9999-082907-

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LVPECL Output Termination

LVPECL outputs have very low output impedance

(open emitter), and small signal swing which results in

low EMI. LVECL is ideal for driving 50Ω-and-100Ω-

controlled impedance transmission lines. There are

several techniques in terminating the LVPECL output,

as shown in Figures 5a through 5c.

Figure 5b. Three-Resistor “Y-Termination”

Figure 5a. Parallel Termination-Thevenin Equivalent