1. General description
The TFA9890 is a high efficiency class-D audio amplifier with a sophisticated speaker
boost and protection algorithm. It can deliver 7.2 W peak output power into an 8
speaker at a supply voltage of 3.6 V. The internal boost converter raises the supply
voltage to 9.5 V, providing ample headroom for major improvements in sound quality.
A safe working environment is provided for the speaker under all operating conditions.
The TFA9890 maximizes acoustic output while ensuring diaphragm displa cement and
voice coil temperature do not exceed their rated limits. This function is based on a
speaker box model that opera tes in all loudspeaker environment s (e.g. free air, closed box
or vented box). Furtherm ore, adva nced signa l processing ensures the quality of the audio
signal is never degraded by unwanted clipping or distortion in the amplifier or speaker.
Unlike competing solutions, the adaptive sound maximizer algorithm uses feedback to
accurately calculate both the temperature and the excursion, allowing the TFA9890 to
adapt to changes in the acoustic environment.
Internal intelligent DC-to-DC conversion boosts the supply rail to provide additional
headroom and power output. The supply voltage is only raised when necessary. This
maximizes the output power of the class-D audio amplifier while limiting quiescent power
consumption.
The TFA9890 also incorporates advanced battery protection. By limiting the supply
current when the battery voltage is low, it prevents the audio system from drawing
excessive load currents from the battery, which could cause a system undervoltage. The
advanced processor minimizes the impact of a falling battery voltage on the audio quality
by preventing distortion as the battery discharges.
The device features low RF susceptibility because it has a digital input interface that is
insensitive to clock jitter. The second order closed loop architecture used in a class-D
audio amplifier provides excellent audio performance and high supply voltage ripple
rejection. The audio input interfac e is I2S and the control settings are communicated via
an I2C-bus interface.
The device also provides the speaker with robust protection against ESD damage. In a
typical application, no additional components are needed to withstand a 15 kV discharge
on the speaker.
The TFA9890 is available in a 49-bump WLCSP (Wafer Level Chip-Size Package) with a
400 m pitch.
TFA9890
9.5 V boosted audio system with adaptive sound maximizer
and speaker protection
Rev. 01 — 17 May 2013 Preliminary short data sheet
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Preliminary short data sheet Rev. 01 — 17 May 2013 2 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
2. Features and benefits
Sophisticated speaker-boost and protection algorithm that maximizes speaker
performance while protecting the speaker:
Fully embedded software, no additional license fee or porting required
Total integrated solution that includes DSP, amplifier, DC-to-DC, sensing and more
Adaptive excursion control - guarantees that the speaker membrane excursion never
exceeds its rated limit
Real-time temperature protection - direct measurement ensures that voice coil
temperature never exceeds its rated limit
Environmentally aware - automatically adapts speaker paramete rs to aco us tic an d
thermal changes including compensation for speaker-box leakage
Output power: 3.6 W (RMS) into 8 at 3.6 V supply voltage (THD = 1 %)
Clip avoidance - DSP algorithm prevents clipping even with sagging supply voltage
Bandwidth extension option to increase low frequency response
Compatible with standard Acoustic Echo Cancellers (AECs)
High efficiency and low power dissipation
Wide supply voltage range (fully operational from 3 V to 5.5 V)
Two I2S inputs to support two audio sources
I2C-bus control interface (400 kHz)
Dedicated speech mode with speech activity detector
Speaker current and voltage monitoring (via the I2S-bus) for Acoustic Echo
Cancellation (AEC ) at th e ho st
Fully short-circuit proof across the load and to the supply lines
Sample frequencies from 8 kHz to 48 kHz supported
3 bit clock/word select ratios supported (32x, 48x, 64x)
Option to route I2S input direct to I2S output to allow a second I2S output slave device
to be used in combination with the TFA9890
TDM interface supported (with limited functionality)
Volume control
Low RF susceptibility
Input clock jitter insensitive interface
Thermally protected
15 kV system-level ESD protection without external components
‘Pop noise' free at all mode transitions
3. Applications
Mobile phones
Tablets
Portable Navigation Devices (PND)
Notebooks/Netbooks
MP3 players and portable media players
Small audio systems
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Preliminary short data sheet Rev. 01 — 17 May 2013 3 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
4. Quick reference data
5. Ordering information
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VBAT battery supply voltage on pin VBAT 3-5.5V
VDDD digital supply voltage on pin VDDD 1.65 1.8 1.95 V
IBAT battery supply current on pin VBAT and in DC-to-DC converter coil;
Operating modes with load; DC-to-DC
converter in Adaptive Boost mode (no output
signal, VBAT = 3.6 V, VDDD = 1.8 V)
-4-mA
Power-down mode - 1 - A
IDDD digital supply current on pin VDDD; Operating modes;
SpeakerBoost Protecti on activated -20-mA
on pin VDDD; Operating modes; CoolFlux
DSP bypassed -6-mA
on pin VDDD; Power-down mode;
BCK1= WS1=DATAI1 =BCK2= WS2=
DATAI2 = DATAI3 = 0 V
-10-A
Po(RMS) RMS output power THD+N = 1 %; CLIP = 0
RL=8 ; fs= 48 kHz - 3.6 - W
RL=8 ; fs= 32 kHz - 3.7 - W
Table 2. Ordering information
Type number Package
Name Description Version
TFA9890UK WLCSP49 wafer level chip-size package; 49 bumps TFA9890UK
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Preliminary short data sheet Rev. 01 — 17 May 2013 4 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
6. Block diagram
Fig 1. Block dia gram
I2C
INTERFACE
G1
G3
VDDD
TFA9890
F1
SDA
SCL
ADS1
F2
010aaa816
ADS2
F3
PROTECTION:
OTP
OVP
UVP
OCP
IDP
VBAT
G2
OUTA
OUTB
CLASS-D
AUDIO
AMPLIFIER
C6
A6
WS1
PWM
SPEAKER PROTECTION
ALGORITHM AND
VOLUME CONTOL
(CoolFlux DSP)
DATAI3 B3
A1
A2DATAI1
BCK1 B1
I2S
INPUT
INTERFACE
(x2)
RAM/ROM
MEMORY
DATAO A3
I2S
OUTPUT
INTERFACE
GNDP
B5, B6
TEMP SENSE
VBAT SENSE
VDDP
A7, B7, C7
REGISTERS
A4
INT
E3
TEST2
D3
TEST3
C3
TEST4
ADC
CURRENT-
SENSING
PROCESSOR
current sensing
M
U
X
WS2 D1
C1DATAI2
BCK2 E1
M
U
X
I2SDOC
PLL
ISEL
RST B4
TEST5
C4 D4
TEST6 TEST7
E4
GNDD
A5, B2, C2,
C5, D2, D5,
E2, F4, G4
INB
ADAPTIVE
DC-to-DC
CONVERTER
E7, F7, G7 BST
GNDB
E5, F5, G5
E6, F6, G6
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Preliminary short data sheet Rev. 01 — 17 May 2013 5 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
7. Pinning information
7.1 Pinning
a. Bottom view b. Tr ansparent top view
Fig 2. Bump conf iguration
123
G
F
4
567
C
B
A
010aaa782
bump A1
index area
E
D
A
B
123
bump A1
index area 4567
C
D
E
010aaa783
F
G
Transparent top view
Fig 3. Bump mapping
DATAI1 DATAO INT GNDD
234 5
GNDD RST
GNDD TEST5
GNDD
OUTB
67
GNDP
OUTA
n.c. n.c.
GNDD TEST7 GNDBTEST2 INB
TEST6
WS1
1
A
B
DATAI2C
WS2
D
BCK2E
BCK1
ADS1 INB
GNDD GNDBVDDD
010aaa807
INB
GNDD
SDAF
SCLG
DATAI3 GNDP
GNDD
GNDD
GNDB
TEST4
TEST3
ADS2
VDDP
VDDP
VDDP
VBAT
BST
BST
BST
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Table 3. Pinning
Symbol Pin Type Description
WS1 A1 I digital audio word select input 1
DATAI1 A2 I digital audio data input 1
DATAO A3 O digital audio data output
INT A4 O interrupt output
GNDD A5 P digital ground
OUTB A6 O inverting output
VDDP A7 P power supply voltage
BCK1 B1 I digital audio bit clock input 1
GNDD B2 P digital ground
DATAI3 B3 I digital audio data input 3
RST B4 I reset input
GNDP B5 P power ground
GNDP B6 P power ground
VDDP B7 P power supply voltage
DATAI2 C1 I digital audio data input 2
GNDD C2 P digital ground
TEST4 C3 O test signal input 4; for test purposes only, connect to PCB ground
TEST5 C4 O test signal input 5; for test purposes only, connect to PCB ground
GNDD C5 P digital ground
OUTA C6 O non-inverting output
VDDP C7 P power supply voltage
WS2 D1 I digital audio word select input 2
GNDD D2 P digital ground
TEST3 D3 O test signal input 3; for test purposes only, connect to PCB ground
TEST6 D4 O test signal input 6; for test purposes only, connect to PCB ground
GNDD D5 P digital ground
n.c. D6 - not connected[1]
n.c. D7 - not connected[1]
BCK2 E1 I digital audio bit clock input 2
GNDD E2 P digital ground
TEST2 E3 O test signal input 2; for test purposes only, connect to PCB ground
TEST7 E4 O test signal input 7; for test purposes only, connect to PCB ground
GNDB E5 P boosted ground
INB E6 P DC-to-DC boost converter input
BST E7 O boosted supply voltage output
SDA F1 I/O I2C-bus data input/output
ADS1 F2 I address select input 1
ADS2 F3 I address select input 2
GNDD F4 P digital ground
GNDB F5 P boosted ground
INB F6 P DC-to-DC boost converter input
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
[1] Can be used to simplify routing to OUTA (see Figure 3).
BST F7 O boosted supply voltage output
SCL G1 I I2C-bus clock input
VBAT G2 P battery supply voltage sense input
VDDD G3 P digital supply voltage
GNDD G4 P digital ground
GNDB G5 P boosted ground
INB G6 P DC-to-DC boost converter input
BST G7 O boosted supply voltage output
Table 3. Pinning …continued
Symbol Pin Type Description
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Preliminary short data sheet Rev. 01 — 17 May 2013 8 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
8. Functional description
The TFA9890 is a highly efficient mono Bridge Tied Load (BTL) class-D audio amplifier
with a sophisticated SpeakerBoost protecti on algorithm. Figure 1 is a block diagram of the
TFA9890.
It contains three I2S input interfaces and one I2S output interface. One of I2S inputs
DATAI1 and DATAI2 can be selected as the audio input stream. The third I2S input,
DATAI3, is provided to support stereo applications. A ‘pass-through’ option allows one of
the I2S input interfaces to be conne cted directly to the I2S output. The pass-through option
is provided to allow an I2S output slave device (e.g. a CODEC), connected in parallel with
the TFA9890, to be routed directly to the audio host via the I2S output.
The I2S output signal on DATAO can be configured to transmit the DSP output signal,
amplifier output current information, DATAI3 Left or Right signal information or amplifier
gain information. The gain information can be used to facilitate communication between
two devices in stereo applications.
A SpeakerBoost protection algorithm, running on a CoolFlux Digital Signal Processor
(DSP) core, maximizes the acoustical output of the speaker while limiting membrane
excursion and voice coil temperature to a safe level. The mechanical protection
implemented guara ntee s that sp eaker me mbr ane excur sion n ever exceeds its rated limit,
to an accuracy of 10 %. Thermal protection guarantees that the voice coil temperature
never exceeds its rated limit, to an accuracy of 10 C. Furthermore, advanced signal
processing ensures the audio quality remains acceptable at all times.
The protection algorithm implements an adaptive loudspeaker model that is used to
predict the extent of membrane excursion. The model is continuously updated to ensur e
that the protection scheme remains effective even when speaker parameter values
change or the acou stic enclosure is mo difie d .
Output sound pressure levels are boosted within given mechanical, thermal and quality
limits. An optio nal Bandwidt h extension mode ex tends the low freq uency response up to a
predefined limit before maximizing the output le vel. This mode is suitable for listening to
high quality music in quiet environments.
The frequency response of the TFA9890 can be modified via ten fully programmable
cascaded second-order biquad filters. The first two biquads are pr ocessed with 48-bit
double precision; biquads 3 to 8 are processed with 24-bit single precision.
At low battery voltage levels, the gai n is automatically reduced to limit battery current. The
output volume can be controlled by the SpeakerBoost protection algorithm or by the host
application (external). In the latter case, the boost fe atures of the S peakerBoost protection
algorithm must be disabled to avoid neutralizing external volume control.
The SpeakerBoost protection algorithm output is con verted into two pulse width
modulated (PWM) signals which are then injected into the class-D audio amplifier. The
3-level PWM scheme su pp or ts filterless speaker drive.
An adaptive DC-to-DC converter boosts the battery supply voltage in line with the output
of the SpeakerBoost protection algorithm. It switches to Follower mode (VBST = VBAT; no
boost) when the audio output voltage is lower than the battery voltage.
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Preliminary short data sheet Rev. 01 — 17 May 2013 9 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
9. Internal circuitry
Table 4. Internal circuitry
Pin Symbol Equivalent circuit
C1, C4, D1,
D3, E1, F2,
F3
DATAI2, TEST5, WS2,
TEST3, BCK2, ADS1,
ADS2
A1, A2, A4,
B1, B3, E3,
G1
WS1, DATAI1, INT,
BCK1, DATAI3,
TEST2, SCL,
C3 TEST4
F1 SDA
A3 DATAO
010aaa788
ESD
GNDD (E4)
C1, C4, D1,
D3, E1, F2,
F3
010aaa789
ESD
ESD
V
DDP
(B6)
GNDP (B7)
A1, A2, A4,
B1, B3, E3,
G1
ESD
GNDD (E4)
010aaa790
ESD
ESD
VDDD (E3)
GNDD (E4)
C3
010aaa791
ESD
GNDD (E4)
F1
010aaa792
ESD
GNDP (B7)
GNDD (E4)
V
DDD
(E3)
A3
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
A6, C6 OUTB, OUTA
E6, F6, G6 i.c.
A5, B2, B5,
B6, C2, C5,
D2, D5, E2,
E5, F4, F5,
G4, G5
GNDP, GNDB, GNDD
Table 4. Internal circuitry
Pin Symbol Equivalent circuit
010aaa787
GNDP (B7)
V
DDP
(B6)
A
6, C6
010aaa793
GNDB (D7)
SENSE (E6)
E6, F6, G6
GNDD (A5, B2, C2, D2, D5, E2, F4, G4)
GNDB (E5, F5, G5)GNDP (B5, B6, C5)
010aaa794
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
10. I2C-bus interface and register settings
The TFA9890 supports the 400 kHz I 2C-bus microcontroller inte rface mode stan dard. The
I2C-bus is used to control the TFA9890 and to transmit and receive data. The TFA9890
can only operat e in I 2C slave mode, as a slave receiver or as a slave transmitter.
10.1 TFA9890 addressing
The TFA9890 is accessed via an 8-bit code (see Table 5). Bits 1 to 7 contain the device
address. Bit 0 (R/W) indicates whether a read (1) or a write (0) operation has been
requested. Four separate addresses are supported for stereo applications. Address
selection is via pins ADS1 and ADS2. The levels on pins ADS1 and ADS2 determine the
values of bits 1 and 2, respectively, of the device address, as detailed in Table 5. The
generic address is independent of pins ADS1 and ADS2.
Table 5. Address selection via pins ADS1 and ADS2
ADS2 pin
voltage (V) ADS1 pin
voltage (V) Address Function
0 0 01101000 for write mode
01101001 for read mode
0V
DDD 01101010 for write mode
01101011 for read mode
VDDD 0 01101100 fo r write mode
01101101 for read mode
VDDD VDDD 01101110 for write mode
01101111 for read mode
don’t care don’t care 00011100 (generic address) for write mode
don’t care don’t care 00011101 (generic address) for read mode
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
11. Limiting values
12. Thermal characteristics
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VBAT battery supply vo ltage on pin VBAT 0.3 +5.5 V
VBST voltage on pin BST 0.3 +12 V
VDDP power supply voltage on pin VDDP 0.3 +12 V
VDDD digital supply voltage on pin VDDD 0.3 +1.95 V
Tjjunction temperature - +150 C
Tstg storage temperature 55 +150 C
Tamb ambient temperature 40 +85 C
VESD electrostatic discharge voltage according to Human Body Model (HBM) 2+2 kV
according to Charge Device Model (C DM) 500 +500 V
Table 7. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-a) thermal resistance from junction to ambient in free air; natural convection -
4-layer application boa rd 40 K/W
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Preliminary short data sheet Rev. 01 — 17 May 2013 13 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13. Characteristics
13.1 DC Characteristics
Table 8. DC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VBAT battery supply voltage on pin VBAT 3-5.5V
IBAT battery supply current on pin VBAT and in DC-to-DC converter
coil; Operating mode s with load;
DC-to-DC converter in Adaptive Boost
mode (no output signal, VBAT =3.6 V,
VDDD = 1.8 V)
-4- mA
Power-down mode - 1 5 A
VDDP power supply voltage on pin VDDP 3-9.5V
VDDD digital supply voltage on pin VDDD 1.65 1.8 1.95 V
IDDD digital supply current on pin VDDD; Operating modes;
SpeakerBoost Protecti on activated -20- mA
on pin VDDD; Operating modes;
CoolFlux DSP bypassed -6- mA
on pin VDDD; Power-down mode ;
BCK1 = WS1 = DATAI1 = BCK2 =
WS2 = DATAI2 = DATAI3 = 0 V
-10- A
Pins BCK1, WS1, DATA1, BCK2, WS2, DATAI2, DATAI3, ADS1, ADS2, SCL, SDA
VIH HIGH-level input voltage 0.7VDDD -3.6 V
VIL LOW-level input voltage - - 0.3VDDD V
Cin input capacitance [2] --3pF
ILI input leakage current 1.8 V on input pin - - 0.1 A
Pins DATAO, INT, push-pull output stages
VOH HIGH-level output voltage IOH =4 mA - - V
DDD
0.4 V
VOL LOW-level output voltage IOL =4 mA - - 400 mV
Pins SDA, open drain outputs, external 10 k resistor to VDDD
VOH HIGH-level output voltage IOH =4 mA - - V
DDD
0.4 V
VOL LOW-level output voltage IOL =4 mA - - 400 mV
Pins OUTA, OUTB
RDSon drain-source on-state
resistance VDDP = 5.3 V - 200 - m
Protection
Tact(th_prot) thermal protection activation
temperature 130 - 150 C
Vovp(VBAT) overvoltage protection voltage
on pin VBAT 5.5 - 6.0 V
Vuvp(VBAT) undervoltage protection
voltage on pin VBAT 2.3 - 2.5 V
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Preliminary short data sheet Rev. 01 — 17 May 2013 14 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
[1] LBST = boost converter inductance; RL= load resistance; LL= load inductance (speaker).
[2] This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
IO(ocp) overcurrent protection output
current 2-- A
DC-to-DC converter
VBST voltage on pin BST DCVO = 111; Boost mode 9.4 9.5 9.6 V
Table 8. DC characteristics …continued
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13.2 AC characteristics
Table 9. AC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Amplifier output power
Po(RMS) RMS output power THD+N = 1 %; CLIP = 0
RL=8 ; fs= 48 kHz - 3.6 - W
RL=8 ; fs= 32 kHz - 3.7 - W
THD+N = 10 %; CLIP = 0
RL=8 ; fs= 48 kHz - 4.5 - W
RL=8 ; fs= 32 kHz - 4.6 - W
Amplifier output; pin s OUTA and OUTB
VO(offset)output offset volt age absolute value - - 3 mV
Amplifier performance
po output power efficiency Po(RMS) = 2.5 W; including DC-to-DC
converter; 100 Hz audio signal [2] -72-%
THD+N total harmonic distortion-plus-noise Po(RMS) = 100 mW; RL =8 ; LL=44H[1] -0.030.1%
Vn(o) output noise voltage A-weighted; DATAI1 = DATAI2 = 0 V
CoolFlux DSP bypassed - 50 - V
CoolFlux DSP enabled [2] -66-V
S/N signal-to-noise ratio VO = 4.5 V (peak); A-weighted
CoolFlux DSP bypassed - 100 - dB
CoolFlux DSP enabled [2] -97-dB
PSRR power supply rejection ratio Vripple = 200 mV (RMS); fripple =217 Hz - 75 - dB
fsw switching frequency directly coupled to the I2S input
frequency 256 - 384 kHz
Amplifier powe r-up , pow er-d ow n an d propagation delay s
td(on) turn-on delay time PLL locked on BCK (IPLL = 0)
fs = 8 kHz to 48 kHz - - 2 ms
PLL locked on WS (IPL L = 1)
fs = 8 kHz - - 27 ms
fs =48 kHz - - 6 ms
td(off) turn-off delay time - - 10 s
td(mute_off) mute off delay time - 1 - ms
td(soft_mute) soft mute delay time - 1 - ms
tPD propagation delay CoolFlux bypassed
fs = 8 kHz - - 3.2 ms
fs = 48 kHz - - 600 s
SpeakerBoost protection mode,
tLookAhead =2 ms
fs = 8 kHz - - 14 ms
fs =48 kHz - - 4 ms
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Preliminary short data sheet Rev. 01 — 17 May 2013 16 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
[1] LBST = boost converter inductor; RL= load resistance; LL= load inductance (speaker).
[2] This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
Current-sensing performance
S/N signal-to-noise ratio IO= 1.2 A (peak); A-weighted - 75 - dB
Isense(acc) sense current accuracy IO= 0.5 A (peak) 3- +3%
B bandwidth [2] -8-kHz
LLload inductance 20 - - H
Table 9. AC characteristics
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13.3 I2S timing characteristics
[1] LBST = boost converter inductance; RL = load resistance; LL = load inductance.
[2] The I2S bit clock input (BCK) is used as a clock input for the DSP, as well as for the amplifier and the DC-to-DC converter . Note that both
the BCK and WS signals must be present for the clock to operate correctly.
[3] This parameter is not tested during production; the value is guaranteed by design and checked during product validation.
Table 10. I2S bus interface characteristics; see Figure 4
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
fssampling frequency on pin WS [2] 8 - 48 kHz
fclk clock frequency on pin BCK [2] 32fs-64f
sHz
tsu set-up time WS edge to BCK HIGH [3] 10 - - ns
DATA edge to BCK HIGH 10 - - ns
thhold time BCK HIGH to WS edge [3] 10 - - ns
BCK HIGH to DATA edge 10 - - ns
Fig 4. I2S timing
BCK
WS
DATA
thtsu
010aaa750
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
13.4 I2C timing characteristics
[1] LBST = boost converter inductance; RL = load resistance; LL = load inductance.
[2] Cb is the total capacitance of one bus line in pF. The maximum capacitive load for each bus line is 400 pF.
[3] After this period, the first clock pulse is generated.
[4] To be suppressed by the input filter.
Table 11. I2C-bus interface characteristics; see Figure 5
All parameters are guaranteed for VBAT = 3.6 V; VDDD = 1.8 V; V DDP =V
BST = 9.5 V, adaptive boost mode; LBST =1
H[1];
RL= 8
[1]; LL = 40
H[1]; fi= 1 kHz; fs = 48 kHz; Tamb = 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
fSCL SCL clock frequency - - 400 kHz
tLOW LOW period of the SCL clock 1.3 - - s
tHIGH HIGH period of the SCL clock 0.6 - - s
trrise time SDA and SCL signals [2] 20 + 0.1 Cb-- ns
tffall time SDA and SCL signals [2] 20 + 0.1 Cb-- ns
tHD;STA hold time (repeated) START
condition [3] 0.6 - - s
tSU;STA set-up time for a repeated START
condition 0.6 - - s
tSU;STO set-up time for STOP condition 0.6 - - s
tBUF bus free time between a STOP and
START condition 1.3 - - s
tSU;DAT data set-up time 100 - - ns
tHD;DAT data hold time 0 - - s
tSP pulse width of spikes that must be
suppressed by the input filter [4] 0 - 50 ns
Cbcapacitive load for each bus line - - 400 pF
Fig 5. I2C timing
tBUF tLOW trtf
tHD;STA tSU;STA
tHD;DAT tHIGH tSU;DAT
tHD;STA
tSU;STO
tSP
P S Sr P
SDA
SCL
010aaa225
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9.5 V boosted audio system with adaptive sound maximizer and
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14. Application information
14.1 Application diagrams
Fig 6. Typical mono application (simplified)
TFA9890
010aaa817
BASEBAND
PROCESSOR
OUTA
OUTB
A6
C6
speaker
GNDD
TEST2
TEST3
ADS2
GNDB
F3
GNDP
ADS1
F2
B5
B6
E5
F5
G5
TEST4
E3
A5
B2
C2
C5
D2
D5
E2
F4
G4 C3D3
G3
VDDD
1.8 V
CVDDD
E7, F7, G7
E6, F6, G6 INB
I2C
SDA F1
SCL G1
DATAI3 B3
BCK2 E1
DATAI2 C1
WS2 D1
BCK1
DATAO
B1
A3
DATAI1 A2
I2S
WS1 A1
RST B4
INT A4
TEST7
TEST6
TEST5
C4
E4
D4
n.c.
D6
n.c.
D7
A7
B7
C7
VDDP
CVDDP
20 μF
G2
VBAT
CVBAT
100 nF100 nF
BST
battery
CBST
10 μF
LBST 1 μH
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9.5 V boosted audio system with adaptive sound maximizer and
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Fig 7. Typical stereo application (simp lified)
TFA9890 OUTA
OUTB
A6
C6
speaker
GNDD
TEST2
TEST3
ADS2
GNDB
F3
GNDP
ADS1
F2
B5
B6
E5
F5
G5
TEST4
E3
A5
B2
C2
C5
D2
D5
E2
F4
G4 C3D3
SDA F1
SCL G1
DATAI3
B3
E1
C1
D1
BCK1
DATAO
B1
A3
DATAI1 A2
BASEBAND
PROCESSOR
I2C
I2SWS1 A1
RST B4
INT A4
TEST7
TEST6
TEST5
C4
E4
D4
n.c.
D6
n.c.
D7
TFA9890
010aaa818
OUTA
OUTB
A6
C6
speaker
GNDD
TEST2
TEST3
ADS2
GNDB
F3
GNDP
F2
B5
B6
E5
F5
G5
TEST4
E3
A5
B2
C2
C5
D2
D5
E2
F4
G4 C3D3
SDA F1
SCL G1
B3
E1
C1
D1
BCK1
DATAO
B1
A3
DATAI1 A2
WS1 A1
RST B4
INT A4
TEST7
TEST6
TEST5
C4
E4
D4
n.c.
D6
n.c.
D7
BCK2
DATAI2
WS2
DATAI3
BCK2
DATAI2
WS2
ADS1
1.8 V
BST
G3
VDDD
1.8 V
E7, F7, G7
E6, F6, G6 INB
A7
B7
C7
VDDP
CVDDP
20 μF
G2
VBAT
CVBAT
100 nF
CVDDD
100 nF
battery
CBST
10 μF
LBST 1 μH
BST
G3
VDDD
1.8 V
E7, F7, G7
E6, F6, G6 INB
A7
B7
C7
VDDP
CVDDP
20 μF
G2
VBAT
CVBAT
100 nF
CVDDD
100 nF
battery
CBST
10 μF
LBST 1 μH
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Fig 8. Typical mono application with two audio sources and a second I 2S slave device
TFA9890 OUTA
OUTB
A6
C6
speaker
GNDD
TEST2
TEST3
ADS2
GNDB
F3
GNDP
ADS1
F2
B5
B6
E5
F5
G5
TEST4
E3
A5
B2
C2
C5
D2
D5
E2
F4
G4 C3D3
SDA F1
SCL G1
B3
E1
C1
D1
B1
A3
A2
A1
RST B4
INT A4
TEST7
TEST6
TEST5
C4
E4
D4
n.c.
D6
n.c.
D7
DATAI3
DATAI2
WS2
BCK2
DATAI1
DATAO
WS1
BCK1
010aaa819
data output
word select 1
data input 1
SECOND I2S SLAVE
DEVICE (CODEC)
word select 2
data input 2
bit clock 2
I2C
data o/p
word sel.
AUDIO
SOURCE 1
(I2S master)
I2S
bit clk.
data i/p
data o/p
word sel.
AUDIO
SOURCE 2
(I2S master)
I2S
bit clk.
data i/p
BST
G3
V
DDD
1.8 V
C
VDDD
E7, F7, G7
E6, F6, G6 INB
A7
B7
C7
V
DDP
C
VDDP
20 μF
G2
V
BAT
C
VBAT
100 nF100 nF
battery
C
BST
10 μF
L
BST 1 μH
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
14.2 Curves measured in reference design (demonstration board)
All measurements were taken with VBAT = 3.6 V; VDDD = 1.8 V; VDDP = VBST = 5.3 V;
LBST =1H; RL = 4 ; LL = 20 H; fi= 1 kHz; fs = 48 kHz; Tamb = 25 C; CoolFlux DSP bypassed;
default settings, unless otherwise specified.
RL=8, VBAT =3.6 V
(1) fi = 6 kHz.
(2) fi = 1 kHz.
(3) fi = 100 Hz.
RL=8, VBAT = 3.6 V
(1) Po = 100 mW
(2) Po = 500 mW
Fig 9. THD plus noise as a function of output power Fig 10. THD plus noise as a function of frequency
010aaa825
10
-3
10
-2
10
-1
110
10
-2
10
-1
1
10
10
2
P
o
(W)
THD+NTHD+NTHD+N
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
010aaa826
10 10
2
10
3
10
4
10
5
10
-2
10
-1
1
f
i
(Hz)
THD+NTHD+NTHD+N
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
a. fast ramp-up b. immediate ramp-up
Fig 11. DC-to-DC converter ramp-up behavior
010aaa831
-0.01 -0.004 0.002 0.008 0.014 0.02
-8 -0.2
-4 0.64
0 1.48
4 2.32
8 3.16
12 4
t (s)
VBSTBST
VBST
(V)(V)(V)
IBATBAT
IBAT
(A)(A)(A)
VBSTBST
VBST
IBATBAT
IBAT
010aaa830
-0.01 -0.004 0.002 0.008 0.014 0.02
-8 -0.5
-4 0.4
0 1.3
4 2.2
8 3.1
12 4
t (s)
V
BST
BST
VBST
(V)
(V)
(V)
I
BAT
BAT
IBAT
(V)
(V)
(V)
V
BST
BST
VBST
I
BAT
BAT
IBAT
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
RL=8, VBAT = 3.6 V, Po= 500 mW RL=8, fi= 1 kHz
(1) THD+N = 10 %, no boost (Follower mode)
(2) THD+N = 1 %, no boost (Follower mode)
(3) THD+N = 10 %, boost on
(4) THD+N = 1 %, boost on
Fig 12. Normalized gain as a function of frequency Fig 13. Output power as a function of battery supply
voltage
010aaa827
10 102103104105
-1.4
-0.7
0
0.7
1.4
fi (Hz)
G
G
(dB)
(dB)
(dB)
010aaa828
2 2.8 3.6 4.4 5.2 6
0
1.4
2.8
4.2
5.6
7
VBAT (V)
Po
Po
(W)
(W)
(W)
(4)
(4)
(4)
(3)
(3)
(3)
(1)
(1)
(1)
(2)
(2)
(2)
RL=8, VBAT = 3.6 V, Vripple = 200 V(RMS) on VBAT
Fig 14. PSRR as a function of ripple frequency
010aaa832
10 102103104105
-110
-90
-70
-50
-30
-10
fripple (Hz)
PSRRPSRRPSRR
(dB)(dB)(dB)
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
15. Package outline
Fig 15. Package outline TF A9890 (WLCSP49)
ZOFVSBWIDBSR
!" !##
!#
!$&
!#&
!#"
!#'
*!'
*!*;
*!*'
*!
#!<;
#!<'
#!' #!' !$=
>?@J
$#
!*&
!*"
!*'
Q
!*=
!#;=
!#'=
!*#=
!#<=
!#"=
Z$
!;#=
!"<=
!""=
Z$
!*=
!#;=
!#'=
Z# Z#
!#
[
!'
$#
!'
\
Q$
Q$
Z$
]
#
Z#
Z$
]
[
$
Q^_
_\
^
`
j
;"='*#$
Z#
^
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$*q*q;
$*q=q$;
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:/&63ZDIHUOHYHOFKLSVL]HSDFNDJH
EXPSV[PP
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
16. Soldering of WLCSP packages
16.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
16.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
16.3 Reflow soldering
Key characteristics in reflow soldering are:
•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to
higher minimum peak temperatures (see Figure 16) than a PbSn process, thus
reducing the process window
•Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
•Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enoug h for the solder to make reliable solder joint s (a solder paste
characterist ic) while be ing low enou g h th at th e packages an d/ or boa rd s ar e no t
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 12.
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 16.
Ta ble 12. Lead-free process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
For further information on temperature profiles, refer to application note AN10365
“Surface mount reflow soldering description”.
16.3.1 Stand off
The stand off between the substrate and the chip is determined by:
•The amount of printed solder on the substrate
•The size of the solder land on the substrate
•The bump height on the chip
The higher the stand off, the better the stresses are released due to TEC (Thermal
Expansion Coefficient) differences between substrate and chip.
16.3.2 Quality of solder joint
A flip-chip joint is considered to be a good joint when the entire solder land has been
wetted by the solder from the bump. The surface of the joint should be smooth and the
shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps
after reflow can occur during the reflow process in bumps with high ratio of bump diameter
to bump height, i.e. low bumps with large diameter. No failures have been found to be
related to these voids. Solder joint inspection after reflow can be done with X-ray to
monitor defects such as bridging, open circuits and voids.
16.3.3 Rework
In general, rework is not recommended. By rework we mean the process of removing the
chip from the substrate and replacing it with a new chip. If a chip is remo ved from the
substrate, most solder balls of the chip will be damaged. In that case it is recommended
not to re-use the chip again.
MSL: Moisture Sensitivity Level
Fig 16. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Device removal can be done when the substrate is heated until it is certain that all solde r
joints are molten. The chip can then be carefully removed from the substrate without
damaging the tracks and solder lands on the substrate. Removing the device must be
done using plastic tweezers, because metal tweezers can damage the silicon. The
surface of the substrate should be carefully cleaned and all solder and flux residues
and/or underfill removed. When a new chip is placed on the substrate, use the flux
process instead of solder on th e solder land s. Ap ply flu x on th e bu mps at the chip side as
well as on the solder pads on the substrate. Place and align the new chip while viewing
with a microscope. To reflow the solder, use the solder profile shown in application note
AN10365 “Surface mount reflow soldering description”.
16.3.4 Cleaning
Cleaning can be done after reflow soldering.
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
17. Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TFA9890_SDS v.1 20130517 Preliminary data sheet - -
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NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
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18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full dat a sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict wit h the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ ag gregate and cumulative l iability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the applica tion or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development .
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
TFA9890_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Preliminary short data sheet Rev. 01 — 17 May 2013 30 of 31
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lif ied nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and st andards, customer
(a) shall use the product without NXP Semicond uctors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting f rom customer design an d
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specificat ions.
18.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors TFA9890
9.5 V boosted audio system with adaptive sound maximizer and
speaker protection
© NXP B.V. 2013. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 May 2013
Document identifier: TFA9 89 0_ SDS
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 3
5 Ordering information. . . . . . . . . . . . . . . . . . . . . 3
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Functional description . . . . . . . . . . . . . . . . . . . 8
9 Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . . 9
10 I2C-bus interface and register settings . . . . . 11
10.1 TFA9890 addressing . . . . . . . . . . . . . . . . . . . 11
11 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12
12 Thermal characteristics . . . . . . . . . . . . . . . . . 12
13 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 13
13.1 DC Characteristics . . . . . . . . . . . . . . . . . . . . . 13
13.2 AC characteristics. . . . . . . . . . . . . . . . . . . . . . 15
13.3 I2S timing characteristics . . . . . . . . . . . . . . . . 17
13.4 I2C timing characteristics . . . . . . . . . . . . . . . . 18
14 Application information. . . . . . . . . . . . . . . . . . 19
14.1 Application diagrams . . . . . . . . . . . . . . . . . . . 19
14.2 Curves measured in reference design
(demonstration board) . . . . . . . . . . . . . . . . . . 22
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24
16 Solde ring of WLCSP packages. . . . . . . . . . . . 25
16.1 Introduction to soldering WLCSP packages. . 25
16.2 Board mounting . . . . . . . . . . . . . . . . . . . . . . . 25
16.3 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 25
16.3.1 Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
16.3.2 Quality of solder joint . . . . . . . . . . . . . . . . . . . 26
16.3.3 Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
16.3.4 Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 28
18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 29
18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 29
18.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
18.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
18.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
19 Contact information. . . . . . . . . . . . . . . . . . . . . 30
20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
