BLA0912-250,112 - NXP SEMICONDUCTORS

1. Product profile

1.1 General description

Silicon N-channel enhancement mode LDMOS transistor encapsulated in a 2-lead

SOT502A flange packag e with a ceramic cap. The common source is connected to the

mounting flange.

1.2 Features and benefits

High power gain

Easy power control

Excellent ruggedness

Source on mounting base eliminates DC isolators, reducing common mode

inductance.

1.3 Applications

Avionics transmitter applications in the 960 MHz to 1215 MHz frequency range such

as Mode-S, TCAS and JTIDS, DME or TACAN.

BLA0912-250

Avionics LDMOS transistor

Rev. 3 — 26 November 2010 Product data sheet

Table 1. Test information

Typical RF performance measured in common source class-AB test circuit at PL= 250 W and 960 MHz to 1215 MHz

frequency band. Th = 25

C; Zth(j-h) = 0.15 K/W; unless otherwise specified.

Mode of operation f tpδVDS PLGpΔGpηDPdroop(pulse) trtfZth(j-h) ϕins(rel)

(MHz) (μs) % (V) (W) (dB) (dB) (%) (dB) (ns) (ns) (K/W) (deg)

all modes 960 to 1215 100 10 36 250 13.5 0.8 50 0.1 25 6 0.18 ±5

TCAS 1030 to 1090 32 0.1 36 250 14.0 0.8 50 0 25 6 0.07 ±5

Mode-S 1030 to 1090 128 2 36 250 13.5 0.8 50 0.1 25 6 0.15 ±5

1030 to 1090 340 1 36 250 13.5 0.8 50 0.2 25 6 0.20 ±5

JTIDS 960 to 1215 3300 22 36 200 13.0 1.2 45 0.2 25 6 0.45 ±5

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken

during transport and handling.

Product data sheet Rev. 3 — 26 November 2010 2 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

2. Pinning information

[1] Connected to flange.

3. Ordering information

4. Limiting values

5. Thermal characteristics

[1] Thermal resistance is determined under RF operating conditions; tp = 100 μs, δ = 10 %.

Table 2. Pinning

Pin Description Simplified outline Graphic symbol

1drain

2gate

3source [1] 3

sym03

Table 3. Ordering information

Type number Package

Name Description Version

BLA0912-250 - flanged LDMOST ceramic package;

2 mounting holes; 2 leads SOT502A

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-sourc e vol tage - 75 V

VGS gate-source voltage - ±22 V

Ptot total power dissipation Th≤25 °C; tp=50μs; δ=2% - 700 W

Tstg storage temperature −65 +150 °C

Tjjunction temperature - 200 °C

Table 5. Thermal characteris tics

Symbol Parameter Conditions Typ Unit

Zth(j-h) transient thermal impedance from junction to

heatsink Th = 25 °C[1] 0.18 K/W

Product data sheet Rev. 3 — 26 November 2010 3 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

6. Characteristics

6.1 Ruggedness in class-AB operation

The BLA0912-250 is capable of withstanding a load mismatch corresponding to

VSWR = 5 : 1 through all phases under the following conditions: VDS =36V;

f = 960 MHz to 1215 MHz at rated load power.

Table 6. DC characteristics

Tj = 25

C; per section unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

V(BR)DSS drain-source breakdown voltage VGS =0V; I

D=3mA 75 - - V

VGS(th) gate-source threshold voltage VDS = 10 V; ID=300mA 4 - 5 V

IDSS drain leakage current VGS =0V; V

DS =36V--1μA

IDSX drain cut-off current VGS =V

GSth +9 V;

VDS =10V 45 - - A

IGSS gate leakage current VGS =20V; V

DS =0V--1μA

gfs forward transconductance VDS =10V; I

D=10A - 9 - S

RDS(on) drain-source on-state resistance VGS =9V; I

D=10A - 60 - mΩ

Table 7. RF characteristics

RF performance in common source class-AB circuit; Th = 25

C; Zth = 0.15 K/W; unless ot he rw i s e

specified.

Symbol Parameter Conditions Min Typ Max Unit

VDS drain-source volt age - - 36 V

f frequency 960 - 1215 MHz

PLoutput po w er tp=100μs; δ= 10 % 250 - W

Gppower gain PL= 250 W 12 13 dB

ηDdrain efficiency tp=100μs; δ= 10 % 40 50 %

Zth(j-h) transient thermal impedance

from junction to heatsink tp=100μs; δ=10%--0.2K/W

Thheatsink temperature −55 - +70 °C

Pdroop(pulse) pulse droop power tp=100μs; δ=10% - 0.1 0.5 dB

αresp(sp) spurious response VSWRload =2:1 - - −60 dBc

trrise time - 25 50 ns

tffall time - 6 25 ns

Product data sheet Rev. 3 — 26 November 2010 4 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

7. Application information

7.1 Impedance information

7.2 Application circuit

Table 8. Typical impedance

Typical values per section unless otherwise specified.

f ZSZL

MHz Ω Ω

960 0.89 −j1.70 1.53 −j1.13

1030 1.37 −j1.23 1.47 −j0.99

1090 2.09 −j1.27 1.38 −j0.85

1140 2.40 −j1.97 1.30 −j0.71

1215 1.51 −j2.61 1.17 −j0.47

Fig 1. Definition of transistor impedance

001aaf05

drain

gate

See Table 9 for details of striplines.

Fig 2. Layout of class-AB application circuit

001aab08

C4C3C2

L5 L6L4C1 L3

L1 L8L7

Product data sheet Rev. 3 — 26 November 2010 5 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

Table 9. Layout details

See Figure 2.

Striplines are on a Rodgers Duroid 6010 Printed-Circuit Board (PCB);

r = 10.2 F/m;

thickness = 0.64 mm

Component Description Dimensions

Input circuit

L1 stripline 5 mm × 0.8 mm

C1 stripline 1.2 mm × 3.5 mm

L2 stripline capacitor pad: 1 mm × 1 mm (1×)

curve: width 0.8 mm; angle 90°; radius 0.8 mm (10×)

vertical: 3.9 mm × 0.8 mm (2×)

vertical: 9.4 mm × 0.8 mm (3×)

horizontal: 0.5 mm × 0.8 mm (4×)

L3 stripline 3 mm × 2 mm

C2 stripline 4 mm × 6.5 mm

L4 stripline 5 mm × 1 mm

C3 stripline 8.8 mm × 30 mm + 0.2 mm × 13 mm

Output circuit

C4 stripline 0.2 mm × 13 mm + 19 mm × 17.1 mm

L5 stripline 2.5 mm × 2.3 mm

L6 stripline 4 mm × 1 mm

C5 stripline 3 mm × 6.6 mm

L7 stripline curve: width 0.8 mm; angle 90°; radius 0.8 mm (6×)

vertical: 2.2 mm × 0.8 mm (2×)

vertical: 6 mm × 0.8 mm (1×)

horizontal: 1 mm × 0.8 mm (2×)

L8 stripline 2.5 mm × 0.8 mm

1/4 λ line stripline curve: width 1 mm; angle 90°; radius 0.8 mm

vertical: 5 mm × 1 mm

horizontal: 19 mm × 1 mm

Product data sheet Rev. 3 — 26 November 2010 6 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

[1] American Technical Ceramics type 100B or capacitor of same quality.

[2] American Technical Ceramics type 100A or capacitor of same quality.

Dimensions in mm.

See Table 10 for list of components.

Fig 3. Component layout for class-AB application circuit

Table 10. List of components

See Figure 3.

Component Description Value Remarks

C1, C3, C9 multilayer ceramic chip capacitor 1 nF [1]

C2, C6, C10 multilayer ceramic chip capacitor 22 pF [2]

C4 tantalum SMD capacitor 47 μF; 20 V KEMET: T491D476M020AS

C5 multilayer ceramic chip capacitor 56 pF [2]

C7 multilayer ceramic chip capacitor 47 pF [2]

C8 tantalum SMD capacitor 22 μF; 63 V

R1 SMD resistor 51 Ω0805

R2 resistor 49.9 Ω

001aab08

C1 C2

C6 C7

C4 C5

C8 C10C9

40 40

Product data sheet Rev. 3 — 26 November 2010 7 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

8. Test information

8.1 RF performance

Typical RF performance measured in common source class-AB test circuit at PL= 250 W

and 960 MHz to 1215 MHz frequency band. Th = 25 °C; Zth(j-h) = 0.15 K/W; unless

otherwise specified.

Th = 25 °C; VDS = 36 V; IDq = 150 mA; class-AB;

tp= 100 μs; δ=10%. Th=25°C; VDS =36V; I

Dq = 150 mA; class-AB;

tp= 100 μs; δ=10%.

(1) f = 960 MHz

(2) f = 1030 MHz

(3) f = 1090 MHz

(4) f = 1140 MHz

(5) f = 1215 MHz

Fig 4. Power gain and drain efficiency as function of

frequency; typical values Fig 5. Power gain as a function of load power;

typical values

001aab078

f (MHz)

940 124011401040990 11901090

(dB)

ηD

(%)

ηD

001aab079

PL(W)

0 300200100

(dB)

(1) (4) (3)

(2)

(5)

Product data sheet Rev. 3 — 26 November 2010 8 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

Th=25°C; VDS =36V; I

Dq = 150 mA; class-AB;

tp= 100 μs; δ=10%.

(1) f = 960 MHz

(2) f = 1030 MHz

(3) f = 1090 MHz

(4) f = 1140 MHz

(5) f = 1215 MHz

Th=25°C; VDS =36V; I

Dq = 150 mA; class-AB;

tp= 100 μs; δ=10%.

(1) f = 960 MHz

(2) f = 1030 MHz

(3) f = 1090 MHz

(4) f = 1140 MHz

(5) f = 1215 MHz

Fig 6. Load power as a function of input power;

typical valu e s Fig 7. Efficiency as a function of load power;

typical values

Pi (W)

0 6 10 142161248

001aab080

100

200

300

(W)

(5)

(2)

(1)

(3)

(4)

150

250

001aab081

PL (W)

0 30020010050 150 250

ηD

(%)

(5)

(1)

(3)

(2) (4)

Product data sheet Rev. 3 — 26 November 2010 9 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

9. Package outline

Fig 8. Package outline SOT502A

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT502A 99-12-28

03-01-10

0 5 10 mm

scale

Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502

M M

UNIT A

12.83

12.57

0.15

0.08

20.02

19.61

9.53

9.25

19.94

18.92

9.91

9.65

4.72

3.43

cU2

0.25 0.5127.94

1.14

0.89

34.16

33.91

5.33

4.32

3.38

3.12

1.70

1.45

9.50

9.30

inches 0.505

0.495

0.006

0.003

0.788

0.772

19.96

19.66

0.786

0.774

0.375

0.364

0.785

0.745

0.390

0.380

0.186

0.135 0.01 0.021.100

0.045

0.035

1.345

1.335

0.210

0.170

0.133

0.123

0.067

0.057

0.374

0.366

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

w1AB

M M M

Product data sheet Rev. 3 — 26 November 2010 10 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

10. Abbreviations

11. Revision history

Table 11. Abbreviations

Acronym Description

DC Direct Current

DME Distance Measuring Equipment

JTIDS Joint Tactical Information Distribution System

LDMOS Laterally Diffused Metal-Oxide Semiconductor

LDMOST Laterally Diffused Metal-Oxide Semiconductor T ransistor

Mode-S Mode Select

RF Radio Frequency

SMD Surface Mounted Device

TACAN TACtical Air Navigation

TCAS Traffic Collision Avoidance System

VSWR Voltage Standing-Wave Ratio

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BLA0912-250 v.3 20101126 Product data sheet - BLA0912-250_2

Modifications: •The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Table 10 on page 6: The remark of component C8 has been removed.

•Table 10 on page 6: The value of component C8 has been specified in more detail.

BLA0912-250_2 20040722 Product data sheet - BLA0912-250_N_1

BLA0912-250_N_1 20031024 Preliminary data sheet - 9397 750 12224

Product data sheet Rev. 3 — 26 November 2010 11 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full informatio n see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

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data sheet shall define the specification of the product as agreed between

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Applications — Applications that are described herein for any of these

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representation or warranty that such applications will be suitable for the

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Customers are responsible for the design and ope ration of their applications

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accepts no liability for any assistance with applications or customer product

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NXP Semiconductors does not accept any liabili ty related to any default,

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Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by cust omer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

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products are sold subject to the general terms and conditions of commercial

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product develop ment.

Preliminary [short] dat a sheet Qualification This document contains dat a from the preliminary specification.

Product [short] data sheet Production This document contains the product specificatio n.

Product data sheet Rev. 3 — 26 November 2010 12 of 13

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for aut omo tive use. It i s neither qua lif ied nor test ed

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

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In the event that customer uses the product for design-in and use in

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liability, damages or failed product claims result ing from customer design an d

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standard warranty and NXP Semiconductors’ product specif ications.

12.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors BLA0912-250

Avionics LDMOS transistor

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 26 November 2010

Document identifier: BLA0912-250

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.1 Ruggedness in class-AB operation . . . . . . . . . 3

7 Application information. . . . . . . . . . . . . . . . . . . 4

7.1 Impedance information. . . . . . . . . . . . . . . . . . . 4

7.2 Application circuit . . . . . . . . . . . . . . . . . . . . . . . 4

8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 7

8.1 RF performance . . . . . . . . . . . . . . . . . . . . . . . . 7

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

13 Contact information. . . . . . . . . . . . . . . . . . . . . 12

14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13