TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA
LOW-DROPOUT LINEAR REGULATORS
(3,00 mm x 3,00 mm)
Actual Size
(3,00 mm x 3,00 mm)
Actual Size
1
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FEATURES
DControlled Baseline
– One Assembly/Test Site, One Fabrication
Site
DEnhanced Diminishing Manufacturing
Sources (DMS) Support
DEnhanced Product-Change Notification
DQualification Pedigree†
D200-mA Low-Dropout Regulator With EN
DAvailable in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V,
3.3-V, 4.75-V, and Adjustable
DHigh PSRR (70 dB at 10 kHz)
DUltralow Noise (32 µV)
DFast Start-Up Time (50 µs)
DStable With a 2.2-µF Ceramic Capacitor
DExcellent Load/Line Transient
DVery Low Dropout Voltage
(112 mV at Full Load, TPS79330)
D5-Pin SOT23 (DBV) Package
†Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over specified temperature
range. This includes, but is not limited to, Highly Accelerated Stress
Test (HAST) or biased 85/85, temperature cycle, autoclave or
unbiased HAST, electromigration, bond intermetallic life, and mold
compound life. Such qualification testing should not be viewed as
justifying use of this component beyond specified performance and
environmental limits.
APPLICATIONS
DVCOs
DRF
DBluetooth, Wireless LAN
DESCRIPTION
The TPS793xx family of low-dropout (LDO) low-power
linear voltage regulators features high power supply
rejection ratio (PSRR), ultralow noise, fast start-up, and
excellent line and load transient responses in a small
outline, SOT23, package. Each device in the family is
stable, with a small 2.2-µF ceramic capacitor on the
output. The TPS793xx family uses an advanced,
proprietary BiCMOS fabrication process to yield
extremely low dropout voltages (e.g., 112 mV at 200
mA, TPS79330). Each device achieves fast start-up
times (approximately 50 µs with a 0.001-µF bypass
capacitor) while consuming very low quiescent current
(170 µA typical). Moreover, when the device is placed
in standby mode, the supply current is reduced to less
than 1 µA. The TPS79328 exhibits approximately 32
µVRMS of output voltage noise with a 0.1-µF bypass
capacitor. Applications with analog components that
are noise sensitive, such as portable RF electronics,
benefit from the high PSRR and low-noise features as
well as the fast response time.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
Bluetooth is a trademark owned by Bluetooth SIG, Inc.
3
2
4
5
DBV PACKAGE
(TOP VIEW)
1IN
GND
EN
OUT
BYPASS
Fixed Option
3
2
4
6
DBV PACKAGE
(TOP VIEW)
1IN
GND
EN
OUT
BYPASS
5FB
Adjustable Option
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
2www.ti.com
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
IO = 10 mA
50
0
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 200 mA
20
30
60
70
90
100
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
f – Frequency – Hz
IO = 1 mA
VI = 3.8 V
Co = 2.2 µF
C(byp) = 0.1 µF
IO = 200 mA
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ HzOutput Spectral Noise Density – µ
AVAILABLE OPTIONS
TJVOLTAGE PACKAGE PART NUMBER SYMBOL
1.2 to 5.5 V TPS79301DBVREP†PGVE
1.8 V TPS79318DBVREP†PHHE
2.5 V TPS79325DBVREP†PGWE
40°Cto125°C
2.8 V SOT23 TPS79328DBVREP†‡ PGXE
–40°C to 125°C2.85 V
SOT23
(DBV) TPS793285DBVREP†‡ PHIE
3 V TPS79330DBVREP†‡ PGYE
3.3 V TPS793333DBVREP†PHUE
4.75 V TPS793475DBVREP†‡ PHJE
†The DBVR indicates tape and reel of 3000 parts.
‡Product preview
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
3
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Input voltage range –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage on OUT –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, CDM 500 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, TJ–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating ambient temperature range, TA–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
BOARD PACKAGE RθJC RθJA DERATING FACTOR
ABOVE TA = 25°CTA ≤ 25°C
POWER RATING TA = 70°C
POWER RATING TA = 85°C
POWER RATING
Low K‡DBV 63.75 °C/W 256 °C/W 3.906 mW/°C391 mW 215 mW 156 mW
High K§DBV 63.75 °C/W 178.3 °C/W 5.609 mW/°C561 mW 308 mW 224 mW
‡The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board.
§The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
4www.ti.com
electrical characteristics over recommended operating free-air temperature range EN = VI,
TJ = –40 to 125 °C, VI = VO(typ) + 1 V , IO = 1 mA, Co = 10 µF, C(byp) = 0.01 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIInput voltage (see Note 2) 2.7 5.5 V
IOContinuous output current (see Note 3) 0 200 mA
TJOperating junction temperature –40 125 °C
TPS79301 0 µA< IO < 200 mA,
(see Note 4 ) 1.22 V ≤ VO ≤ 5.2 V, 0.98 VO1.02 VOV
TPS79318
TJ = 25°C 1.8
V
TPS79318 0 µA< IO < 200 mA, 2.8 V < VI < 5.5 V 1.764 1.836 V
TPS79325
TJ = 25°C 2.5
V
TPS79325 0 µA< IO < 200 mA, 3.5 V < VI < 5.5 V 2.45 2.55 V
TPS79328
TJ = 25°C 2.8
V
Output voltage
TPS79328 0 µA< IO < 200 mA, 3.8 V < VI < 5.5 V 2.744 2.856 V
Output voltage
TPS793285
TJ = 25°C 2.85
V
TPS793285 0 µA< IO < 200 mA, 3.85 V < VI < 5.5 V 2.793 2.907 V
TPS79330
TJ = 25°C 3
V
TPS79330 0 µA< IO < 200 mA, 4 V < VI < 5.5 V 2.94 3.06 V
TPS79333
TJ = 25°C 3.3
V
TPS79333 0 µA≤ IO < 200 mA, 4.3 V < VI < 5.5 V 3.234 3.366 V
TPS793475
TJ = 25°C 4.75
V
TPS793475 0 µA< IO < 200 mA, 5.25 V < VI < 5.5 V 4.655 4.845 V
Quiescent current (GND current)
0 µA< IO < 200 mA, TJ = 25°C 170 µA
Quiescent current (GND current) 0 µA< IO < 200 mA 220 µA
Load regulation 0 µA< IO < 200 mA, TJ = 25°C 5 mV
Output volta
g
e line re
g
ulation (∆V
O
/V
O
)VO + 1 V < VI ≤ 5.5 V, TJ = 25°C 0.05
%/V
Out ut
voltage
line
regulation
(∆VO/VO)
(see Note 5) VO + 1 V < VI ≤ 5.5 V 0.12 %/V
C(byp) = 0.001 µF 55
Out
p
ut noise voltage (TPS79328)
BW = 200 Hz to 100 kHz, C(byp) = 0.0047 µF 36
µVRMS
Output noise voltage (TPS79328)
BW
=
200
Hz
to
100
kHz
,
IO = 200 mA, TJ = 25°CC(byp) = 0.01 µF 33 µVRMS
O,J
C(byp) = 0.1 µF 32
R14Ω
C(byp) = 0.001 µF 50
T ime, start-up (TPS79328) RL = 14 Ω,
Co=1µFT
J=25
°
C
C(byp) = 0.0047 µF 70 µs
Time,
start u
(TPS79328)
C
o =
1
µ
F
,
T
J =
25°C
C(byp) = 0.01 µF 100
µs
Output current limit VO = 0 V, See Note 4 285 600 mA
Standby current EN = 0 V, 2.7 V < VI < 5.5 V 0.07 1 µA
High level enable input voltage 2.7 V < VI < 5.5 V 2 V
Low level enable input voltage 2.7 V < VI < 5.5 V 0.7 V
Input current (EN) EN = 0 –1 1 µA
Input current (FB) (TPS79301) FB = 1.8 V 1µA
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
3. Continuous output current and operating junction temperature are limited by internal protection circuitry , but it is not recommended
that the device operate under conditions beyond those specified in this table for extended periods of time.
4. The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater . The maximum IN voltage is 5.5 V . The maximum
output current is 200 mA.
5. If VO≤ 2.5 V then VImin = 2.7 V, VImax = 5.5 V:
Line Reg. (mV) +ǒ%ńVǓ VOǒVImax *2.7 VǓ
100 1000
If VO ≥ 2.5 V then VImin = VO + 1 V, VImax = 5.5 V.
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
5
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electrical characteristics over recommended operating free-air temperature range EN = VI,
TJ = –40 to 125 °C, VI = VO(typ) + 1 V , IO = 1 mA, Co = 10 µF, C(byp) = 0.01 µF (unless otherwise noted)
(continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f = 100 Hz, TJ = 25°C, IO = 10 mA 70
Power su
pp
ly ri
pp
le rejection
TPS79328
f = 100 Hz, TJ = 25°C, IO = 200 mA 68
dB
P
ower supp
l
y r
i
pp
l
e re
j
ect
i
on
TPS79328
f = 10 kHz, TJ = 25°C, IO = 200 mA 70 dB
f = 100 kHz, TJ = 25°C, IO = 200 mA 43
TPS79328
IO = 200 mA, TJ = 25°C 120
TPS79328 IO = 200 mA 200
TPS793285
IO = 200 mA, TJ = 25°C 120
mV
TPS793285 IO = 200 mA 200 mV
Dro
p
out voltage (see Note 6)
TPS79330
IO = 200 mA, TJ = 25°C112
Dropout voltage (see Note 6) TPS79330 IO = 200 mA 200
TPS79333
IO = 200 mA, TJ = 25°C 102
mV
TPS79333 IO = 200 mA 180 mV
TPS793475
IO = 200 mA, TJ = 25°C 77
mV
TPS793475 IO = 200 mA 125 mV
UVLO threshold VCC rising 2.25 2.65 V
UVLO hysteresis TJ = 25°C VCC rising 100 mV
NOTE 6: IN voltage equals VO(typ) – 100 mV ; The TPS79325 dropout voltage is limited by the input voltage range limitations.
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
6www.ti.com
functional block diagram—adjustable version
_+
Thermal
Shutdown
Bandgap
Reference
VIN
Current
Sense
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
External to
the Device
R1
UVLO
250 kΩBypass
FB
functional block diagram—fixed version
_+
Thermal
Shutdown
VIN
Current
Sense
R1
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref
UVLO
ILIM
Bandgap
Reference
UVLO
250 kΩBypass
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME ADJ FIXED I/O DESCRIPTION
BYPASS 4 4 An external bypass capacitor , connected to this terminal, in conjunction with an internal resistor, creates
a low-pass filter to further reduce regulator noise.
EN 3 3 I The EN terminal is an input which enables or shuts down the device. When EN goes to a logic high, the
device will be enabled. When the device goes to a logic low, the device is in shutdown mode.
FB 5 N/A I This terminal is the feedback input voltage for the adjustable device.
GND 2 2 Regulator ground
IN 1 1 I The IN terminal is the input to the device.
OUT 6 5 O The OUT terminal is the regulated output of the device.
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
7
www.ti.com
TYPICAL CHARACTERISTICS
Figure 1
2.795
2.796
2.797
2.798
2.799
2.8
2.801
2.802
2.803
2.804
2.805
0 50 100 150 200
IO – Output Current – mA
TPS79328
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 3.8 V
Co = 10 µF
TJ = 25°C
– Output Voltage – V
VO
Figure 2
2.775
2.78
2.785
2.79
2.795
2.8
2.805
–40–25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS79328
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
– Output Voltage – V
VO
IO = 200 mA
IO = 1 mA
VI = 3.8 V
Co = 10 µF
Figure 3
0
50
100
150
200
250
–40 –25–10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS79328
GROUND CURRENT
vs
JUNCTION TEMPERATURE
Ground Current – Aµ
IO = 1 mA
VI = 3.8 V
Co = 10 µF
IO = 200 mA
Figure 4
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
f – Frequency – Hz
IO = 1 mA
VI = 3.8 V
Co = 2.2 µF
C(byp) = 0.1 µF
IO = 200 mA
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
V/ HzOutput Spectral Noise Density – µ
Figure 5
0
0.05
0.1
0.15
0.2
0.25
0.3
100 1 k 10 k 100 k
V/ HzOutput Spectral Noise Density – µ
f – Frequency – Hz
IO = 1 mA
IO = 200 mA
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
VI = 3.8 V
Co = 10 µF
C(byp) = 0.1 µF
Figure 6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
100 1 k 10 k 100 k
f – Frequency – Hz
V/ HzOutput Spectral Noise Density –
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
VI = 3.8 V
IO = 200 mA
Co= 10 µF
C(byp) = 0.1 µF
C(byp) = 0.001 µF
µ
C(byp) = 0.0047 µF
C(byp) = 0.01 µF
Figure 7
0.001 0.01 0.1
RMS – Root Mean Squared Output Noise –
ROOT MEAN SQUARED OUTPUT NOISE
vs
BYPASS CAPACITANCE
(RMS)
Vµ
C(byp) – Bypass Capacitance – µF
0
10
20
30
40
50
60 VO = 2.8 V
IO = 200 mA
Co = 10 µF
BW = 100 Hz to 100 kHz
Figure 8
100 1 M10 1 k
f – Frequency – Hz
10 k
– Output Impedance –ZoΩ
OUTPUT IMPEDANCE
vs
FREQUENCY
100 k
IO = 1 mA
0
0.5
1
1.5
2
2.5
0
IO = 100 mA
10 M
VI = 3.8 V
Co = 10 µF
TJ = 25°C
0
20
40
60
80
100
120
140
160
180
–40–25–10 5 20 35 50 65 80 95 110 125
IO = 200 mA
IO = 10 mA
VI = 2.7 V
Co = 10 µF
TJ – Junction Temperature – °C
– Dropout Voltage – mV
VDO
TPS79328
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
Figure 9
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
8www.ti.com
TYPICAL CHARACTERISTICS
Figure 10
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
IO = 10 mA
50
0
VI = 3.8 V
Co = 10 µF
C(byp) = 0.01 µF
IO = 200 mA
20
30
60
70
90
100
Figure 11
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
VI = 3.8 V
Co = 2.2 µF
C(byp) = 0.01 µF
IO = 10 mA
IO = 200 mA
40
70
90
30
50
80
10
0
Figure 12
10 100 1 k 10 k
20
60
100
100 k 1 M 10 M
Ripple Rejection – dB
f – Frequency – Hz
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
VI = 3.8 V
Co = 2.2 µF
C(byp) = 0.1 µF
IO = 10 mA
IO = 200 mA
40
70
90
30
50
80
10
0
Fi
g
ure 13
3
TPS79328
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
VO
t – Time – µs
0604020 80 100 140120 160 180 200
– Output Voltage – V
VI = 3.8 V
VO = 2.8 V
IO = 200 mA
Co = 2.2 µF
TJ = 25°C
Enable Voltage – V
1
2
0
0
2C(byp) = 0.0047 µF
C(byp) = 0.01 µF
4
C(byp) = 0.001 µF
Fi
g
ure 14
TPS79328
LINE TRANSIENT RESPONSE
VO
t – Time – µs
0302010 40 50 7060 80 90 100
– Output Voltage – mV
IO = 200 mA
Co = 2.2 µF
C(byp) = 0.01 µF
VI– Input Voltage –
0
-20
3.8
dv
dt +0.4 V
µs
mV
20
4.8
Figure 15
t – Time – µs
TPS79328
LOAD TRANSIENT RESPONSE
0
0 15010050 200 250 350300 400 450
20
0
–20
VO
Output Voltage – mV
∆ – Change In
100
500
– Output Current – mA
IO
VI = 3.8 V
Co = 10 µF
–40
200
300 di
dt +0.02A
µs
1mA
Figure 16
500 mV/div
1s/div
POWER UP / POWER DOWN
VIVO
VO = 3 V
RL = 15 Ω
Fi
g
ure 17
100
50
0 20 40 60 80 100 120
DC Dropuoy Voltage – mV
150
200
DC DROPOUT VOLTAGE
vs
OUTPUT CURRENT
250
140 160 180 200
0
IO – Output Current – mA
TJ = 125°C
TJ = 25°C
TJ = –55°C
Figure 18
0
50
100
150
200
2.5 3 3.5 4 4.5 5
TPS79301
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
VI – Input Voltage – V
– Dropout Voltage – mV
VDO
IO = 200 mA
TJ = 25°C
TJ = –40°C
TJ = 125°C
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
9
www.ti.com
TYPICAL CHARACTERISTICS
Figure 19
2
3
4
1.5 2.5 3.523
TJ = 25°C
IO = 200 mA
– Minimum Required Input Voltage – V
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOLTAGE
VO – Output Voltage – V
VI
1.75 2.25 2.75 3.25
2.8
TJ = 125°C
TJ = –40°C
Figure 20
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.2
IO – Output Current – A
ESR – Equivalent Series Resistance – Ω
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
1
Region of Instability
Region of Stability
Co = 2.2 µF
VI = 5.5 V, VO ≥ 1.5 V
TJ = –40°C to 125°C
Figure 21
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.2
IO – Output Current – A
ESR – Equivalent Series Resistance – Ω
1
Region of Instability
Region of Stability
Co = 10 µF
VI = 5.5 V
TJ = –40°C to 125°C
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
10 www.ti.com
APPLICATION INFORMATION
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µA
when the regulator is turned off.
A typical application circuit is shown in Figure 22.
0.1 µF
BYPASS
OUT
1
3
IN
EN
GND
2
4
5
VI
VO
2.2 µF
+
TPS793xx
0.01 µF
Figure 22. Typical Application Circuit
external capacitor requirements
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS793xx, is required for stability and will improve transient response, noise rejection, and ripple rejection. A
higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated
and the device is located several inches from the power source.
Like all low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2 µF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature.
The internal voltage reference is a key source of noise in an LDO regulator . The TPS793xx has a BYPASS pin
which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor,
in conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to
reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator
to operate properly , the current flow out of the BYPASS pin must be at a minimum, because any leakage current
will create an IR drop across the internal resistor thus creating an output error . Therefore, the bypass capacitor
must have minimal leakage current.
For example, the TPS79328 exhibits only 32 µVRMS of output voltage noise using a 0.1-µF ceramic bypass
capacitor and a 2.2-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the BYPASS pin that is created by the internal 250-kΩ resistor and
external capacitor.
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
11
www.ti.com
APPLICATION INFORMATION
board layout recommendation to improve PSRR and noise performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the
board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at
the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly
to the GND pin of the device.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than
or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
PD(max) +TJmax *TA
RθJA
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
TA is the ambient temperature.
(1)
The regulator dissipation is calculated using:
PD+ǒVI*VOǓ IO(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the
thermal protection circuit.
programming the TPS79301 adjustable LDO regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23. The output voltage is calculated using:
VO+Vref ǒ1)R1
R2Ǔ(3)
Where:
Vref = 1.2246 V typ (the internal reference voltage)
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
12 www.ti.com
APPLICATION INFORMATION
programming the TPS79301 adjustable LDO regulator (continued)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should
be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability , and then
calculate R1 using:
R1 +ǒVO
Vref *1Ǔ R2 (4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor
be placed between OUT and FB. For voltages <1.8 V , the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as:
C1 +(3 x 10–7)x(R1 )R2)
(R1 x R2) (5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.
22 pF
15 pF
15 pF
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
C1
31.6 kΩ
51 kΩ
59 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
VO
VI
OUT
FB
R1
R2
GND
EN
IN
≤0.7 V
≥2 V
TPS79301
1 µF
BYPASS
0.01 µF
1 µF
C1
Figure 23. TPS79301 Adjustable LDO Regulator Programming
regulator protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx
limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately 165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation
resumes.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS79301DBVREP ACTIVE SOT-23 DBV 6 3000 None CU Level-1-220C-UNLIM
TPS79318DBVREP ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
TPS79325DBVREP ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
TPS79333DBVREP ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
TPS793475DBVREP ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
V62/03634-01YE ACTIVE SOT-23 DBV 6 3000 None CU Level-1-220C-UNLIM
V62/03634-02XE ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
V62/03634-03XE ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
V62/03634-07XE ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
V62/03634-08XE ACTIVE SOT-23 DBV 5 3000 None CU CU Level-1-220C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
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PACKAGE OPTION ADDENDUM
www.ti.com 7-Mar-2005
Addendum-Page 1
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