4-140
File Number
3951.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
RFG60P03, RFP60P03, RF1S60P03SM
60A, 30V, 0.027 Ohm, P-Channel Power
MOSFETs
These P-Channel power MOSFETs are manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49045.
Features
• 60A, 30V
•r
DS(ON) = 0.027Ω
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
Ordering Information
PART NUMBER PACKAGE BRAND
RFG60P03 TO-247 RFG60P03
RFP60P03 TO-220AB RFP60P03
RF1S60P03SM TO-263AB F1S60P03
NOTE: When ordering, use the entire part number.Addthesuffix9Ato
obtain the T O-263AB v ariant in tape and reel, i.e. RF1S60P03SM9A.
G
D
S
JEDEC STYLE TO-247 JEDEC TO-220AB
JEDEC TO-263AB
DRAIN
(BOTTOM
SIDE METAL)
SOURCE
DRAIN
GATE DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
GATE
SOURCE
Data Sheet July 1999
4-141
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
RFG60P03, RFP60P03, RFS60P03SM UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS -30 V
Drain to Gate Voltage, (Rgs = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -30 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Continuous Drain Current (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 60
Refer to Peak Current Curve A
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Figure 6
Maximum Power Dissipation (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
1.17 W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ,T
STG -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 11) -30 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 10) -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -1 µA
VDS = 0.8 x Rated BVDSS, TC = 150oC - - -50 µA
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 60A, VGS = 10V - - 0.027 Ω
Turn-On Time tON VDD = 15V, ID≈60A, RL = 0.25Ω,
VGS = -10V, RG = 2.5Ω,
(Figure 13)
- - 140 ns
Turn-On Delay Time td(ON) -20-ns
Rise Time tr-75-ns
Turn-Off Delay Time td(OFF) -35-ns
Fall Time tf-40-ns
Turn-Off Time tOFF - - 115 ns
Total Gate Charge Qg(TOT) VGS = 0 to -20V VDD = -24V, ID≈ 60A,
RL = 0.4Ω
Ig(REF) = -3mA
- 190 230 nC
Gate Charge at 10V Qg(-10) VGS = 0 to -10V - 100 120 nC
Threshold Gate Charge Qg(TH) VGS = 0 to -2V - 7.5 9 nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz
(Figure 12) - 3000 - pF
Output Capacitance COSS - 1500 - pF
Reverse Transfer Capacitance CRSS - 525 - pF
Thermal Resistance, Junction to Case RθJC (Figure 3) - - 0.85 oC/W
Thermal Resistance, Junction to Ambient RθJA TO-220AB, TO- 263AB - - 62 oC/W
TO-247 - - 30 oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) VSD ISD = -60A - - -1.75 V
Diode Reverse Recovery Time trr ISD = -60A, dISD/dt = 100A/µs - - 200 ns
NOTE:
2. Pulse test: pulse width ≤300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3)
RFG60P03, RFP60P03, RF1S60P03SM
4-142
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
1.2
1.0
0.8
0.6
0.4
0.2
00 25 50 75 100 125 150 175
POWER DISSIPATION MULTIPLIER
TC, CASE TEMPERATURE (oC)
-50
-40
-30
-20
-10
025 50 75 100 125 150 175
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
-60
-70
PDM
t1
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
t2
1
0.1
0.01
10-5 10-4 10-3 10-2 10-1 100101
t, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
0.5
THERMAL IMPEDANCE
-500
-100
-10
-1-1 -10 -60
VDS, DRAIN TO SOURCE VOLTAGE (V)
1ms
100µs
10ms
100ms
DC
ID, DRAIN CURRENT (A)
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
TC = 25oC
TJ = MAX RATED
10-6 10-5 10-4 10-3 10-2 10-1 100101
-102
-103
t, PULSE WIDTH (ms)
IDM, PEAK CURRENT (A)
VGS = -20V
VGS = -10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
II
25 175 TC
–
150
------------------------



=
-50
TC = 25oC
RFG60P03, RFP60P03, RF1S60P03SM
4-143
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
-200
-100
-10
0.01 0.1 1 10
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
STARTING TJ = 150oC
STARTING TJ = 25oC
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
If R ≠ 0
00 -1.5 -3.0 -4.5 -6.0 -7.5
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = -5V
VGS = -6V
VGS = -8V
VGS = -7V
VGS = -10V
-30
-60
-90
-120
VGS = -4.5V
VGS = -20V
PULSE DURATION = 80µs
TC = 25oC
DUTY CYCLE = 0.5% MAX
0 -2 -4 -6 -8 -10
VGS, GATE TO SOURCE VOLTAGE (V)
IDS(ON), DRAIN TO SOURCE CURRENT (A)
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX -55oC
175oC
25oC
-30
-60
-120
-90 VDD = -15V
2
1.5
1
0.5
0
-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
PULSE DURATION = 80µs
ON RESISTANCE
VGS = 1.5V, ID = 60A
DUTY CYCLE = 0.5% MAX
2
1.5
1
0.5
0-80 -40 0 40 80 160120 200
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED GATE
VGS = VDS, ID = 250µA2
1.5
1
0.5
0-80 -40 0 40 80 120 160 200
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
ID = 250µA
RFG60P03, RFP60P03, RF1S60P03SM
4-144
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORM
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
CISS
COSS
CRSS
4000
3000
2000
1000
00-5 -10 -15 -20 -25
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
5000 VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
-30
-22.5
-15
-7.5
0
-10
-7.5
-5.0
-2.5
0
20 IG(REF)
IG(ACT) 80 IG(REF)
IG(ACT)
t, TIME (µs)
VDD = BVDSS VDD = BVDSS
RL = 0.5Ω
IG(REF) = -3mA
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
VGS = -10V
tP
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RGS
DUT +
-VDD
VDS
VGS
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
RFG60P03, RFP60P03, RF1S60P03SM
4-145
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms
(Continued)
RL
VGS
+
-
VDS
VDD
DUT
IG(REF)
VDD
Qg(TH)
VGS = -2V
Qg(-10)
VGS = -10V
Qg(TOT)
VGS = -20V
VDS
-VGS
IG(REF)
0
0
RFG60P03, RFP60P03, RF1S60P03SM
4-146
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com
PSPICE Electrical Model
.SUBCKT RFP60P03 2 1 3 REV 6/21/94
CA 12 8 5.01e-9
CB 15 14 3.9e-9
CIN 6 8 3.09e-9
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
EBREAK 5 11 17 18 -36.59
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 4.92e-9
LSOURCE 3 7 2.36e-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 5 16 RDSMOD 1e-4
RGATE 9 20 3.25
RIN 6 8 1e9
RSOURCE 8 7 RDSMOD 11.28e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.92
.MODEL DBDMOD D (IS=4.21e-13 RS=1e-2 TRS1=-2.69e-4 TRS2=-1.33e-6 CJO=5.05e-9 TT=5.33e-8)
.MODEL DBKMOD D (RS=3.80e-2 TRS1=-4.76e-4 TRS2=-4.17e-12)
.MODEL DPLCAPMOD D (CJO=4.05e-9 IS=1e-30 N=10)
.MODEL MOSMOD PMOS (VTO=-3.98 KP=16.27 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=8.05e-4 TC2=1.48e-6)
.MODEL RDSMOD RES (TC1=2.80e-3 TC2=2.62e-6)
.MODEL RVTOMOD RES (TC1=-3.34e-3 TC2=1.46e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=7.5 VOFF=4.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.5 VOFF=7.5)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.43 VOFF=-3.57)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.57 VOFF=1.43)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; authors, William J. Hepp and C. Frank Wheatley.
EVTO
+
13
CA CB
EGS EDS
RIN CIN
MOS1
MOS2
DBREAK
EBREAK
DBODY
LDRAIN
DRAIN
RSOURCE LSOURCE
SOURCE
RBREAK
RVTO
VBAT
IT
VTO
DPLCAP
10 5
16
21
8
14
73
17 18
19
2
+
+
+
RDRAIN
S1A S2A
S2BS1B
12 15
13
814
13
6
8
+
-5
8
-
-
18
8
RGATE
GATE
LGATE
209
1
ESG
+
-6
8
11
+
-
17
18
6
RFG60P03, RFP60P03, RF1S60P03SM