LTC3240-3.3/LTC3240-2.5
1
3240fb
■ Step-Up/Step-Down Charge Pumps Generate Fixed
3.3V or 2.5V Outputs
■ VIN Range: 1.8V to 5.5V
■ Output Current up to 150mA
■ Automatic Mode Switching
■ Constant Frequency (1.2MHz) Operation in
Step-Up Mode
■ Low Dropout Regulator Operation in
Step-Down Mode
■ Low No-Load Quiescent Current: IQ = 65µA
■ Built-In Soft-Start Reduces Inrush Current
■ Shutdown Disconnects Load from Input
■ Shutdown Current < 1µA
■ Short-Circuit/Thermal Protection
■ Available in a 6-Lead (2mm × 2mm) DFN Package
3.3V/2.5V Step-Up/
Step-Down Charge Pump
DC/DC Converter
The LTC®3240-3.3/LTC3240-2.5 are step-up/step-down
charge pump DC/DC converters that produce a fi xed
regulated output voltage of 3.3V or 2.5V over a wide input
voltage range (1.8V to 5.5V).
With input voltages greater than the regulated output
voltage the LTC3240 operates as a low dropout regulator.
Once the input voltage drops within 100mV of the regulated
output voltage the part automatically switches to step-up
mode. In step-up mode the LTC3240 operates as a constant
frequency (1.2MHz) doubling charge pump.
The LTC3240-3.3/LTC3240-2.5 feature low no load operat-
ing current (65µA typical) and ultralow operating current
in shutdown (<1µA). Built-in soft-start circuitry prevents
excessive inrush current during start-up. Thermal shut-
down and current-limit circuitry allow the parts to survive
a continuous short-circuit from VOUT to GND.
The LTC3240-3.3/LTC3240-2.5 require only three tiny
external ceramic capacitors for an ultrasmall application
footprint. The LTC3240-3.3/LTC3240-2.5 are available in a
6-pin (2mm × 2mm) DFN package.
■ 2 AA to 2.5V
■ 2-3 AA/Li-Ion to 3.3V
■ Low Power Supplies for Cameras, I/O Supplies,
Audio, PC Cards, Misc. Logic, etc., in a Wide Variety
of Handheld Products
Output Voltage vs Input Voltage (Full Range)
APPLICATIO S
U
FEATURES DESCRIPTIO
U
TYPICAL APPLICATIO
U
OFF ON
VIN
GND
SHDN
VOUT
C–C+
LTC3240-3.3
1µF4.7µF
1µF
3.3V
IOUT = 150mA
2.7V TO 4.5V
3240 TA01a
Li-Ion OR
3-CELL NiMH
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6411531.
Li-Ion to 3.3V at Up to 150mA
INPUT VOLTAGE (V)
1.7
OUTPUT VOLTAGE (V)
3.30
3.40
5.7
3240 TA01b
3.20
3.10 2.7 3.7 4.7
2.2 3.2 4.2 5.2
3.50
3.25
3.35
3.15
3.45
IOUT = 30mA
LTC3240-3.3/LTC3240-2.5
2
3240fb
VIN to GND ...................................................–0.3V to 6V
VOUT to GND .............................................–0.3V to 5.5V
⎯
S
⎯
H
⎯
D
⎯
N to GND ................................ –0.3V to (VIN + 0.3V)
VOUT Short-Circuit Duration ............................. Indefi nite
Operating Temperature Range (Note 2) ...–40°C to 85°C
Storage Temperature Range ...................–65°C to 125°C
Maximum Junction Temperature .......................... 125°C
ORDER PART NUMBER
TJMAX = 125°C, θJA = 80°C/W (NOTE 4)
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
LTC3240EDC-3.3
LTC3240EDC-2.5
(Note 1)
The
● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C,
⎯
S
⎯
H
⎯
D
⎯
N = VIN, CFLY = 1µF, CIN = 1µF, COUT = 4.7µF unless otherwise noted.
ELECTRICAL CHARACTERISTICS
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
TOP
VIEW
DC PACKAGE
6-LEAD (2mm × 2mm) PLASTIC DFN
4
57
6
3
2
1GND
VIN
VOUT
SHDN
C–
C+
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input Voltage Range ● 1.8 5.5 V
VOUT Output Voltage Range 1.8V ≤ VIN ≤ 2.5V, IOUT < 40mA ● 3.168 3.3 3.432 V
LTC3240-3.3 2.5V ≤ VIN ≤ 5.5V, IOUT < 150mA ● 3.168 3.3 3.432 V
LTC3240-2.5 1.8V ≤ VIN ≤ 5.5V, IOUT < 60mA ● 2.4 2.5 2.6 V
IIN No Load Input Current IOUT = 0, 1.8V ≤ VIN ≤ 5.5V 65 100 µA
I
⎯
S
⎯
H
⎯
D
⎯
N Shutdown Current
⎯
S
⎯
H
⎯
D
⎯
N = 0V, VOUT = 0V 0.1 1 µA
η Effi ciency VIN = 2.5V, IOUT = 100mA 64 %
LTC3240-3.3 VIN = 3.7V, IOUT = 100mA 87 %
LTC3240-2.5 VIN = 2V, IOUT = 50mA 63 %
V
IN = 3V, IOUT = 50mA 83 %
VIH
⎯
S
⎯
H
⎯
D
⎯
N Input High Voltage 1.8V ≤ VIN ≤ 5.5V ● 1.2 V
VIL
⎯
S
⎯
H
⎯
D
⎯
N Input Low Voltage 1.8V ≤ VIN ≤ 5.5V ● 0.4 V
IIH
⎯
S
⎯
H
⎯
D
⎯
N Input Current V
⎯
S
⎯
H
⎯
D
⎯
N = VIN = 5.5V ● –1 1 µA
IIL
⎯
S
⎯
H
⎯
D
⎯
N Input Current V
⎯
S
⎯
H
⎯
D
⎯
N = 0V ● –1 1 µA
ILIM Output Current Limit VIN = 3.7V, VOUT = 0V Step-Down Mode 450 mA
V
IN = 2.4V, VOUT = 0V Step-Up Mode 270 mA
tON VOUT Turn-On Time From the Rising Edge of
⎯
S
⎯
H
⎯
D
⎯
N to 90% of VOUT
V
IN = 2.5V, RLOAD = 66Ω 0.5 ms
V
IN = 3.7V, RLOAD = 66Ω 0.4 ms
Step-Up Mode
IBURST Burst Mode Threshold VIN = 2.4V 15 mA
VRIPPLE Output Ripple IOUT = 100mA, VOUT = 2.5V or 3.3V 20 mVP-P
fOSC Switching Frequency VIN = 2.4V ● 0.6 1.2 1.8 MHz
VRIPPLE(BURST) Burst Mode® Output Ripple VIN = 2.4V 20 mVP-P
Burst Mode is a registered trademark of Linear Technology Corporation.
DC PART MARKING
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LBXJ
LCBP
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
LTC3240-3.3/LTC3240-2.5
3
3240fb
Oscillator Frequency vs Supply
Voltage (Doubler Mode)
⎯
S
⎯
H
⎯
D
⎯
N Threshold Voltage
vs Supply Voltage
Short-Circuit Current
vs Supply Voltage
Start-Up Time vs Supply Voltage Load Regulation (LTC3240-3.3) Load Regulation (LTC3240-2.5)
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF
unless otherwise noted)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3240-3.3/LTC3240-2.5 are guaranteed to meet
performance specifi cations from 0°C to 85°C. Specifi cations over the
–40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 3: ROL ≡ (2VIN – VOUT)/IOUT
Note 4: Failure to solder the exposed backside of the package to a PCB
ground plane will result in a thermal resistance much higher than 80°C/W.
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C,
⎯
S
⎯
H
⎯
D
⎯
N = VIN, CFLY = 1µF, CIN = 1µF, COUT = 4.7µF unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ROL Effective Open-Loop
Output Resistance Doubler Mode
LTC3240-3.3 VIN = 1.8V, VOUT = 3V 7.5 Ω
LTC3240-2.5 VIN = 1.8V, VOUT = 2.25V 8.0 Ω
(Note 3)
SUPPLY VOLTAGE (V)
1.7
SHORT-CIRCUIT CURRENT (mA)
400
500
600
4.7
3240 G03
300
200
2.7 3.7
2.2 5.2
3.2 4.2 5.7
100
0
700
VIN (V)
400
START-UP TIME (µs)
600
800
1000
500
700
900
2 2.4 2.8 3.2
3240 G04
3.61.81.6 2.2 2.6 3 3.4
ILOAD = 50mA
SUPPLY VOLTAGE (V)
1.8
0.6
OSCILLATOR FREQUENCY (MHz)
0.8
1.0
1.2
1.4
1.6
1.8
2.2 2.6 3.0 3.4
3240 G01
3.8
–40°C
85°C
25°C
SUPPLY VOLTAGE (V)
1.80
SHUTDOWN VOLTAGE (V)
0.6
0.8
1.0
3.30 4.30 5.80
3240 G02
0.4
0.2
0
2.30 2.80 3.80 4.80 5.30
–40°C
SHUTDOWN
HYSTERESIS
85°C
25°C
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
3.30
3.35
120
3240 G05
3.25
3.20 30 60 90 150
3.40
VIN = 3.7V
VIN = 2.5V
VIN = 1.8V
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
2.50
2.55
120
3240 G06
2.45
2.40 30 60 90 150
2.60
VIN = 2.4V
VIN = 2.8V
VIN = 1.8V
LTC3240-3.3/LTC3240-2.5
4
3240fb
No-Load Input Current
vs Supply Voltage (LTC3240-3.3)
Mode Switch Threshold
vs Load Current (LTC3240-3.3)
Effi ciency vs Supply Voltage
(LTC3240-3.3)
VOUT Soft-Start (LTC3240-3.3)
Output Noise/Ripple
(LTC3240-3.3)
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF
unless otherwise noted)
Effective Open-Loop Resistance
vs Temperature (LTC3240-3.3)
TEMPERATURE (°C)
–40
EFFECTIVE OPEN-LOOP RESISTANCE (Ω)
8
9
10
60
3240 G07
7
6
5–15 10 35 85
VIN = 1.8V
VOUT = 3V
SUPPLY VOLTAGE (V)
1.7
0
NO-LOAD INPUT CURRENT (µA)
10
30
40
50
100
70
2.7 3.7 4.2
3240 G08
20
80
90
60
2.2 3.2 4.7 5.2 5.7
No-Load Input Current
vs Supply Voltage (LTC3240-2.5)
SUPPLY VOLTAGE (V)
1.7
0
NO-LOAD INPUT CURRENT (µA)
10
30
40
50
100
70
2.7 3.7 4.2
3240 G09
20
80
90
60
2.2 3.2 4.7 5.2 5.7
ILOAD (mA)
0
VIN (V)
3.60
3.70
160
3240 G10
3.50
3.40 40 80 120
20 60 100 140
3.80
3.55
3.65
3.45
3.75
DOUBLER TO
LDO MODE
(VIN RISING)
LDO TO
DOUBLER MODE
(VIN FALLING)
Mode Switch Threshold
vs Load Current (LTC3240-2.5)
ILOAD (mA)
0
2.65
VIN (V)
2.70
2.75
2.80
2.85
40 80 120 160
3240 G11
2.90
2.95
20 60 100 140
DOUBLER TO LDO
MODE (VIN RISING)
LDO TO DOUBLER
MODE (VIN FALLING)
SUPPLY VOLTAGE (V)
1.80
0
EFFICIENCY (%)
10
30
40
50
100
70
2.80 3.80 4.30
3240 G12
20
80
90
60
2.30 3.30 4.80 5.30 5.80
ILOAD = 40mA
ILOAD = 1mA
LDO TO DOUBLER
MODE (VIN FALLING)
DOUBLER TO LDO
MODE (VIN RISING)
VOUT
2V/DIV
200µs/DIV 3240 G13
VIN = 2.4V
RLOAD = 66Ω
SHDN
2V/DIV
VOUT
20mV/DIV
AC COUPLED
500ns/DIV 3240 G14
VIN = 2.4V
ILOAD = 100mA
LTC3240-3.3/LTC3240-2.5
5
3240fb
Load Transient Response
(LTC3240-3.3)
Output Noise/Ripple
(LTC3240-2.5)
Load Transient Response
(LTC3240-2.5)
PI FU CTIO S
UUU
GND (Pin 1): Ground. This pin should be tied to a ground
plane for best performance.
VIN (Pin 2): Input Supply Voltage. VIN should be bypassed
with a 1μF or greater, low ESR ceramic capacitor.
VOUT (Pin 3): Regulated Output Voltage. VOUT should be
bypassed with a 4.7μF or greater, low ESR ceramic capaci-
tor as close to the pin as possible for best performance.
C+ (Pin 4): Flying Capacitor Positive Terminal.
C– (Pin 5): Flying Capacitor Negative Terminal.
⎯
S
⎯
H
⎯
D
⎯
N (Pin 6): Active Low Shutdown Input. A low on
⎯
S
⎯
H
⎯
D
⎯
N
disables the LTC3240-3.3/LTC3240-2.5. This pin is a high
impedance CMOS input pin which must be driven with valid
logic levels. This pin must not be allowed to fl oat.
Exposed Pad (Pin 7): Ground. The exposed pad must be
soldered to PCB ground to provide electrical contact and
optimum thermal performance.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(TA = 25°C, CFLY = CIN = 1µF, COUT = 4.7µF
unless otherwise noted)
VOUT
20mV/DIV
AC COUPLED
60mA
10mA
ILOAD
10µs/DIV 3240 G15
VIN = 3.7V
ILOAD = 10mA TO 60mA
LDO MODE VOUT
20mV/DIV
AC COUPLED
500ns/DIV 3240 G16
VIN = 2.4V
ILOAD = 100mA
VOUT
20mV/DIV
AC COUPLED
50mA
10mA
ILOAD
10µs/DIV 3240 G17
VIN = 2.4V
ILOAD = 10mA TO 50mA
Burst Mode
OPERATION CONST FREQUENCY
MODE
LTC3240-3.3/LTC3240-2.5
6
3240fb
BLOCK DIAGRA
W
–
+
–
+
VOUT
VIN
SHDN
C+
C–
3204 BD
CHARGE
PUMP
1.2MHz
OSCILLATOR
SOFT-START
AND
SWITCH CONTROL
GND
5
4
1, 7
2
3
6
VOUT + 100mV
LTC3240-3.3/LTC3240-2.5
7
3240fb
OPERATIO
U
(Refer to the Block Diagram)
The LTC3240 is a step-up/step-down charge pump DC/DC
converter. For VIN greater than VOUT by about 100mV it
operates as a low dropout regulator. Once VIN drops to
within 100mV of VOUT, the part automatically switches
into charge pump mode to boost VIN to the regulated
output voltage. Regulation is achieved by sensing the
output voltage through an internal resistor divider and
modulating the charge pump output current based on
the error signal.
In the charge pump mode a 2-phase nonoverlapping clock
activates the charge pump switches. The fl ying capacitor
is charged from VIN on the fi rst phase of the clock. On
the second phase of the clock it is stacked in series with
VIN and connected to VOUT. This sequence of charging
and discharging the fl ying capacitor continues at a free
running frequency of 1.2MHz (typ).
Shutdown Mode
In shutdown mode, all circuitry is turned off and the
LTC3240 draws only leakage current from the VIN supply.
Furthermore, VOUT is disconnected from VIN. The
⎯
S
⎯
H
⎯
D
⎯
N
pin is a CMOS input with a threshold voltage of approxi-
mately 0.8V. The LTC3240 is in shutdown when a logic
low is applied to the
⎯
S
⎯
H
⎯
D
⎯
N pin. Since the
⎯
S
⎯
H
⎯
D
⎯
N pin is a
high impedance CMOS input, it should never be allowed
to fl oat. To ensure that its state is defi ned, it must always
be driven with a valid logic level.
Since the output voltage of this device can go above the
input voltage, circuitry is required to control the state of
the converter even in shutdown. This circuitry will draw
an input current of 5μA in shutdown. However, this cur-
rent is eliminated when the output voltage (VOUT) drops
to less than approximately 0.8V.
Burst Mode Operation
The LTC3240 provides automatic Burst Mode operation
while operating as a charge pump, to increase effi ciency of
the power converter at light loads. Burst Mode operation
is initiated if the output load current falls below an inter-
nally programmed threshold. Once Burst Mode operation
is initiated, the part shuts down the internal oscillator to
reduce the switching losses, and goes into a low current
state. This state is referred to as the sleep state in which
the IC consumes only about 65μA from the input. When
the output voltage droops enough to overcome the burst
comparator hysteresis, the part wakes up and commences
normal fi xed frequency operation recharging the output
capacitor. If the output load is still less than the Burst Mode
threshold the part will re-enter sleep state. This Burst Mode
threshold varies with VIN, VOUT and the choice of output
storage capacitor.
Soft-Start
The LTC3240 has built-in soft-start circuitry to prevent
excessive current fl ow during start-up. The soft-start is
achieved by internal circuitry that slowly ramps the amount
of current available to the output storage capacitor from
zero to a value of 300mA over a period of approximately
2ms. The soft-start circuitry is reset in the event of a com-
manded shutdown or thermal shutdown.
Short-Circuit/Thermal Protection
The LTC3240 has built-in short-circuit current limit as
well as overtemperature protection. During a short-circuit
condition, the part automatically limits its output current to
approximately 300mA. If the junction temperature exceeds
approximately 160°C the thermal shutdown circuitry shuts
down current delivery to the output. Once the junction
temperature drops back to approximately 150°C cur-
rent delivery to the output is resumed. The LTC3240 will
cycle in and out of thermal shutdown indefi nitely without
latch-up or damage until the short-circuit condition on
VOUT is removed. Long term overstress (i.e. operation at
junction temperatures above 125°C) should be avoided
as it reduces the lifetime of the part and can result in
degraded performance.
LTC3240-3.3/LTC3240-2.5
8
3240fb
Power Effi ciency
During LDO operation, the power effi ciency (η) of the
LTC3240 is given by:
η= = =
P
P
VI
VI
V
V
OUT
IN
OUT OUT
IN OUT
OUT
IN
•
•
At moderate to high output power, the quiescent cur-
rent of the LTC3240 is negligible and the expression
above is valid. For example, the measured effi ciency of
LTC3240-3.3, with VIN = 3.7V, IOUT = 100mA and VOUT
regulating to 3.3V is 87% which is in close agreement
with the theoretical value of 89%.
During charge pump operation, the power effi ciency (η)
of the LTC3240 is similar to that of a linear regulator with
an effective input voltage of twice the actual input volt-
age. This occurs because the input current for a voltage
doubling charge pump is approximately twice the output
current. In an ideal regulating voltage doubler the power
effi ciency is given by:
η= = =
P
P
VI
VI
V
V
OUT
IN
OUT OUT
IN OUT
OUT
IN
•
•2 2
At moderate to high output power, the switching losses
and the quiescent current of the LTC3240 are negligible
and the expression above is valid. For example, the mea-
sured effi ciency of LTC3240-3.3 with VIN = 2.5V, IOUT =
100mA and VOUT regulating to 3.3V is 64% which is in
close agreement with the theoretical value of 66%.
Effective Open-Loop Output Resistance (ROL)
The effective open-loop output resistance (ROL) of a charge
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
depends on many factors such as the oscillator frequency
(fOSC), value of the fl ying capacitor (CFLY), the nonoverlap
time, the internal switch resistances (RS), and the ESR of
the external capacitors. A fi rst order approximation for
ROL is given below:
RR
fC
LS
STO OSC FLY
014
21
≅∑+
=•
For the LTC3240 in charge pump mode, the maximum
available output current and voltage can be calculated
from the effective open-loop output resistance, ROL, and
the effective output voltage, 2VIN(MIN).
From Figure 1, the available current is given by:
IVV
R
OUT IN OUT
OL
=2–
Typical ROL values as a function of temperature are shown
in Figure 2.
APPLICATIO S I FOR ATIO
WUUU
Figure 1. Equivalent Open-Loop Circuit
+
–
ROL
IOUT VOUT
2VIN
3240 F01
+
–
Figure 2. Typical ROL vs Temperature
VIN, VOUT Capacitor Selection
The style and value of capacitors used with the LTC3240
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
ESR (<0.1Ω) ceramic capacitors be used for both CIN and
COUT. CIN should be 1µF or greater while COUT should be
4.7µF or greater. Tantalum and aluminum capacitors are
not recommended because of their high ESR.
TEMPERATURE (°C)
–40
EFFECTIVE OPEN-LOOP RESISTANCE (Ω)
8
9
10
60
3240 G07
7
6
5–15 10 35 85
VIN = 1.8V
VOUT = 3V
LTC3240-3.3/LTC3240-2.5
9
3240fb
In charge pump mode the value of COUT directly controls the
amount of output ripple for a given load current. Increasing
the size of COUT will reduce the output ripple at the expense
of higher minimum turn-on time. The peak-to-peak output
ripple is approximately given by the expression:
VI
fC
RIPPLE P P OUT
OSC OUT
() •
−≅2
where fOSC is the oscillator frequency (typically 1.2MHz)
and COUT is the value of the output capacitor.
Also, the value and style of the output capacitor can sig-
nifi cantly affect the stability of the LTC3240. As shown
in the Block Diagram, the LTC3240 uses a linear control
loop to adjust the strength of the charge pump to match
the current required at the output. The error signal of this
loop is stored directly on the output storage capacitor.
This output capacitor also serves to form the dominant
pole of the control loop. To prevent ringing or instability
on the LTC3240, it is important to maintain at least 2µF
of capacitance over all conditions.
Excessive ESR on the output capacitor can degrade the
loop stability of the LTC3240. The closed-loop output
resistance of the LTC3240 is designed to be 0.5Ω. For a
100mA load current change, the output voltage will change
by about 50mV. If the output capacitor has 0.5Ω or more
of ESR, the closed-loop frequency response will cease to
roll off in a simple one-pole fashion and poor load transient
response or instability could result. Ceramic capacitors
typically have exceptional ESR performance and combined
with a tight board layout should yield very good stability
and load transient performance.
Just as the value of COUT controls the amount of output
ripple, the value of CIN controls the amount of ripple
present at the input pin (VIN) in charge pump mode. The
input current to the LTC3240 is relatively constant during
the input charging phase and the output charging phase
but drops to zero during the nonoverlap times. Since the
nonoverlap time is small (~25ns), these missing notches
result in a small perturbation on the input power supply
line. A higher ESR capacitor such as tantalum will have
higher input noise than a low ESR ceramic capacitor.
Therefore, ceramic capacitors are again recommended
for their exceptional ESR performance.
Further input noise reduction can be achieved by power-
ing the LTC3240 through a very small series inductor as
shown in Figure 3. A 10nH inductor will reject the fast
current notches, thereby presenting a nearly constant
current load to the input power supply. For economy, the
10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or alumi-
num should never be used for the fl ying capacitor since
its voltage can reverse upon start-up of the LTC3240.
Low ESR ceramic capacitors should always be used for
the fl ying capacitor.
The fl ying capacitor controls the strength of the charge
pump. A 1µF or greater ceramic capacitor is suggested
for the fl ying capacitor. For the LTC3240-3.3 operating
at an input voltage in the range 1.8V ≤ VIN ≤ 2.5V, it is
necessary to have at least 0.5µF of capacitance for the
fl ying capacitor in order to achieve the maximum rated
current of 40mA.
For very light load applications, the fl ying capacitor may
be reduced to save space or cost. From the fi rst order
approximation of ROL in the “Effective Open-Loop Output
Resistance” section, the theoretical minimum output
resistance of a voltage doubling charge pump can be
expressed by the following equation:
RVV
IfC
OL MIN IN OUT
OUT OSC FLY
() –
•
=≅
21
where fOSC is the switching frequency (1.2MHz) and CFLY
is the value of the fl ying capacitor. The charge pump
will typically be weaker than the theoretical limit due
Figure 3. 10nH Inductor Used for
Additional Input Noise Reduction
APPLICATIO S I FOR ATIO
WUUU
LTC3240-3.3/
LTC3240-2.5
0.22µF2.2µF
VIN
GND
1cm OF WIRE
10nH
VIN
1
2
3240 F03
LTC3240-3.3/LTC3240-2.5
10
3240fb
to additional switch resistance. However, for very light
load applications, the above expression can be used as a
guideline in determining a starting capacitor value.
Ceramic Capacitors
Ceramic capacitors of different materials lose their ca-
pacitance with higher temperature and voltage at differ-
ent rates. For example, a capacitor made of X5R or X7R
material will retain most of its capacitance from –40°C
to 85°C whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range. Z5U and Y5V
capacitors may also have a poor voltage coeffi cient causing
them to lose 60% or more of their capacitance when the
rated voltage is applied. Therefore when comparing dif-
ferent capacitors, it is often more appropriate to compare
the amount of achievable capacitance for a given case size
rather than discussing the specifi ed capacitance value. For
example, a 4.7µF 10V Y5V ceramic capacitor in a 0805
case only retains 25% of its rated capacitance over tem-
perature with a 3.3V bias, while a 4.7µF 10V X5R ceramic
capacitor will retain 80% of its rated capacitance over the
same conditions. The capacitor manufacturer’s data sheet
should be consulted to ensure the desired capacitance at
all temperatures and voltages.
Below is a list of ceramic capacitor manufacturers and
how to contact them:
AVX www.avxcorp.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay www.vishay.com
TDK www.component.tdk.com
Layout Considerations
Due to the high switching frequency and high transient
currents produced by LTC3240, careful board layout is
necessary for optimum performance. A true ground plane
and short connections to all the external capacitors will
improve performance and ensure proper regulation under
all conditions. Figure 4 shows an example layout for the
LTC3240.
Figure 4. Recommended Layout
APPLICATIO S I FOR ATIO
WUUU
COUT
4.7µF
0603
CIN
1µF
0603
CFLY
1µF
0603
GND
VOUT
VIN
3240 F04
SHDN
C+
C–
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3240.
If the junction temperature increases above approximately
160°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board is
recommended. Connecting GND (Pin 1) and the Exposed
Pad of the DFN package to a ground plane under the device
on two layers of the PC board can reduce the thermal
resistance of the package and PC board considerably.
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 5 should be used to determine the
maximum combination of ambient temperature and power
dissipation.
The power dissipated in the LTC3240 should always fall
under the line shown for a given ambient temperature.
The power dissipation of the LTC3240 in step-up mode
is given by the expression:
P
D = (2VIN – VOUT) • IOUT
The power dissipation in step-down mode is given by:
P
D = (VIN – VOUT) • IOUT
LTC3240-3.3/LTC3240-2.5
11
3240fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
APPLICATIO S I FOR ATIO
WUUU
This derating curve assumes a maximum thermal resis-
tance, θJA, of 80°C/W for the 2 × 2 DFN package. This can
be achieved from a printed circuit board layout with a solid
ground plane and a good connection to the ground pins of
LTC3240 and the Exposed Pad of the DFN package.
It is recommended that the LTC3240 be operated in the
region corresponding to TJ ≤ 125°C for continuous opera-
tion as shown in Figure 5. Short term operation may be
acceptable for 125°C ≤ TJ ≤ 160°C but long term operation
in this region should be avoided as it may reduce the life of
the part or cause degraded performance. For TJ ≥ 160°C,
the part will be in thermal shutdown.
Figure 5. Maximum Power Dissipation vs Ambient Temperature
AMBIENT TEMPERATURE (°C)
–50
POWER DISSIPATION (W)
3.0
2.5
2.0
1.5
1.0
0.5
0
25 75 150
LT3240 F05
–25 0 50 100 125
θJA = 80°C/W
THERMAL
SHUTDOWN
TJ = 160°C
RECOMMENDED
OPERATION
TJ = 125°C
PACKAGE DESCRIPTIO
U
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
2.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.38 ± 0.05
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
1.37 ±0.05
(2 SIDES)
1
3
64
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN 1103
0.25 ± 0.05
0.50 BSC
0.25 ± 0.05
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.675 ±0.05
2.50 ±0.05
PACKAGE
OUTLINE
0.50 BSC
PIN 1
CHAMFER OF
EXPOSED PAD
LTC3240-3.3/LTC3240-2.5
12
3240fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 0806 REV B • PRINTED IN USA
TYPICAL APPLICATIO
U
RELATED PARTS
2.5V Output from 2-Cell NiMH
OFF ON
VIN
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VOUT
C–C+
LTC3240-2.5
1µF 4.7µF
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2.5V
1.8V TO 3V
3240 TA02
1, 7
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4
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PART NUMBER DESCRIPTION COMMENTS
LTC1751-3.3/LTC1751-5 100mA, 800kHz Regulated Doubler VIN: 2V to 5V, VOUT(MAX) = 3.3V/5V, IQ = 20µA, ISD < 2µA, MS8 Package
LTC1983-3/LTC1983-5 100mA, 900kHz Regulated Inverter VIN: 3.3V to 5.5V, VOUT(MAX) = –3V/–5V, IQ = 25µA, ISD < 2µA, ThinSOTTM
Package
LTC3200-5 100mA, 2MHz Low Noise, Doubler/White LED
Driver
VIN: 2.7V to 4.5V, VOUT(MAX) = 5V, IQ = 3.5mA, ISD < 1µA, ThinSOT Package
LTC3202 125mA, 1.5MHz Low Noise, Fractional White
LED Driver
VIN: 2.7V to 4.5V, VOUT(MAX) = 5.5V, IQ = 2.5mA, ISD < 1µA, DFN, MS
Packages
LTC3204-3.3
LTC3204B-3.3
LTC3204-5
LTC3204B-5
Low Noise, Regulated Charge Pumps in
(2mm × 2mm) DFN Package
VIN: 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), IQ = 48µA,
“B” Version Without Burst Mode Operation, 6-Lead (2mm × 2mm) DFN
Package
LTC3440 600mA (IOUT) 2MHz Synchronous Buck-Boost
DC/DC Converter
95% Effi ciency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA,
10-Lead MS Package
LTC3441 High Current Micropower 1MHz Synchronous
Buck-Boost DC/DC Converter
95% Effi ciency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, IQ = 25µA, ISD ≤ 1µA,
DFN Package
LTC3443 High Current Micropower 600kHz Synchronous
Buck-Boost DC/DC Converter
96% Effi ciency, VIN: 2.4V to 5.5V, VOUT(MIN) = 2.4V, IQ = 28µA, ISD < 1µA,
DFN Package
ThinSOT is a trademark of Linear Technology Coorporation
