Quad-Channel, Digital Isolators,
Enhanced System-Level ESD Reliability
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
Rev. B Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2014 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Enhanced system-level ESD performance per IEC 61000-4-x
Low power operation
5 V operation
1.4 mA per channel maximum at 0 Mbps to 2 Mbps
4.3 mA per channel maximum at 10 Mbps
3.3 V operation
0.9 mA per channel maximum at 0 Mbps to 2 Mbps
2.4 mA per channel maximum at 10 Mbps
Bidirectional communication
3.3 V/5 V level translation
High temperature operation: 125°C
High data rate: dc to 10 Mbps (NRZ)
Precise timing characteristics
3.5 ns maximum pulse width distortion
3.5 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Output enable function
16-lead SOIC wide body, RoHS-compliant package
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak
Qualified for automotive applications
APPLICATIONS
Hybrid electric vehicles
Battery monitor
Motor drive
GENERAL DESCRIPTION
The ADuM340xW1 are 4-channel digital isolators based on the
Analog Devices, Inc., iCoupler® technology. Combining high
speed CMOS and monolithic air core transformer technology,
these isolation components provide outstanding performance
characteristics superior to alternatives such as optocoupler devices.
iCoupler devices remove the design difficulties commonly
associated with optocouplers. Typical optocoupler concerns
regarding uncertain current transfer ratios, nonlinear transfer
functions, and temperature and lifetime effects are eliminated
with the simple iCoupler digital interfaces and stable performance
characteristics. The need for external drivers and other discrete
components is eliminated with these iCoupler products. Further-
more, iCoupler devices consume one-tenth to one-sixth the power
of optocouplers at comparable signal data rates.
The ADuM340xW isolators provide four independent isolation
channels in a variety of channel configurations and data rates
(see the Ordering Guide). All models of the ADuM340xW
provide operation from 3.135 V to 5.5 V, providing
compatibility with lower voltage systems as well as enabling a
voltage level translation function across the isolation barrier. The
ADuM340xW isolators have a patented refresh feature that ensures
dc correctness in the absence of input logic transitions and
during power-up/power-down conditions.
The ADuM340xW isolators contain various circuit and layout
changes to provide increased capability relative to system-level IEC
61000-4-x testing (ESD/burst/surge). The precise capability in
these tests is strongly determined by the design and layout of
the user’s board or module. For more information, see the
AN-793 Application Note, ESD/Latch-Up Considerations with
iCoupler Isolation Products.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.
FUNCTIONAL BLOCK DIAGRAMS
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
V
DD1
GND
1
V
IA
V
IB
V
IC
V
ID
NC
GND
1
V
DD2
GND
2
V
OA
V
OB
V
OC
V
OD
V
E2
GND
2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
11000-001
Figure 1. ADuM3400W Functional Block
Diagram
DECODE ENCODE
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
V
DD1
GND
1
V
IA
V
IB
V
IC
V
OD
V
E1
GND
1
V
DD2
GND
2
V
OA
V
OB
V
OC
V
ID
V
E2
GND
2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
11000-002
Figure 2. ADuM3401W Functional Block
Diagram
DECODE ENCODE
DECODE ENCODE
ENCODE DECODE
ENCODE DECODE
V
DD1
GND
1
V
IA
V
IB
V
OC
V
OD
V
E1
GND
1
V
DD2
GND
2
V
OA
V
OB
V
IC
V
ID
V
E2
GND
2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
11000-003
Figure 3. ADuM3402W Functional Block
Diagram
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—Mixed 5 V/3.3 V, Operation ........ 5
Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 6
Package Characteristics ............................................................... 7
Regulatory Information ............................................................... 7
Insulation and Safety-Related Specifications ............................ 7
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 8
Recommended Operating Conditions ...................................... 8
Absolute Maximum Ratings ............................................................9
ESD Caution...................................................................................9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 13
Application Information ................................................................ 15
PC Board Layout ........................................................................ 15
System-Level ESD Considerations and Enhancements ........ 15
Propagation Delay-Related Parameters ................................... 15
DC Correctness and Magnetic Field Immunity........................... 15
Power Consumption .................................................................. 16
Insulation Lifetime ..................................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
Automotive Products ................................................................. 18
REVISION HISTORY
11/14—Rev. A to Rev. B
Changed Minimum Supply Voltage from 3.0 V to 3.135 V
(Throughout) .................................................................................... 1
Changes to Table 3 ............................................................................ 3
Changes to Table 6 ............................................................................ 4
Changes to Table 9 ............................................................................ 5
Changes to Table 12 .......................................................................... 6
4/14—Rev. 0 to Rev. A
Changes to Table 14 .......................................................................... 7
9/12—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
Parameter Symbol
WA Grade WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 50 65 100 18 32 36 ns 50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 15 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing-Direction tPSKOD 50 6 ns
Table 2.
Parameter Symbol
1 Mbps—WA, WB Grades 10 Mbps—WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SUPPLY CURRENT
ADuM3400W IDD1 2.9 3.5 9.0 11.6 mA
IDD2 1.2 2.0 3.0 5.5 mA
ADuM3401W
I
DD1
2.5
3.2
7.4
10.6
mA
IDD2 1.6 2.4 4.4 6.5 mA
ADuM3402W
I
DD1
2.0
2.8
6.0
7.5
mA
IDD2 2.0 2.8 6.0 7.5 mA
Table 3. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH
2.0
V
Logic Low Input Threshold VIL 0.8 V
Logic High Output Voltage VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx− 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltage VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VI x ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Input Supply Current IDDI(Q) 0.57 0.83 mA All inputs at logic low
Quiescent Output Supply Current IDDO(Q) 0.23 0.35 mA All inputs at logic low
Dynamic Input Supply Current IDDI(D) 0.20 mA/Mbps
Dynamic Output Supply Current
I
DDO(D)
0.05
mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Output Disable Propagation Delay tPHZ, tPLH 6 8 ns High/low-to-high impedance
Output Enable Propagation Delay tPZH, tPZL 6 8 ns High impedance-to-high/low
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 3 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.135 V ≤ VDD1 ≤ 3.6 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter Symbol
WA Grade WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 50 75 100 20 38 45 ns 50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing-Direction tPSKOD 50 6 ns
Table 5.
Parameter Symbol
1 Mbps—WA, WB Grades 10 Mbps—WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SUPPLY CURRENT
ADuM3400W IDD1 1.6 2.2 4.8 7.1 mA
IDD2 0.7 1.4 1.8 2.6 mA
ADuM3401W
I
DD1
1.4
2.0
0.1
5.6
mA
I
DD2
0.9
1.6
2.5
3.3
mA
ADuM3402W IDD1 1.2 1.8 3.3 4.4 mA
IDD2 1.2 1.8 3.3 4.4 mA
Table 6. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold VIH 1.6 V
Logic Low Input Threshold VIL 0.4 V
Logic High Output Voltage VOH VDDx − 0.1 VDDx
V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx− 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltage VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VI x ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Input Supply Current IDDI(Q) 0.31 0.49 mA All inputs at logic low
Quiescent Output Supply Current IDDO(Q) 0.19 0.27 mA All inputs at logic low
Dynamic Input Supply Current IDDI(D) 0.10 mA/Mbps
Dynamic Output Supply Current IDDO(D) 0.03 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 3 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Output Disable Propagation Delay tPHZ, tPLH 6 8 ns High/low-to-high impedance
Output Enable Propagation Delay tPZH, tPZL 6 8 ns High impedance-to-high/low
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 4 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V, OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, V DD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
Parameter Symbol
WA Grade WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay
t
PHL
, t
PLH
50
70
100
20
30
42
ns
50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing-Direction tPSKOD 50 6 ns
Table 8.
Parameter Symbol
1 Mbps—WA, WB Grades 10 Mbps—WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SUPPLY CURRENT
ADuM3400W IDD1 2.9 3.5 9.0 11.6 mA
IDD2 0.7 1.4 1.8 2.6 mA
ADuM3401W IDD1 2.5 3.2 7.4 10.6 mA
IDD2 0.9 1.6 2.5 3.3 mA
ADuM3402W IDD1 2.0 2.8 6.0 7.5 mA
IDD2 1.2 1.8 3.3 4.4 mA
Table 9. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
5 V Logic High Input Threshold VIH 2.0 V
3.3 V Logic High Input Threshold VIH 1.6 V
5 V Logic Low Input Threshold VIL 0.8 V
3.3 V Logic Low Input Threshold VIL 0.4 V
Logic High Output Voltage VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx− 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltage VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VI x ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Input Supply Current IDDI(Q) 0.57 0.83 mA All inputs at logic low
Quiescent Output Supply Current
I
DDO(Q)
0.29
0.27
mA
All inputs at logic low
Dynamic Input Supply Current IDDI(D) 0.20 mA/Mbps
Dynamic Output Supply Current
I
DDO(D)
0.03
mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 3 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Output Disable Propagation Delay tPHZ, tPLH 6 8 ns High/low-to-high impedance
Output Enable Propagation Delay tPZH, tPZL 6 8 ns High impedance-to-high/low
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 5 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3.3 V, V DD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.135 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
Parameter Symbol
WA Grade WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate
1
10
Mbps
Within PWD limit
Propagation Delay
t
PHL
, t
PLH
50
70
100
20
30
42
ns
50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing-Direction tPSKOD 50 6 ns
Table 11.
Parameter Symbol
1 Mbps—WA, WB Grades 10 Mbps—WB Grade
Unit Test Conditions Min Typ Max Min Typ Max
SUPPLY CURRENT
ADuM3400W IDD1 1.6 2.2 4.8 7.1 mA
I
DD2
1.2
2.0
3.0
5.5
mA
ADuM3401W IDD1 1.4 2.0 4.1 5.6 mA
IDD2 1.6 2.4 4.4 6.5 mA
ADuM3402W IDD1 1.2 1.8 3.3 4.4 mA
IDD2 2.0 2.8 6.0 7.5 mA
Table 12. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
5 V Logic High Input Threshold
V
IH
2.0
V
3.3 V Logic High Input Threshold VIH 1.6 V
5 V Logic Low Input Threshold VIL
0.8 V
3.3 V Logic Low Input Threshold VIL 0.4 V
Logic High Output Voltage VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx− 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltage VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VI x ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel
I
OZ
−10
+0.01
+10
µA
Supply Current per Channel
Quiescent Input Supply Current
I
DDI(Q)
0.31
0.49
mA
All inputs at logic low
Quiescent Output Supply Current IDDO(Q) 0.19 0.35 mA All inputs at logic low
Dynamic Input Supply Current IDDI(D) 0.10 mA/Mbps
Dynamic Output Supply Current IDDO(D) 0.05 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Output Disable Propagation Delay tPHZ, tPLH 6 8 ns High/low-to-high impedance
Output Enable Propagation Delay
t
PZH
, t
PZL
6
8
ns
High impedance-to-high/low
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. B | Page 6 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
PACKAGE CHARACTERISTICS
Table 13.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-to-Output)
1
R
I-O
10
12
Ω
Capacitance (Input-to-Output)1 CI-O 2.2 pF f = 1 MHz
Input Capacitance2 CI 4.0 pF
IC Junction-to-Case Thermal Resistance, Side 1 θJCI 33 °C/W Thermocouple located at
center of package underside
IC Junction-to-Case Thermal Resistance, Side 2 θJCO 28 °C/W
1 Device considered a 2-terminal device; Pin 1 to Pin 8 are shorted together and Pin 9 to Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM3400W/ADuM3401W/ADuM3402W is approved by the organizations listed in Table 14. Refer to Table 19 and the Insulation
Lifetime section for details regarding recommended maximum working voltages for specific crossisolation waveforms and insulation
levels.
Table 14.
UL CSA VDE
Recognized under
1577 component recognition program1
Approved under
CSA Component Acceptance Notice #5A
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-122
Single protection,
2500 V rms isolation voltage
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 800 V rms (1131 V peak)
maximum working voltage
Reinforced insulation, 560 V peak
Reinforced insulation per CSA 60950-1-03
and IEC 60950-1, 400 V rms (566 V peak)
maximum working voltage
File E214100 File 205078 File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM3400W/ADuM3401W/ADuM3402W is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current
leakage detection limit = 5 µA).
2 In accordance with DIN V VDE V 0884-10, each ADuM3400W/ADuM3401W/ADuM3402W is proof tested by applying an insulation test voltage ≥1050 V peak for 1 sec
(partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 15.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration
Minimum External Air Gap (Clearance) L(I01) 7.7 min mm Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 8.1 min mm Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Rev. B | Page 7 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The * marking on packages denotes DIN V VDE V 0884-10 approval.
Table 16.
Description Conditions Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 560 V peak
Input-to-Output Test Voltage, Method B1 VIORM × 1.875 = VPR, 100% production test,
tm = 1 sec, partial discharge < 5 pC
VPR 1050 V peak
Input-to-Output Test Voltage, Method A VIORM × 1.6 = VPR, tm = 60 sec,
partial discharge < 5 pC
VPR
After Environmental Tests Subgroup 1 896 V peak
After Input and/or Safety Test Subgroup 2 and Subgroup 3 VIORM × 1.2 = VPR, tm = 60 sec,
partial discharge < 5 pC
672 V peak
Highest Allowable Overvoltage Transient overvoltage, tTR = 10 seconds VTR 4000 V peak
Safety-Limiting Values Maximum value allowed in the
event of a failure (see Figure 4)
Case Temperature TS 150 °C
Side 1 Current IS1 265 mA
Side 2 Current IS2 335 mA
Insulation Resistance at TS VIO = 500 V RS >109 Ω
0
0.5
1.0
1.5
2.0
2.5
3.0
050 100 150 200
SAFE LIMITING POWER (W)
AMBIENT TEMPERATURE (°C)
11000-004
Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Ambient Temperature per DIN V VDE V 0884-10
RECOMMENDED OPERATING CONDITIONS
Table 17.
Parameter Rating
Operating Temperature Range (TA) −40°C to +125°C
Supply Voltages (V
DD1
, V
DD2
)
1
3.135 V to 5.5 V
Input Signal Rise and Fall Times 1.0 ms
1 All voltages are relative to their respective ground. See the DC Correctness
and Magnetic Field Immunity section for information on immunity to external
magnetic fields.
Rev. B | Page 8 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 18.
Parameter Rating
Storage Temperature Range (TST) −65°C to +150°C
Ambient Operating Temperature Range (TA) −40°C to +125°C
Supply Voltages (VDD1, VDD2)1 −0.5 V to +7.0 V
Input Voltage (VIA, VIB, VIC, VID, VE1,VE2)1, 2 −0.5 V to VDD1 + 0.5 V
Output Voltage (VOA, VOB,VOC, VOD)1, 2 −0.5 V to VDDO + 0.5 V
Average Output Current per Pin3
Side 1 (IO1) −18 mA to +18 mA
Side 2 (IO2) −22 mA to + 22 mA
Common-Mode Transients (CMH, CML)4 −100 kV/µs to
+100 kV/µs
1 All voltages are relative to their respective ground.
2 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively. See the PC Board Layout section.
3 See Figure 4 for maximum rated current values for various temperatures.
4 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the Absolute Maximum Ratings can cause latch-
up or permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 19. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
AC Voltage, Bipolar Waveform 565 V peak 50-year minimum lifetime
AC Voltage, Unipolar Waveform
Basic Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1
Reinforced Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
DC Voltage
Basic Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1
Reinforced Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.
Table 20. Truth Table (Positive Logic)
VIx Input1 VEx Input2 VDDI State1 VDDO State1 VOX Output1 Notes
H H or NC Powered Powered H
L H or NC Powered Powered L
x L Powered Powered Z
x H or NC Unpowered Powered H Outputs return to the input state within 1 µs of VDDI power restoration.
x L Unpowered Powered Z
x
x
Powered
Unpowered
Indeterminate
Outputs return to the input state within 1 µs of V
DDO
power restoration
if VEx state is H or NC. Outputs return to high impedance state within
8 ns of VDDO power restoration if VEx state is L.
1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and
VDDO refer to the supply voltages on the input and output sides of the given channel, respectively.
2 In noisy environments, connecting VEx to an external logic high or low is recommended.
Rev. B | Page 9 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
DD1 1
*GND
12
V
IA 3
V
IB 4
V
DD2
16
GND
2
*
15
V
OA
14
V
OB
13
V
IC 5
V
OC
12
V
ID 6
V
OD
11
NC
7
V
E2
10
*GND
18
GND
2
*
9
NC = NO CONNECT
ADuM3400W
TOP VIEW
(No t t o Scal e)
*PIN 2 AND P IN 8 ARE INTE RNALL Y CONNECT E D AND CONNECTING
BOTH TO GND
1
IS RE COMM E NDE D. PI N 9 AND P IN 15 ARE INTE RNALL Y
CONNECTED AND CONNECTING BO TH TO G ND
2
IS RECOMMENDED.
IN NO ISY E NV IRONM E NTS, CONNE CTI NG OUTPUT ENABL E S ( P IN 7 F OR
ADuM 3401W/ADuM3402W AND PI N 10 FO R ALL M ODELS) TO AN E X TERNAL
LOGIC HIGH OR LOW IS RECOMMENDED.
11000-005
Figure 5. ADuM3400W Pin Configuration
Table 21. ADuM3400W Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
2, 8
GND
1
Ground 1. Ground reference for Isolator Side 1.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VIC Logic Input C.
6 VID Logic Input D.
7 NC This pin is not Connected Internally (see Figure 5).
9, 15 GND2 Ground 2. Ground reference for Isolator Side 2.
10 VE2 Output Enable 2. Active high logic input. VOA, VOB, VOC, and VOD outputs are enabled when VE2 is high or disconnected.
VOA, VOB, VOC, and VOD outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic
high or low is recommended.
11 VOD Logic Output D.
12 VOC Logic Output C.
13 VOB Logic Output B.
14 VOA Logic Output A.
16 VDD2 Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
Rev. B | Page 10 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
VDD1 1
*GND12
VIA 3
VIB 4
VDD2
16
GND2*
15
VOA
14
VOB
13
VIC 5VOC
12
VOD 6VID
11
VE1 7VE2
10
*GND18GND2*
9
ADuM3401W
TOP VIEW
(No t t o Scal e)
*PIN 2 AND P IN 8 ARE INTE RNALL Y CONNECTED AND CO NNE CTING
BOTH TO GND1 IS RE COMM E NDE D. PI N 9 AND P IN 15 ARE INTE RNALL Y
CONNECTED AND CONNECTING BO TH TO G ND2 IS RECOMM E NDE D. IN NOI S Y
ENVI RONME NTS, CONNECTI NG OUTPUT ENABL E S ( P IN 7 F OR ADuM 3401W/
ADuM 3402W AND PI N 10 FO R ALL M ODELS) TO AN E X TERNAL LO GIC HIG H
OR LOW I S RE COMME NDE D.
11000-006
Figure 6. ADuM3401W Pin Configuration
Table 22. ADuM3401W Pin Function Descriptions
Pin No.
Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
2, 8 GND1 Ground 1. Ground reference for Isolator Side 1.
3 VIA Logic Input A.
4
V
IB
Logic Input B.
5 VIC Logic Input C.
6 VOD Logic Output D.
7 VE1 Output Enable 1. Active high logic input. VOD output is enabled when VE1 is high or disconnected. VOD is disabled when
VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended.
9, 15 GND2 Ground 2. Ground reference for Isolator Side 2.
10 VE2 Output Enable 2. Active high logic input. VOA, VOB, and VOC outputs are enabled when VE2 is high or disconnected.
VOA, VOB, and VOC outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high
or low is recommended.
11 VID Logic Input D.
12 VOC Logic Output C.
13 VOB Logic Output B.
14 VOA Logic Output A.
16 VDD2 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
Rev. B | Page 11 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
V
DD1 1
*GND
12
V
IA 3
V
IB 4
V
DD2
16
GND
2
*
15
V
OA
14
V
OB
13
V
OC 5
V
IC
12
V
OD 6
V
ID
11
V
E1 7
V
E2
10
*GND
18
GND
2
*
9
ADuM3402W
TOP VIEW
(No t t o Scal e)
*PIN 2 AND P IN 8 ARE INTE RNALL Y CONNECT E D AND CONNECTING
BOTH TO GND
1
IS RE COMM E NDE D. PI N 9 AND P IN 15 ARE INTE RNALL Y
CONNECTED AND CONNECTING BO TH TO G ND
2
IS RECOMMENDED.
IN NO ISY E NV IRONM E NTS, CONNE CTI NG OUTPUT ENABL E S ( P IN 7 F OR
ADuM 3401W/ADuM3402W AND PI N 10 FO R ALL M ODELS) TO AN E X TERNAL
LOGIC HIGH OR LOW IS RECOMMENDED.
11000-007
Figure 7. ADuM3402W Pin Configuration
Table 23. ADuM3402W Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
2, 8 GND1 Ground 1. Ground reference for Isolator Side 1.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VOC Logic Output C.
6 VOD Logic Output D.
7 VE1 Output Enable 1. Active high logic input. VOC and VOD outputs are enabled when VE1 is high or disconnected.
VOC and VOD outputs are disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or
low is recommended.
9, 15 GND2 Ground 2. Ground reference for Isolator Side 2.
10 VE2 Output Enable 2. Active high logic input. VOA and VOB outputs are enabled when VE2 is high or disconnected.
VOA and VOB outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or
low is recommended.
11 VID Logic Input D.
12 VIC Logic Input C.
13 VOB Logic Output B.
14 VOA Logic Output A.
16 VDD2 Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
Rev. B | Page 12 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
TYPICAL PERFORMANCE CHARACTERISTICS
DATA RATE (M bp s)
CURRENT/CHANNEL (mA)
0
0
2.5
42 6 8 10
5V 3V
2.0
1.5
0.5
1.0
11000-008
Figure 8. Typical Input Supply Current per Channel vs. Data Rate (No Load)
DATA RATE (M bp s)
CURRENT/CHANNEL (mA)
0
0
1.00
42 6 8 10
5V
3V
0.75
0.25
0.50
11000-009
Figure 9. Typical Output Supply Current per Channel vs. Data Rate (No Load)
DATA RATE (M bp s)
CURRENT/CHANNEL (mA)
0
0
1.5
42 6 8 10
5V
3V
0.5
1.0
11000-010
Figure 10. Typical Output Supply Current per Channel vs.
Data Rate (15 pF Output Load)
DATA RATE (M bp s)
CURRENT (mA)
0
0
10
42 6 8 10
5V
3V
8
4
2
6
11000-011
Figure 11. Typical ADuM3400W VDD1 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
DATA RATE (M bp s)
CURRENT (mA)
0
0
4
42 6 8 10
5V
3V
3
2
1
11000-011
Figure 12. Typical ADuM3400W VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
DATA RATE (M bp s)
CURRENT (mA)
0
0
10
42 6 8 10
5V
3V
8
6
4
2
11000-013
Figure 13. Typical ADuM3401W VDD1 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
Rev. B | Page 13 of 20
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
DATA RATE (M bp s)
CURRENT (mA)
0
0
4
42 6 8 10
5V
3V
3
2
1
11000-014
Figure 14. Typical ADuM3401W VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
DATA RATE (M bp s)
CURRENT ( mA)
0
0
10
42 6 8 10
5V
3V
8
6
4
2
11000-015
Figure 15. Typical ADuM3402W VDD1 or VDD2 Supply Current vs.
Data Rate for 5 V and 3.3 V Operation
TEMPERATURE(°C)
PROPAGATION DELAY (ns)
–50–25
25
30
35
45
40
0 50 7525 125100
3V
5V
05985-016
Figure 16. Propagation Delay vs. Temperature, WB Grade
Rev. B | Page 14 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
Rev. B | Page 15 of 20
APPLICATION INFORMATION
PC BOARD LAYOUT
The ADuM3400W/ADuM3401W/ADuM3402W digital
isolator requires no external interface circuitry for the logic
interfaces. Power supply bypassing is strongly recommended at
the input and output supply pins (see Figure 17). Bypass
capacitors are most conveniently connected between Pin 1 and
Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The
capacitor value should be between 0.01 μF and 0.1 μF. The total
lead length between both ends of the capacitor and the input
power supply pin should not exceed 20 mm. Bypassing between
Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be
considered unless the ground pair on each package side is
connected close to the package.
V
DD1
GND
1
V
IA
V
IB
V
IC/OC
V
ID/OD
V
E1
GND
1
V
DD2
GND
2
V
OA
V
OB
V
OC/IC
V
OD/ID
V
E2
GND
2
11000-017
Figure 17. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout should be
designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the Absolute
Maximum Ratings of the device, thereby leading to latch-up or
permanent damage.
SYSTEM-LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
System-level ESD reliability (for example, per IEC 61000-4-x) is
highly dependent on system design, which varies widely by
application. The ADuM3400W/ADuM3401W/ADuM3402W
incorporate many enhancements to make ESD reliability less
dependent on system design. The enhancements include:
ESD protection cells added to all input/output interfaces.
Key metal trace resistances reduced using wider geometry
and paralleling of lines with vias.
The SCR effect inherent in CMOS devices minimized by
use of guarding and isolation technique between PMOS
and NMOS devices.
Areas of high electric field concentration eliminated using
45° corners on metal traces.
Supply pin overvoltage prevented with larger ESD clamps
between each supply pin and its respective ground.
While the ADuM3400W/ADuM3401W/ADuM3402W
improve system-level ESD reliability, they are no substitute for a
robust system-level design. See the AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler Isolation Products
for detailed recommendations on board layout and system-level
design.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation
delay to a logic high.
INPUT (
V
Ix
)
OUTPUT (V
Ox
)
tPLH tPHL
50%
50%
11000-018
Figure 18. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the input signal’s timing is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM3400W/ADuM3401W/ADuM3402W component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM3400W/
ADuM3401W/ADuM3402W components operating under the
same conditions.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case the
isolator output is forced to a default state (see Table 20) by the
watchdog timer circuit.
The limitation on the magnetic field immunity of the
ADuM3400W/ADuM3401W/ADuM3402W is set by the
condition in which induced voltage in the receiving coil of the
transformer is sufficiently large to either falsely set or reset the
decoder. The following analysis defines the conditions under
which this can occur. The 3.3 V operating condition of the
ADuM3400W/ADuM3401W/ADuM3402W is examined
because it represents the most susceptible mode of operation.
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = (−dβ/dt)∑∏rn2; N = 1, 2, … , N
where:
β is magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM3400W/
ADuM3401W/ADuM3402W and an imposed requirement that
the induced voltage be at most 50% of the 0.5 V margin at the
decoder, a maximum allowable magnetic field is calculated as
shown in Figure 19.
MAG NETI C FI E LD FRE QUENCY ( Hz )
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSI TY ( kgau ss)
0.001 1M
10
0.01
1k 10k 10M
0.1
1
100M100k
11000-019
Figure 19. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil, which is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and was of the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 V—still well above the 0.5 V
sensing threshold of the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM3400W/ADuM3401W/ADuM3402W transformers.
Figure 20 expresses these allowable current magnitudes as a
function of frequency for selected distances. As shown, the
ADuM3400W/ADuM3401W/ADuM3402W is extremely
immune and can be affected only by extremely large currents
operated at high frequency very close to the component. For
the 1 MHz example noted, one would have to place a 0.5 kA
current 5 mm away from the ADuM3400W/ADuM3401W/
ADuM3402W to affect the operation of the component.
MAG NETI C FI E LD FRE QUENCY ( Hz )
MAXI MUM AL LO WABLE CURRE NT (kA)
1000
100
10
1
0.1
0.011k 10k 100M100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
11000-020
Figure 20. Maximum Allowable Current for Various Current-to-
ADuM3400W/ADuM3401W/ADuM3402W Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board traces
could induce error voltages sufficiently large enough to trigger
the thresholds of succeeding circuitry. Care should be taken in
the layout of such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM3400W/
ADuM3401W/ADuM3402W isolator is a function of the supply
voltage, the channel’s data rate, and the channel’s output load.
For each input channel, the supply current is given by
IDDI = IDDI (Q) f ≤ 0.5 fr
IDDI = IDDI (D) × (2f − fr) + IDDI (Q) f > 0.5 fr
For each output channel, the supply current is given by
IDDO = IDDO (Q) f ≤ 0.5 fr
IDDO = (IDDO (D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO (Q)
f > 0.5 fr
where:
IDDI (D), IDDO (D) are the input and output dynamic supply currents
per channel (mA/Mbps).
CL is the output load capacitance (pF).
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz); it is half of the input
data rate expressed in units of Mbps.
fr is the input stage refresh rate (Mbps).
IDDI (Q), IDDO (Q) are the specified input and output quiescent
supply currents (mA).
Rev. B | Page 16 of 20
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
Rev. B | Page 17 of 20
To calculate the total IDD1 and IDD2 supply current, the supply
currents for each input and output channel corresponding to
VDD1 and VDD2 are calculated and totaled. Figure 8 provides the
per-channel input supply current as a function of the data rate.
Figure 9 and Figure 10 provide the per-channel supply output
current as a function of the data rate for an unloaded output
condition and for a 15 pF output condition, respectively. Figure 11
through Figure 15 provide the total VDD1 and VDD2 supply
current as a function of the data rate for ADuM3400W/
ADuM3401W/ADuM3402W channel configurations.
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of
insulation degradation is dependent on the characteristics of
the voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM3400W/
ADuM3401W/ADuM3402W.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage.
Acceleration factors for several operating conditions are
determined. These factors allow calculation of the time to
failure at the actual working voltage. The values shown in
Figure 21 summarize the peak voltage for 50 years of service life
for a bipolar ac operating condition, and the maximum
CSA/VDE approved working voltages. In many cases, the
approved working voltage is higher than the 50-year service life
voltage. Operation at these high working voltages can lead to
shortened insulation life in some cases.
The insulation lifetime of the ADuM3400W/ADuM3401W/
ADuM3402W depends on the voltage waveform type imposed
across the isolation barrier. The iCoupler insulation structure
degrades at different rates depending on whether the waveform
is bipolar ac, unipolar ac, or dc. Figure 21, Figure 22, and
Figure 23 illustrate these different isolation voltage waveforms.
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the ac bipolar condition
determines the recommended maximum working voltage of
Analog Devices.
In the case of unipolar ac or dc voltage, the stress on the
insulation is significantly lower, which allows operation at
higher working voltages while still achieving a 50-year service
life. The working voltages listed in Table 19 can be applied while
maintaining the 50-year minimum lifetime provided the voltage
conforms to either the unipolar ac or dc voltage cases. Any cross
insulation voltage waveform that does not conform to Figure 22
or Figure 23 should be treated as a bipolar ac waveform and its
peak voltage should be limited to the 50-year lifetime voltage
value listed in Table 19.
Note that the voltage presented in Figure 22 is shown as sinusoi-
dal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
0V
RATED PEAK VOLTAGE
11000-021
Figure 21. Bipolar AC Waveform
0V
RATED PEAK VOLTAGE
11000-022
Figure 22. Unipolar AC Waveform
0V
RAT E D PEAK VOLT AGE
11000-023
Figure 23. DC Waveform
ADuM3400W/ADuM3401W/ADuM3402W Data Sheet
Rev. B | Page 18 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-013-AA
10.50 (0.4134)
10.10 (0.3976)
0.30 (0.0118)
0.10 (0.0039)
2.65 (0.1043)
2.35 (0.0925)
10.65 (0.4193)
10.00 (0.3937)
7.60 (0.2992)
7.40 (0.2913)
0.75(0.0295)
0.25(0.0098)
45°
1.27 (0.0500)
0.40 (0.0157)
C
OPLANARITY
0.10 0.33 (0.0130)
0.20 (0.0079)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
8°
0°
16 9
8
1
1.27 (0.0500)
BSC
03-27-2007-B
Figure 24. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1, 2, 3
Number
of
Inputs,
VDD1 Side
Number
of
Inputs,
VDD2 Side
Maximum
Data Rate
(Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Maximum
Pulse Width
Distortion (ns)
Temperature
Range
Package
Description
Package
Option
ADuM3400WARWZ 4 0 1 100 40 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM3400WBRWZ 4 0 10 36 3.5 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM3401WARWZ 3 1 1 100 40 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM3401WBRWZ 3 1 10 36 3.5 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM3402WARWZ 2 2 1 100 40 −40°C to +125°C 16-Lead SOIC_W RW-16
ADuM3402WBRWZ 2 2 10 36 3.5 −40°C to +125°C 16-Lead SOIC_W RW-16
1 Z = RoHS Compliant Part.
2 Tape and reel are available. The addition of an -RL suffix designates a 13” (1,000 units) tape-and-reel option.
3 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADuM3400W/ADuM3401W/ADuM3402W models are available with controlled manufacturing to support the quality and
reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the
commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade
products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific
product ordering information and to obtain the specific Automotive Reliability reports for these models.
Data Sheet ADuM3400W/ADuM3401W/ADuM3402W
NOTES
Rev. B | Page 19 of 20
