REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout. 95-11-14 M. A. Frye G Added device types 48-68. ICC1 changes for device types 18, 19, 46, and 47. Updated boilerplate. glg 98-02-20 Raymond Monnin H Updated boilerplate paragraphs as part of a 5 year review. ksr 05-05-18 Raymond Monnin J Updated boilerplate paragraphs as part of a 5 year review. ksr 10-11-05 Charles F. Saffle REV SHEET REV SHEET J J J J J J J J J J J J J J 35 36 37 38 39 40 41 42 43 44 45 46 47 48 J J J J J J J J J J J J J J J J J J J J 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV J J J J J J J J J J J J J J SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS AND AGENCIES OF THE PREPARED BY Kenneth Rice DLA LAND AND MARITIME CHECKED BY COLUMBUS, OHIO 43218-3990 Charles Reusing APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 90-10-29 DEPARTMENT OF DEFENSE REVISION LEVEL AMSC N/A J http://www.dscc.dla.mil MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 8K x 8 STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON SIZE A SHEET DSCC FORM 2233 APR 97 CAGE CODE 67268 1 OF 5962-38294 48 5962-E049-11 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 | | | | Federal stock class designator \ | | | | RHA designator (see 1.2.1) 38294 01 | | | | Device type (see 1.2.2) Q | | | | Device class designator (see 1.2.3) / X | | | | Case outline (see 1.2.4) A | | | | Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Circuit function Data retention 8K x 8 CMOS SRAM No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No No Yes Yes Yes Yes Access time 150 ns 120 ns 120 ns 100 ns 100 ns 70 ns 70 ns 55 ns 55 ns 45 ns 45 ns 35 ns 35 ns 25 ns 25 ns 20 ns 20 ns 15 ns 15 ns 70 ns 70 ns 55 ns 55 ns 45 ns 45 ns 35 ns 35 ns 25 ns 25 ns 20 ns 100 ns 70 ns 55 ns 45 ns 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 2 Device type Generic number 1/ 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 Circuit function Data retention Access time Yes Yes Yes Yes Yes Yes Yes Yes Yes No Yes Yes No No Yes No Yes No Yes No Yes No Yes No No Yes No Yes No Yes No Yes No No 85 ns 70 ns 55 ns 120 ns 70 ns 120 ns 70 ns 55 ns 55 ns 55 ns 120 ns 12 ns 12 ns 70 ns 55 ns 55 ns 45 ns 45 ns 35 ns 35 ns 25 ns 25 ns 20 ns 20 ns 70 ns 55 ns 55 ns 45 ns 45 ns 35 ns 35 ns 25 ns 25 ns 20 ns 8K x 8 CMOS SRAM 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class M Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Y Z U T M N 9 8 Descriptive designator Terminals GDIP1-T28 or CDIP2-T28 CQCC1-N32 CDIP3-T28 or GDIP4-T28 CQCC4-N28 GDFP2-F28 CDFP4-F28 See figure 1 See figure 1 See figure 1 Package style 28 32 28 28 28 28 28 36 36 Dual-in-line Rectangular chip carrier Dual-in-line Rectangular chip carrier Flat pack Flat pack Flat pack Flat pack Flat pack 1/ See footnote 1/, page 2. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 3 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range (VCC) ------------------------------------------- -0.5 V dc to +7.0 V dc DC input voltage range (VIN)------------------------------------------ -0.5 V dc to VCC +0.5 V dc 4/ DC output voltage range (VOUT) ------------------------------------ -0.5 V dc to VCC +0.5 V dc 4/ Storage temperature range -------------------------------------------- -65C to +150C Lead temperature (soldering, 10 seconds) ------------------------ +260C Thermal resistance, junction-to-case (JC): Cases X, Y, Z, U, T, and M ------------------------------------------ See MIL-STD-1835 Case N -------------------------------------------------------------- 10C/W 5/ Case 9 -------------------------------------------------------------- 2.0C/W 5/ Case 8 -------------------------------------------------------------- 3.3C/W 5/ Output voltage applied in high-Z state ------------------------------ -0.5 V dc to VCC+0.5 V dc Maximum power dissipation, (PD) ----------------------------------- 1.0 W Maximum junction temperature (TJ) -------------------------------- +150C 6/ 1.4 Recommended operating conditions. Supply voltage range (VCC) ------------------------------------------- 4.5 V dc minimum to 5.5 V dc maximum Supply voltage (VSS)---------------------------------------------------- 0.0 V dc High level input voltage range (VIH): Device types 1-39,46-68,42,44 (TTL levels)-------------------- -2.2 V dc to VCC + 0.5 V dc Device types 40,41,43,45 (CMOS levels) ----------------------- 0.8 x VCC to VCC + 0.5 V dc Low level input voltage range (VIL) Device types 1-39,46-68,42,44 (TTL levels)-------------------- -0.5 V dc to 0.8 V dc Device types 40,41,43,45 (CMOS levels) ----------------------- -0.5 V dc to 0.2 x VCC Case operating temperature range (TC) --------------------------- -55C to +125C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ---------------- 100 percent 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltages referenced to VSS (VSS = ground) unless otherwise specified. 4/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. 5/ When the thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 4 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http://www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 5 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 6 . 3.2.5 Functional tests. Various functional tests used to test this device are contained in appendix A herein. If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V, alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.6 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in Table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 3.11 Substitution. Substitution data shall be as indicated in appendix B herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 6 TABLE IA. Electrical performance characteristics. Test High level output voltage Low level output voltage High level input current Low level input current Symbol VOH VOL IIH IIL Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VCC = 4.5 V, IOH = -4.0 mA VIL = 0.8 V, VIH = 2.2 V VCC = 4.5 V and 5.5 V, VIL = 0.9 V and 1.1 V, VIH = 3.6 V and 4.4 V, IOH = -4.0 mA M,D,P,L,R,F, G,H VCC = 4.5 V, IOL = 8.0 mA VIL = 0.8 V, VIH = 2.2 V VCC = 4.5 V and 5.5 V, VIL = 0.9 V and 1.1 V, VIH = 3.6 V and 4.4 V, IOL = 8.0 mA M,D,P,L,R,F, G,H VCC = 5.5 V, VIN = 5.5 V for pin being tested, all other pins not being tested at 0.0 V. M,D,P,L,R,F, G,H VCC = 5.5 V, VIN = 0.0 V for pin being tested, all other pins not being tested at 0.0 V. M,D,P,L,R,F, G,H Group A Device subgroups types 01-39, 1,2,3 46-68, 42,44, 40,41, 43,45 1 2/ 3/ 01-39, 1,2,3 46-68, 42,44 40,41, 43,45 1 2/ 3/ 1,2,3 All 1 2/ 3/ 1,2,3 All 1 2/ 3/ Limits Min Max 2.4 4.2 4/ 0.4 4/ 10 4/ -10 4/ Unit V V V V A A A A See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 7 TABLE IA. Electrical performance characteristics - Continued. Test High impedance output leakage current Low impedance output leakage current Symbol IOHZ IOLZ Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VCC = 5.5 V, VO = 5.5 V VIL = 0.0 V, VIH = 5.0 V VIH OE VCC VCC = 4.5 V and 5.5 V, VO = 5.5 V, VIL = .5 V, VIH = VCC - .5 V, 3.6 V OE 4.4 V M,D,P,L,R,F, G,H VCC = 5.5 V, VO = 0.0 V VIL = 0.0 V, VIH = 5.0 V VIH OE VCC VCC = 4.5 V and 5.5 V, VO = 0.0 V, VIL = .5 V, VIH = VCC - .5 V, 3.6 V OE 4.4 V M,D,P,L,R,F, G,H Group A Device subgroups types 01-39, 1,2,3 46-68, 42,44, 40,41, 43,45 1 2/ 3/ 1,2,3 01-39, 46-68, 42,44, 40,41, 43,45 1 2/ 3/ Limits Min Max 10 4/ -10 4/ Unit A A A A See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 8 TABLE IA. Electrical performance characteristics - Continued. Test Operating supply current Symbol ICC1 Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VCC = 5.5 V, IOUT = 0 mA, Group A Device subgroups types 02,04, 31,38 CE 1 = 0.8 V dc, f = 1/tAVAV, 01,03,05 OE = WE = CE2 = 2.2 V dc VCC = 5.5 V, IOUT = 0 mA, CE 1 = 1.1 V dc, f = 1/tAVAV, 1,2,3 06,20,32 07,08,10, 21,22,24, 33,34 12,14,26, 28,39,42 09,11, 16,23,25 13,27 15,17, 29,30 48,49,51, 59,60,62 35,36 53,55,64, 66 50,52,56, 57,58,61, 63,67,68 18,19, 54,65 37,46,47 40,45 80 90 105 110 125 130 135 145 150 155 160 170 180 60 mA OE = WE = CE2 = 4.4 V dc VCC = 5.5 V, IOUT = 0 mA, 41,43 44 110 200 WE = VCC, f = 20 MHz M,D,P,L,R,F, G,H 3/ 4/ mA 1 2/ Limits Min Max 60 Unit See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 9 TABLE IA. Electrical performance characteristics - Continued. Test Standby supply current TTL levels Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VCC = 5.5 V, f = 0, CE 1 = VIH, CE2 = VIL, Group A Device Limits subgroups types Min Max 38-43, 45 500 35-37 10 02,04,06, 20,31,32 15 Unit A OE = WE = VIH, all other inputs = VIL or VIH VCC = 5.5 V, 1,2,3 01,03,05, 07,21,48, 59 08,10,12, 14,16,18, 22,24,26, 28,33,34, 46,47,49, 51,53,55, 57,60,62, 64,66 09,11,13, 15,17,19, 23,25,27, 29,30,50, 52,54,56, 58,61,63, 65,67,68 20 30 40 mA f = 0 44 3/ 35-37 37.5 12 4/ 15 mA Symbol ICC2 AS = GND, all other inputs = 2.0 V CE1=CE2 = VCC, all other inputs = 0.8 V M,D,P,L,R,F,G,H 1 2/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 10 TABLE IA. Electrical performance characteristics - Continued. Test Standby supply current CMOS levels Data retention current Symbol ICC3 Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VCC = 5.5 V, f = 0 CE1 VCC - 0.5 V, all other inputs = 0.5 V or VCC - 0.5 V VCC = 5.5 V, f = 0 Group A Device Limits subgroups types Min Max 35-37 200 38-43, 45 500 01,02, 04,06, 20,31, 5 32,46, 47 08,10,12, 14,16,18, 1,2,3 22,24,26, 10 28,33,34, 49,51,53, 55,57,60, 62,64,66 03,05,07, 21,48,59 15 09,11,13, 15,17,19, 23,25,27, 20 29,30,50, 52,54,56, 58,61,63, 65,67,68 Unit A mA ICC4 CE2 = AS = GND all other inputs = VCC M,D,P,L,R,F,G,H VCC = 2.0 V, f = 0 CE1 VCC - 0.2 V, all other inputs = 0.2 V or VCC - 0.2 V M,D,P,L,R,F,G,H 1 2/ 1,2,3 1 2/ mA A A mA 44 3/ 35-37 31-37 02,04 06,08,10, 12,14,16, 18,20,22, 24,26,28, 38-43, 45,46,49, 51,53,55, 57,60,62, 64,66 3/ 35-37 2 4/ 3 75 200 300 4/ 3 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 11 TABLE IA. Electrical performance characteristics - Continued. Test Input capacitance 5/ Output capacitance 5/ Functional tests 6/ Read/Write cycle time Output hold time Symbol CIN COUT tAVAV tAVQX Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified VI = 0.0 V, TA = +25C, f = 1 MHz (see 4.4.1e) VO = 0.0 V, TA = +25C, f = 1 MHz (see 4.4.1e) VCC = 4.5 V verify output VO (see 4.4.1c) M,D,P,L,R,F, G,H Read cycle See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device subgroups types 4 All 4 All 7,8A,8B All 7 2/ 3/ 9,10,11 9 2/ 9,10,11 9 2/ Limits Min Max 15 20 L H 4/ 01 150 02,03, 38,40, 45 120 04,05, 100 31 35 85 06,07,20, 21,32,36, 70 39,41,48, 59 08,09,22, 23,33,37, 55 42-44,49 50,60,61 10,11,24, 25,34,51, 45 52,62,63 12,13,26, 35 27,53,54, 64,65 14,15,28, 29,55,56, 66,67 25 16,17,30, 57,58,68 20 18,19, 15 46,47 12 3/ 4/ 35-44, 5 45 01-13, 20-27, 31-34, 48-54, 3 59-65 46,47 2 14-19, 28-30, 55-58, 66-68 0 3/ 4/ Unit pF pF V V ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 12 TABLE IA. Electrical performance characteristics - Continued. Test Read access time OE controlled output enabled time 5/ 7/ OE controlled output three-state time 5/ 7/ Symbol tAVQV tOLQX tOHQZ Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 01 150 02,03 120 04,05,31 100 35 85 9,10,11 06,07,20, 21,32,36, 70 39,41,48, 59 08,09,22, 23,33,37, 55 38,40, 42-45,49 50,60,61 10,11,24, 25,34,51, 45 52,62,63 12,13,26, 35 27,53,54, 64,65 14,15,28, 29,55,56, 66,67 25 16,17,30, 57,58,68 20 18,19 15 46,47 12 9 3/ 4/ 2/ 01-05, 31,44 5 9,10,11 06-30, 32-43, 0 45,46,47, 48-68 9 3/ 4/ 2/ 01 50 02-11, 20-25, 40 31-34, 48-52, 59-63 12,13,26, 30 27,53,54, 9,10,11 64,65 44 20 14-17, 28-30, 35-43,45 15 55-58, 66-68 18,19 10 46,47 7 9 3/ 4/ 2/ Unit ns ns ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 13 TABLE IA. Electrical performance characteristics - Continued. Test OE controlled output enabled time (read cycle 3) CE controlled output enable time 5/ 7/ Symbol tOLQV tELQX Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device subgroups types Min 01 02,03 04,05, 9,10,11 31 06,07,20, 21,32,35, 48,59 08,09,22, 23,33,49, 50,60,61 10,11,24, 25,34,44, 51,52,62, 62,63, 12-17, 26-30, 36-43,45 53-58, 64-68 18,19 46,47 9 3/ 2/ 9,10,11 01-43,45 0 48-68 44 5 46,47 2 4/ 9 3/ 2/ Limits Max 70 55 45 30 25 20 15 12 8 4/ Unit ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 14 TABLE IA. Electrical performance characteristics - Continued. Test CE controlled output access time CE high to high Z 5/ 7/ Symbol tELQV tEHQZ Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 01 150 02,03 120 04,05 100 31 35 85 9,10,11 06,07,20, 21,32,36, 70 39,41,48, 59 08,09,22, 23,33,37, 55 38,40, 42-45, 49,50,60, 61 10,11,24, 25,34,51, 45 52,62,63 12,13,26, 35 27,53,54, 64,65 14,15,28, 29,55,56, 66,67 25 16,17,30 57,58,68 20 18,19 15 46,47 12 4/ 9 3/ 2/ 01 50 02,03 40 04-07,20 21,31,32 35 9,10,11 48,59 08-11, 22-25, 25 33-35,44 49-52, 60-63 36-43, 20 45 12-17, 15 26-30, 53-58, 64-68 18,19 10 46,47 7 4/ 9 3/ 2/ Unit ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 15 TABLE IA. Electrical performance characteristics - Continued. Test Address setup time for write control CE low to write end Symbol tAVWL tAVEL tELWH Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device subgroups types Min 9,10,11 01-43, 0 48-68, 45,46,47 44 10 4/ 9 3/ 2/ 38,40, 105 45 01 100 02,03 85 04,05, 80 31 35 65 06,07,20, 21,32,36, 60 39,41,48, 59 9,10,11 08,09,22, 23,33,37, 50 49,50,60, 61 42-44 45 10,11,24, 25,34,51, 40 52,62,63 12,13,26, 27,53,54, 30 64,65 14,15,28, 20 29,55,56, 66,67 16,17,30, 15 57,58,68 18,19 13 46,47 10 4/ 9 3/ 2/ Limits Max Unit ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 16 TABLE IA. Electrical performance characteristics - Continued. Test Address valid to end of write Symbol tAVWH Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 38,40, 105 45 01 100 02,03 85 04,05, 80 31 35 65 06,07,20, 21,32,36, 60 39,41,48, 59 08,09,22, 23,33,37, 49,50,60, 50 9,10,11 61 42-44 45 10,11,24, 25,34,51, 40 52,62,63 12,13,26, 30 27,53,54, 64,65 14,15,28, 20 29,55,56, 66,67 16,17,30, 15 57,58,68 18,19 13 46,47 10 4/ 9 3/ 2/ Unit ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 17 TABLE IA. Electrical performance characteristics - Continued. Test Write pulse width Write recovery time Chip disable to address change Symbol tWLWH tWHAV tEHAX Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 38,40, 105 45 01 90 02,03 70 04-07,20 21,31,32, 39,41,48, 60 59 08,09,22, 23,33,35, 50 49,50,60, 61 42,43 45 10,11,24, 25,34,36, 40 37,51,52, 62,63 9,10,11 44 35 12,13,26, 27,53,54, 64,65 30 14,15,28, 29,55,56, 20 66,67 16,17,30, 57,58,68 15 18,19 13 46,47 10 4/ 9 3/ 2/ 9,10,11 01-43, 0 45,46,47, 48-68 44 10 4/ 9 3/ 2/ 9,10,11 01-43, 0 45,46,47, 48-68 44 5 4/ 9 3/ 2/ Unit ns ns ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 18 TABLE IA. Electrical performance characteristics - Continued. Test WE high to low Z 5/ 7/ WE low to high Z Symbol tWHQX tWLQZ Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 01-45, 0 9,10,11 48-68 46,47 2 4/ 9 3/ 2/ 01 50 02,03 40 04-07,20 35 21,31,32, 48,59 9,10,11 08,09,22, 23,33,49, 30 50,60,61 10,11,24, 25,34,51, 25 52,62,63 44 20 12-15, 26-29, 15 35-43,45 53-56, 64,67, 16-19, 10 30,57,58, 68 46,47 7 4/ 9 3/ 2/ Unit ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 19 TABLE IA. Electrical performance characteristics - Continued. Test Data setup time Data hold time Chip deselect to data retention time 5/ Symbol tDVWH tWHDX tCDR Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 38,40, 105 45 01,39, 41 60 02-05, 31,35 50 42,43 45 36,37 40 06,07,20, 21,32,48, 59 35 9,10,11 08,09,22, 23,33,44, 25 49,50,60, 61 10,11,24, 25,34,51, 20 52,62,63 12-15, 26-29, 15 53-56, 64-67 16,17,30, 57,58,68 12 18,19 10 46,47 7 9 2/ 3/ 4/ 01-13, 20-27, 31-34, 9,10,11 44, 5 48-54, 59-65, 14-19, 28-30, 0 35-43, 45,46,47 55-58, 66-68 9 3/ 4/ 2/ 7,8A,8B 02,04,06, 08,10,12, 14,16,18, 0 20,22,24, 26,28, 31-43, 45,46,49, 51,53,55, 57,60,62, 64,66 7 3/ 4/ 2/ Unit ns ns ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 20 TABLE IA. Electrical performance characteristics - Continued. Test Operation recovery time 5/ Symbol tR Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H Group A Device Limits subgroups types Min Max 02,04,06, 7,8A,8B 08,10,12, 14,16,18, tAVAV 20,22,24, 26,28, 31-43, 45,46,49, 51,53,55, 57,60,62, 64,66 4/ 7 3/ 2/ Unit ns ns 9,10,11 9 2/ 9,10,11 9 2/ 9,10,11 9 2/ 9,10,11 9 2/ 9,10,11 9 2/ ns ns ns ns ns ns ns ns ns ns AC parameters only for device type 44 and 45 only AS address latch control access time Address valid to end of write AS address latch control setup to start of write AS address latch control hold after end of write AS address latch control setup to end of write tLLQV tLLWH tLLWL tWHLL tLLEH See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H 44,45 3/ 44 3/ 44,45 3/ 44,45 3/ 44 3/ 10 4/ 65 4/ 45 4/ 0 4/ 45 4/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 21 TABLE IA. Electrical performance characteristics - Continued. Test AS address latch control setup to start of write AS address latch control hold after end of write Address setup to address latch Address hold after address latch Address latch width Chip enable hold after address latch Symbol tLLEL tEHLL tAVLH tLHAX tLLLH tLHEL Conditions 1/ -55C TC +125C GND = 0 V 4.5 V VCC 5.5 V unless otherwise specified See figures 4 and 5 M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H M,D,P,L,R,F, G,H Group A Device subgroups types 9,10,11 44 9 3/ 2/ 9,10,11 44 9 3/ 2/ 9,10,11 44,45 9 3/ 2/ 9,10,11 44,45 9 3/ 2/ 9,10,11 44,45 9 3/ 2/ 9,10,11 44 9 3/ 2/ Limits Min Max 5 4/ 5 4/ 15 4/ 10 4/ 20 4/ 0 4/ Unit ns ns ns ns ns ns ns ns ns ns ns ns 1/ AC measurements assume transition time 5 ns, input levels are from ground to 3.0 V, and output load CL 30 pF except as noted on figure 5. Timing reference levels are 1.5 V. For devices 40, 41, and 43, input levels are VIL = 0.5 V, VIH = VCC - 0.5 V. 2/ When performing postirradiation electrical measurements for any RHA level TA = +25C. Limits shown are guaranteed at T A = +25C 5C. The M, D, P, L, R, F, G, and H in the test condition column are the postirradiation limits for the device types specified in the device types column. 3/ Devices listed in 1.2.2 herein, that are to be marked with an RHA marking shall apply to all RHA levels unless otherwise specified. 4/ Preirradiation values for RHA marked devices shall also be the postirradiation values unless otherwise specified. 5/ Tested initially and after any design or process changes which may affect that parameter, and therefore shall be guaranteed to the limits specified in table IA. 6/ Functional tests shall include the test table and other test patterns used for fault detection as approved by the qualifying activity. Outputs are measured at VOL < 1.5 V, VOH > 1.5 V. For devices 40, 41, and 43, outputs are measured at VOL < V CC / 2, VOH > VCC / 2. 7/ This parameter measured 500 mV from steady-state VOL or VOH. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 22 TABLE IB. Single event phenomena (SEP) test limits. 1/ 2/ VCC = 4.5 V Device type TA =temperature ( 10C) 3/ Memory pattern Effective threshold LET no upsets (Mev/(mg/cm2) Maximum device cross section (m2) Bias voltage for latch-up test VCC = 5.5 V (minimum); no latch-up; LET = 100 3/ (minimum) 35 +125C All 1s 46 36 +125C All 1s 46 11.5 11.5 119 119 37 +125C All 1s 46 11.5 119 38 +125C Parity 35 48 119 39 +125C Parity 22 48 119 40 +125C Parity 35 48 119 41 +125C Parity 22 48 119 42 +125C Parity 22 48 119 43 +125C Parity 22 48 119 44 +125C 4/ 50 50 120 45 +125C Parity 35 45 119 1/ For SEP test conditions, see 4.4.4.2 herein. 2/ For QML product, technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. Test plan must be approved by TRB and qualifying activity. 3/ Worst case temperature TA = +125C 4/ Testing shall be performed using checkerboard and checkerboard bar test patterns. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 23 Case N FIGURE 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 24 Case N - Continued. Inches Symbol Millimeters Min Max Min Max A --- .110 --- 2.79 B .014 .021 0.36 0.53 B1 .014 .018 0.36 0.46 C .006 .012 0.15 0.30 C1 .006 .009 0.15 0.23 D .735 .765 18.67 19.43 E .685 .715 17.40 18.16 e .050 BSC 1.27 BSC H --- 1.480 --- 37.59 L .330 .400 8.38 --- M --- .0015 --- 0.038 Q .070 .090 1.78 2.29 S1 .005 --- 0.13 --- NOTES: 1. Dimensions are in inches. 2. Metric equivalents are given for general information only. 3. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. Vendor option for pin one identifier. No alpha or numeric symbols allowed. 4. Dimension letters refer to MIL-STD-1835. 5. Leads must not overhang braze pads. 6. Dimensions B1 and C1 apply to base metal only. Dimension M applies to plating thickness. FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 25 Case 9 FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 26 Case 9 - Continued. Inches Symbol Millimeters Min Max Min Max A --- .150 --- 3.810 B .006 .013 1.52 .330 B1 .006 .010 1.52 .254 C .0045 .0105 .114 .266 C1 .0045 .0075 .114 .190 D .620 .640 15.75 16.26 e .025 BSC .635 BSC E .620 .640 15.750 16.26 E2 .470 .490 11.940 12.450 E3 .075 REF 1.910 REF H --- 1.20 --- 30.48 L .270 --- 6.858 --- M Q .0015 TYP .026 .038 TYP --- .660 --- S .1025 REF 2.604 V .260 REF 6.600 W .030 REF .762 X .050 REF 1.270 Y .100 REF 2.540 Z .080 REF 2.030 NOTES: 1. Package material: Opaque ceramic. 2. All exposed metallized areas pre gold plated over nickel plating in accordance with MIL-STD-1835. 3. Lead finish is in accordance with MIL-PRF-38535. 4. Capacitor pads P are electrically connected to VDD. Capacitor pads G are electrically connected to VSS. 5. Leads must not overhang braze pads. 6. Capacitors are optional at user level only. This document does not cover devices with capacitors installed. FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 27 Case 8 Inches Symbol Millimeters Min Max Min Max A .075 .095 1.91 2.41 b .007 .010 .18 .25 S1 .103 .123 2.62 3.12 c .004 .006 .11 .15 D .640 .660 16.26 16.76 E .623 .637 15.82 16.18 e L .025 BSC .235 .635 BSC .285 5.96 7.24 FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 28 Device types Case outlines 01-19, 31-38, 40, 42, 43, 46, 47, 48-58 X, Z, U, T, M, and N 20 - 30, 59 - 68 U Terminal number 01 - 19, 31 - 37, 48 - 58 35 - 43 44 45 9 8, 9 9 Y Terminal symbol 1 NC A4 NC VSS GND VSS 2 A12 A5 NC VCC VCC VCC 3 A7 A6 A12 NC NC NC 4 A6 NC A7 A12 A12 A12 5 A5 A7 A6 A7 A7 A7 6 A4 A8 A5 A6 A6 A6 7 A3 A9 A4 A5 A5 A5 8 A2 A10 A3 A4 A4 A4 9 A1 A11 A2 A3 A3 A3 10 A0 A12 A1 A2 A2 A2 11 I/O I/O A0 A1 A1 A1 12 I/O I/O NC A0 A0 A0 13 I/O I/O I/O I/O I/O I/O 14 VSS VSS I/O I/O I/O I/O 15 I/O I/O I/O I/O I/O I/O 16 I/O I/O VSS NC NC NC 17 I/O I/O NC VCC VCC VCC 18 I/O I/O I/O VSS GND VSS 19 I/O I/O I/O VSS GND VSS 20 CE 1 CE 1 I/O VCC VCC VCC 21 A10 A0 I/O I/O I/O I/O 22 OE OE I/O I/O I/O I/O 23 A11 A1 CE 1 I/O I/O I/O 24 A9 A2 A10 I/O I/O I/O 25 A8 A3 OE I/O I/O I/O 26 CE2 CE2 NC CE 1 CE 1 CE 1 27 WE WE A11 A10 A10 A10 28 VCC VCC A9 OE OE OE 29 --- --- A8 A11 A11 A11 30 --- --- CE2 A9 A9 A9 31 --- --- WE A8 A8 A8 32 --- --- VCC CE2 AS CE2 33 --- --- --- WE CE2 WE 34 --- --- --- NC WE AS 35 --- --- --- VCC VCC VCC 36 --- --- --- VSS GND VSS FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 29 Mode Standby Standby Read Write Read Mode Write Read Deselected Deselected, address load Standby Device types 01-43, 46-68 CE 1 H X L L L CE2 X L H H H WE X X H L H OE X X L X H I/O High Z High Z DOUT DIN High Z Power Active Active Deselected Deselected Standby Device type 44,45 CE2 H H H H L CE 1 WE L L L H H X H X X X OE X L X X X AS I/O X DIN X DOUT H High Z L High Z X High Z NOTE: H = logic "1" state, L = logic "0" state. X = logic "don't care state, and Z = high impedance state. FIGURE 3. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 30 Read cycle NOTES: 1. WE is held high during the read cycle. 2. Timing measurement reference level is 1.5 V. 3. Device type 44 and 45 only. FIGURE 4. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 31 Write cycle 1 (CE1 or CE2 controlled) NOTES: 1. Either CE 1 or CE2 may be used to control the write cycle. If CE 1 is used, CE2 should be high when WE is low. If CE2 is used, CE 1 should be low when WE is low. 2. In a CE 1 or CE2 controlled write cycle, the outputs assume a high impedance state, whether OE is high or low, as long as WE is low. 3. Timing measurement reference is 1.5 V. 4. Device type 44 and 45 only. FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 32 Write cycle 2 ( WE controlled) NOTES: 1. In the WE controlled write cycle, while WE is low, it will force the outputs into a high impedance state, whether OE is high or low. 2. Timing measurement reference is 1.5 V. 3. Device type 44 and 45 only. FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 33 NOTE: Device types 44 and 45 only. FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 34 NOTES: 1. Either CE 1 or CE2 may be used to begin data retention mode. 2. For tCDR and tR: CE 1 VCC -0.2 V or CE2 0.2 V, VIN VCC -2.0 V or VIN 0.2 V FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 35 NOTES: 1. .Use this output load circuit or equivalent for testing. 2. Including scope and jig. 3. Minimum of 5 pF for tEHQZ, tOHQZ, tELQX, tOLQX, and tWHQX. FIGURE 5. Output load circuit. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 36 Case 9 FIGURE 6. Radiation exposure circuit. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 37 Case X NOTES: 1. VCC = 5.5 V dc (10%). 2. Inputs = VCC. 3. Outputs are open. 4. CE2 = VSS = 0 V dc. 5. Memory background shall be solid ones. FIGURE 6. Radiation exposure circuit - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 38 Case 8 NOTES: 1. Power pins connected to V1. 2. The absolute voltage ratings of 1.3 shall not be exceeded. 3. ESD precautions shall be followed. 4. The pattern in the memory array will be checkerboard for irradiation and accelerated aging tests. 5. Pin conditions: During irradiation and accelerator aging tests. WE = VCC CE 1 = GND CE2 = VCC V1 = VCC A0 - A12 = GND R = 10 k 10 percent VCC = 5.0 V OE = VCC I/O1 - I/O8 = FLOATING C = 0.1 F 10 percent FIGURE 6. Radiation exposure circuit - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 39 TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/ Line no. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, TM 5005, table I) Device class M Device class Q Device class V 1, 7, 9 or 1,2,8A,10 1, 7, 9 or 1,2,8A,10 Not required Required 1 Interim electrical parameters (see 4.2) 2 Static burn-in I and II (method 1015) 3 Same as line 1 4 Dynamic burn-in (method 1015) 5 Same as line 1 6 Final electrical parameters 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 7 Group A test requirements (see 4.4) 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 8 Group C end-point electrical parameters (see 4.4) 2, 3, 7, 8A, 8B 1, 2, 3, 7, 8A, 8B 1, 2, 3, 7, 8A, 8B, 9, 10, 11 9 Group D end-point electrical parameters (see 4.4) 2, 3, 7, 8A, 8B 2, 3, 7, 8A, 8B 2, 3, 7, 8A, 8B 10 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 Not required 1*, 7* Required Required Required 1*, 7* 1/ Blank spaces indicate tests are not applicable. 2/ Any or all subgroups may be combined when using high-speed testers. 3/ Subgroups 7 and 8 functional tests shall verify the truth table. 4/ * indicates PDA applies to subgroup 1 and 7. 5/ ** see 4.4.1e. 6/ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters (see line 1). 7/ See 4.4.1d. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 40 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. c. Interim and final electrical parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-PRF-38535 permits alternate in-line control testing.. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted. c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. These tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M, procedures and circuits shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 41 Table IIB. Delta limits at +25C. Test 1/ All device types ICC3 standby + 10% of specified value in table IA IIH, IIL + 10% of specified value in table IA IOHZ, IOLZ + 10% of specified value in table IA 1/ The above parameter shall be recorded before and after the required burn-in and life tests to determine the delta . e. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at TA = +25C 5C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019 and as specified herein. 4.4.4.1.1 Accelerated aging test. Accelerated aging shall be performed on all devices requiring a RHA level greater than 5K rads(Si). The post-anneal end point electrical parameter limits shall be as specified in table IA herein and shall be the preirradiation end point electrical parameter limit at 25C 5C. Testing shall be performed at initial qualification and after any design or process changes which may effect the RHA response of the device. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 42 4.4.4.2 Single event phenomena (SEP). SEP testing shall be required on class V devices. SEP testing shall be performed on the SEC or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latch-up characteristics. Test four devices with zero failures. ASTM standard F1192 may be used as a guideline when performing SEP testing. The test conditions for SEP are as follows: a. The ion beam angle of incidence shall be normal to the die surface and 60 to the normal, inclusive (i.e., 0 angle 60). No shadowing of the ion beam due to fixturing or package related effects is allowed. b. The fluence shall be greater than 100 errors or 107 ions/cm2. c. The flux shall be between 102 and 105 ion/cm2/s. The cross section shall be verified to be flux independent by measuring the cross section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be 20 microns in silicon. e. The test temperature shall be +25C and the maximum rated operating temperature 10C. f. Bias conditions shall be VCC = 4.5 V dc for the upset measurements and VCC = 5.5 V dc for the latch-up measurements. g. For SEP test limits, see table IB herein. 4.4.4.3 Additional information. When specified in the purchase order or contract, a copy of the following additional data shall be supplied. a. RHA upset levels. b. Test conditions (SEP). c. Number of upsets (SEP). d. Number of transients (SEP). e. Occurrence of latch-up (SEP). 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA , Columbus, Ohio 43218-3990, or telephone (614) 692-0540. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 43 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. CIN COUT ---------------------------------------------------------Input and bidirectional output, terminal-to-GND capacitance. GND ---------------------------------------------------------Ground zero voltage potential. ICC -----------------------------------------------------------Supply current. IIL -------------------------------------------------------------Input current low I ---------------------------------------------------------------Input current high TC ------------------------------------------------------------Case temperature. TA -----------------------------------------------------------Ambient temperature VCC ----------------------------------------------------------Positive supply voltage. VIC -----------------------------------------------------------Positive input clamp voltage O/V -----------------------------------------------------------Latch-up over-voltage O/I ------------------------------------------------------------Latch-up over-current 6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never provides data later than that time. t X X X X Signal name from which interval is defined Transition direction for first signal Signal name to which interval is defined Transition direction for second signal a. Signal definitions: b. Transition definitions: A = Address D = Data in Q = Data out W = Write enable E = Chip enable O = Output enable L = Address latch (device 44 and 45 only) H = Transition to high L = Transition to low V = Transition to valid X = Transition to invalid or don't care Z = Transition to off (high impedance) 6.5.2 Waveforms. Waveform symbol Input Output MUST BE VALID WILL BE VALID CHANGE FROM H TO L WILL CHANGE FROM H TO L CHANGE FROM L TO H WILL CHANGE FROM L TO H DON'T CARE ANY CHANGE PERMITTED CHANGING STATE UNKNOWN HIGH IMPEDANCE STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 44 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime -VA. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 45 APPENDIX A FUNCTIONAL ALGORITHMS A.1 SCOPE A.1.1 Scope. Functional algorithms are test patterns which define the exact sequence of events used to verify proper operation of a random access memory (RAM). Each algorithm serves a specific purpose for the testing of the device. It is understood that all manufacturers do not have the same test equipment; therefore, it becomes the responsibility of each manufacturer to guarantee that the test patterns described herein are followed as closely as possible, or equivalent patterns be used that serve the same purpose. Each manufacturer should demonstrate that this condition will be met. Algorithms shall be applied to the device in a topologically pure fashion. This appendix is a mandatory part of the specification. The information contained herein is intended for compliance. A.2. APPLICABLE DOCUMENTS. This section is not applicable to this appendix. A.3. ALGORITHMS A.3.1 Algorithm A (pattern 1). A.3.1.1 Checkerboard, checkerboard-bar. Step 1. Load memory with a checkerboard data pattern by incrementing from location 0 to maximum. Step 2. Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum. Step 3. Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum. Step 4. Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum. A.3.2 Algorithm B (pattern 2). A.3.2.1 March. Step 1. Load memory with background data, incrementing from minimum to maximum address locations (All "0's"). Step 2. Read data in location 0. Step 3. Write complement data to location 0. Step 4. Read complement data in location 0. Step 5. Repeat steps 2 through 4 incrementing X-fast sequentially, for each location in the array. Step 6. Read complement data in maximum address location. Step 7. Write data to maximum address location. Step 8. Read data in maximum address location. Step 9. Repeat steps 6 through 8 decrementing X-fast sequentially for each location in the array. Step 10. Read data in location 0. Step 11. Write complement data to location 0. Step 12. Read complement data in location 0. Step 13. Repeat steps 10 through 12 decrementing X-fast sequentially for each location in the array. Step 14. Read complement data in maximum address location. Step 15. Write data to maximum address location. Step 16. Read data in maximum address location. Step 17. Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array. Step 18. Read background data from memory, decrementing X-fast from maximum to minimum address locations. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 46 APPENDIX A - Continued. A.3.3 Algorithm C (pattern 3). A.3.3.1 XY March. Step 1. Load memory with background data, incrementing from minimum to maximum address locations (All "0's"). Step 2. Read data in location 0. Step 3. Write complement data to location 0. Step 4. Read complement data in location 0. Step 5. Repeat steps 2 through 4 incrementing Y-fast sequentially, for each location in the array. Step 6. Read complement data in maximum address location. Step 7. Write data to maximum address location. Step 8. Read data in maximum address location. Step 9. Repeat steps 6 through 8 decrementing X-fast sequentially for each location in the array. Step 10. Read data in location 0. Step 11. Write complement data to location 0. Step 12. Read complement data in location 0. Step 13. Repeat steps 10 through 12 decrementing Y-fast sequentially for each location in the array. Step 14. Read complement data in maximum address location. Step 15. Write data to maximum address location. Step 16. Read data in maximum address location. Step 17. Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array. Step 18. Read background data from memory, decrementing Y-fast from maximum to minimum address locations. A.3.4 Algorithm D (pattern 4). A.3.4.1 CEDES - CE deselect checkerboard, checkerboard-bar. Step 1. Load memory with a checkerboard data pattern by incrementing from location 0 to maximum. Step 2. Deselect device, attempt to load memory with checkerboard-bar data pattern by incrementing from location 0 to maximum. Step 3. Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum. Step 4. Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum. Step 5. Deselect device, attempt to load memory with checkerboard data pattern by incrementing from location 0 to maximum. Step 6. Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 47 APPENDIX B SUBSTITUTION DATA B.1 SCOPE B.1.1 Scope. This appendix contains the PIN substitution information to support the one part-one part number system. SMD 5962-38294 supersedes SMDs 5962-85525 and 5962-89691. For new designs, after the date of this document the new PIN shall be used in lieu of the old PIN. For existing designs prior to the date of this document the new PIN can be used in lieu of the old PIN. This appendix is a mandatory part of the specification. The information contained herein is intended for compliance. The PIN substitution data shall be as follows: B.2 APPLICABLE DOCUMENTS. This section is not applicable to this appendix. B.3 SUBSTITUTION DATA New PIN 5962-3829401MXX 5962-3829401MYX 5962-3829402MXX 5962-3829402MYX 5962-3829403MXX 5962-3829403MYX 5962-3829404MXX 5962-3829404MYX 5962-3829405MXX 5962-3829405MYX 5962-3829406MXX 5962-3829406MYX 5962-3829407MXX 5962-3829407MYX 5962-3829408MXX 5962-3829408MYX 5962-3829408MZX 5962-3829408MTX 5962-3829409MXX 5962-3829409MYX 5962-3829409MZX 5962-3829409MTX 5962-3829410MXX 5962-3829410MYX 5962-3829410MZX 5962-3829410MTX 5962-3829411MXX 5962-3829411MYX 5962-3829411MZX 5962-3829411MTX 5962-3829412MXX 5962-3829412MYX 5962-3829412MZX 5962-3829412MTX Old PIN 5962-8552501XX 5962-8552501YX 5962-8552513XX 5962-8552513YX 5962-8552502XX 5962-8552502YX 5962-8552512XX 5962-8552512YX 5962-8552503XX 5962-8552503YX 5962-8552511XX 5962-8552511YX 5962-8552504XX 5962-8552504YX 5962-8552510XX 5962-8552510YX 5962-8552510ZX 5962-8552510TX 5962-8552505XX 5962-8552505YX 5962-8552505ZX 5962-8552505TX 5962-8552509XX 5962-8552509YX 5962-8552509ZX 5962-8552509TX 5962-8552506XX 5962-8552506YX 5962-8552506ZX 5962-8552506TX 5962-8552508XX 5962-8552508YX 5962-8552508ZX 5962-8552508TX New PIN || || || || || || || || || || || || || || || || || || || || || || || || || || || || || || || || || || Old PIN 5962-3829413MXX 5962-3829413MYX 5962-3829413MZX 5962-3829413MTX 5962-3829414MXX 5962-3829414MZX 5962-3829414MTX 5962-3829415MXX 5962-3829415MYX 5962-3829415MZX 5962-3829415MUX 5962-3829415MTX 5962-3829417MXX 5962-3829417MYX 5962-3829417MZX 5962-3829417MUX 5962-3829417MTX 5962-3829419MXX 5962-3829419MYX 5962-3829419MZX 5962-3829419MUX 5962-3829419MTX 5962-3829422MUX 5962-3829423MUX 5962-3829424MUX 5962-3829425MUX 5962-3829426MUX 5962-3829427MUX 5962-3829428MUX 5962-3829429MUX 5962-3829430MUX 1/ 5962-8552507XX 5962-8552507YX 5962-8552507ZX 5962-8552507TX 5962-8969101XX 5962-8969101ZX 5962-8969101TX 5962-8969102XX 5962-8969102YX 5962-8969102ZX 5962-8969102NX 5962-8969102TX 5962-8969104XX 5962-8969104YX 5962-8969104ZX 5962-8969104NX 5962-8969104TX 5962-8969106XX 5962-8969106YX 5962-8969106ZX 5962-8969106NX 5962-8969106TX 5962-8552510UX 5962-8552505UX 5962-8552509UX 5962-8552506UX 5962-8552508UX 5962-8552507UX 5962-8969101UX 5962-8969102UX 5962-8969104UX 5962-8969106UX 1/ Due to erroneous data received for document 5962-89691, there is no substitution part. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-38294 A REVISION LEVEL J SHEET 48 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 10-11-05 Approved sources of supply for SMD 5962-38294 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information bulletin is superseded by the next dated revision of MIL-HDBK103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-3829401MXA 5962-3829401MYA 5962-3829401MZA 5962-3829401MTA 5962-3829402MXA 5962-3829402MYA 5962-3829402MZA 5962-3829402MTA 5962-3829403MXA 5962-3829403MYA 5962-3829403MZA 5962-3829403MTA 5962-3829404MXA Vendor CAGE number 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ Vendor similar PIN 2/ P4C164-150CWMB IDT7164S150DB EDI8810H150DB AM99C88-15/BXC IDT7164S150L32B EDI8810H150LB AM99C88-15/BUC IDT7164S150TCB IDT7164S150XEB P4C164L-120CWMB IDT7164L120DB EDI8810H120DB IDT7164L120L32B EDI8810H120LB IDT7164L120TCB IDT7164L120XEB P4C164-120CWMB IDT7164S120DB EDI8810H120DB P4C164L-120DWMB AM99C88-12/BXC IDT7164S120L32B EDI8810H120LB AM99C88-12/BUC IDT7164S120TCB IDT7164S120XEB P4C164L-100CWMB IDT7164L100DB EDI8810H100DB P4C164L-100DWMB See footnotes at end of list. 1 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829404MYA 5962-3829404MZA 5962-3829404MTA 5962-3829405MXA 5962-3829405MYA 5962-3829405MZA 5962-3829405MTA 5962-3829406MXA 5962-3829406MYA 5962-3829406MZA 5962-3829406MUA 5962-3829406MTA 5962-3829406MMA 5962-3829407MXA Vendor CAGE number 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 61772 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 61772 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 61772 3/ 3DTT2 3/ 3/ 3/ 3/ 0C7V7 Vendor similar PIN 2/ IDT7164L100L32B EDI8810H100LB IDT7164L100TCB IDT7164L100XEB P4C164-100CWMB IDT7164S100DB EDI8810H100DB P4C164-100DWMB AM99C88-10/BXC IDT7164S100L32B EDI8810H100LB AM99C88-10/BUC IDT7164S100TCB IDT7164S100XEB P4C164L-70CWMB IDT7164L70DB L7C185IMB70 EDI8810H70DB P4C164L-70DWMB IDT7164L70L32B EDI8810H-70LB L7C185TMB70 IMS1630W-70LM MT5C6408ECW-70L IDT7164L70TDB MT5C6408C-70L L7C185CMB70 L7C185KMB70 MT5C6408EC-70L IDT7164L70XEB L7C185MMB70 MT5C6408F-70L 6164-70/BXAJC IDT7164S70DB EDI8810H70DB P4C164-70DWMB MC5164-70/B AM99C88-70/BXC 6264-70/BXAJC L7C185IMB70 QP7C186A-70DMB See footnotes at end of list. 2 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829407MYA 5962-3829407MZA 5962-3829407MTA 5962-3829407MUA 5962-3829407MMA 5962-3829408MXA 5962-3829408MYA 5962-3829408MZA 5962-3829408MUA 5962-3829408MMA 5962-3829408MTA Vendor CAGE number 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 0C7V7 3/ 3/ 3DTT2 0C7V7 61772 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3/ 61772 3DTT2 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 61772 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3/ 3/ 3/ Vendor similar PIN 2/ MR5164-70/B 6164-70M/BUAJC IDT7164S70L32B EDI8810H70LB MT5C6408ECW-70 AM99C88-70/BUC L7C185TMB70 P4C164-70L32MB QP7C186A-70LMB MT5C6408C-70 L7C185CMB700 P4C164-70DMB QP7C185A-70DMB IDT7164S70TDB P4C164-70FMB IDT7164S70XEB L7C185MMB70 P4C164-70LSMB MT5C6408EC-70 L7C185KMB70 P4C164-70FSMB MT5C6408F-70 MF5164-70/B EDI8810H55DB IDT7164L55DB P4C164L-55DWMB L7C185IMB55 P4C164L-55L32MB EDI8810H55LB IDT7164L55L32B MT5C6408ECW-55L L7C185TMB55 P4C164L-55DMB P4C164L-55DMB MT5C6408C-55L IDT7164L55TDB L7C185CMB55 P4C164L-55LSMB MT5C6408EC-55L L7C185KMB55 P4C164L-55FSMB MT5C6408F-55L P4C164L-55FMB IDT7164L55XEB P4C164L-55FMB CY7C185L-55KMB L7C185MMB55 See footnotes at end of list. 3 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829409MXA 5962-3829409MYA 5962-3829409MYC 5962-3829409MZA 5962-3829409MUA 5962-3829409MMA 5962-3829409MTA 5962-3829410MXA 5962-3829410MYA Vendor CAGE number 61772 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3DTT2 3/ 0C7V7 3/ 3/ 3/ 3/ 3DTT2 61772 3/ 3/ 3/ 0C7V7 3DTT2 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 61772 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ Vendor similar PIN 2/ IDT7164S55DB 6164-55/BXAJC EDI8810H55DB CY7C186A-55DMB P4C164-55DWMB HM1E-65764N/883 6264-55/BXAJC L7C185IMB55 QP7C186A-55DMB IDT7164S55L32B 6164-55M/BUAJC EDI8810H55LB CY7C186A-55LMB P4C164-55L32MB L7C185TMB55 QP7C186A-55LMB MT5C6408ECW-55 HM4-65764N/883 CY7C185A-55DMB MT5C6408C-55 P4C164-55DMB IDT7164S55TDB HM1-65764N/883 EDI8808CB55QB L7C185CMB55 QP7C185A-55DMB P4C164-55LSMB MT5C6408EC-55 L7C185KMB55 P4C164-55FSMB MT5C6408F-55 P4C164-55FMB CY7C185A-55KMB IDT7164S55XEB L7C185MMB55 P4C164-55FMB 62L64-45BXAJC IDT7164L45DB MC5164L-45/B P4C164L-45DWMB CY7C186L-45DMB L7C185IMB45 MR5164L-45/B IDT7164L45L32B MT5C6408ECW-45L L7C185TMB45 See footnotes at end of list. 4 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829410MZA 5962-3829410MUA 5962-3829410MMA 5962-3829410MTA 5962-3829411MXA 5962-3829411MYA 5962-3829411MYC 5962-3829411MZA 5962-3829411MUA 5962-3829411MMA Vendor CAGE number 3/ 3DTT2 61772 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3/ 3/ 3/ 61772 3/ 3DTT2 3/ 3/ 0C7V7 0C7V7 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3DTT2 61772 3/ 3/ 0C7V7 3/ 3/ 3/ 3DTT2 3/ 3/ 3DTT2 Vendor similar PIN 2/ MT5C6408C-45L P4C164L-45DMB IDT7164L45TDB CY7C185L-45DMB L7C185CMB45 P4C164L-45LSMB MT5C6408EC-45L L7C185KMB45 MT5C6408F-45L MF5164L-45/B P4C164L-45FSMB IDT7164L45XEB P4C164L-45FMB CY7C185L-45KMB L7C185MMB45 MC5164-45/B 6264-45/BXAJC IDT7164S45DB CY7C186A-45DMB P4C164-45DWMB HM1E-65764M/883 L7C185IMB45 QP7C186A-45DMB QP7C186A-45LMB MR5164-45/B IDT7164S45L32B MT5C6408ECW-45 CY7C186A-45LMB L7C185TMB45 P4C164-45L32MB HM4-65764M/883 CY7C185A-45DMB MT5C6408C-45 P4C164-45DMB IDT7164S45TDB HM1-65764M/883 EDI8808CB45QB QP7C185A-45DMB L7C185CMB45 MT5C6408EC-45 L7C185KMB45 P4C164-45LSMB MT5C6408F-45 MF5164-45/B P4C164-45FSMB See footnotes at end of list. 5 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829411MTA 5962-3829412MXA 5962-3829412MYA 5962-3829412MZA 5962-3829412MUA 5962-3829412MMA 5962-3829412MTA 5962-3829413MXA 5962-3829413MYA 5962-3829413MYC Vendor CAGE number 3/ 3/ 3/ 3/ 3DTT2 61772 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 61772 3/ 3/ 3DTT2 3DTT2 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3/ 3/ 3/ 61772 3/ 3DTT2 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3/ 3DTT2 0C7V7 3/ Vendor similar PIN 2/ CY7C185A-45KMB MT5C6408F-45 L7C185MMB45 IDT7164S45XEB P4C164-45FMB IDT7164L35DB MC5164L-35/B P4C164L-35DWMB 62L64-35/BXAJC CY7C186L-35DMB L7C185IMB35 MR5164L-35/B IDT7164L35L32B MT5C6408ECW-35L L7C185TMB35 P4C164L-35L32MB IDT7164L35TDB MT5C6408C-35L L7C185CMB35 P4C164L-35DMB P4C164L-35LSMB MT5C6408EC-35L L7C185KMB35 CY7C185L-35DMB MT5C6408F-35L MF5164L-35/B P4C164L-35FSMB IDT7164L35XEB P4C164L-35FMB CY7C185L-35KMB L7C185MMB35 MC5164-35/B 6264-35/BXAJC IDT7164S35DB CY7C186A-35DMB P4C164-35DWMB HM1E-65764K/883 L7C185IMB35 QP7C186A-35DMB MR5164-35/B IDT7164S35L32B CY7C186A-35LMB MT5C6408ECW-35 L7C185TMB35 P4C164-35L32MB QP7C186A-35LMB HM4-65764K/883 See footnotes at end of list. 6 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829413MZA 5962-3829413MUA 5962-3829413MMA 5962-3829413MTA 5962-3829414MXA 5962-3829414MYA 5962-3829414MZA 5962-3829414MUA 5962-3829414MMA 5962-3829414MTA Vendor CAGE number 3/ 3/ 3DTT2 61772 3/ 3/ 3/ 0C7V7 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 61772 3DTT2 3/ 3/ 3/ 3/ 3/ 3DTT2 3DTT2 61772 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3DTT2 Vendor similar PIN 2/ CY7C185A-35DMB MT5C6408C-35 P4C164-35DMB IDT7164S35TDB HM1-65764K/883 L7C185CMB35 EDI8808CB35QB QP7C185A-35DMB MT5C6408EC-35 L7C185KMB35 P4C164-35LSMB MT5C6408F-35 MF5164-35/B P4C164-35FSMB CY7C185A-35KMB IDT7164S35XEB P4C164-35FMB L7C185MMB35 MC5164L-25/B IDT7164L25DB P4C164L-25DWMB L7C185HMB or IMB25 MR5164L-25/B IDT7164L25L32B MT5C6408ECW-25L L7C185TMB25 P4C164L-25L32MB P4C164L-25DMB IDT7164L25TDB MT5C6408C-25L L7C185DMB CMB25 MT5C6408EC-25L L7C185KMB25 P4C164-25LSMB MF5164L-25/B MT5C6408F-25L L7C185FMB25 P4C164L-25FSMB P4C164L-25FMB IDT7164L25XEB L7C185MMB25 P4C164-25FMB See footnotes at end of list. 7 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829415MXA 5962-3829415MYA 5962-3829415MYC 5962-3829415MZA 5962-3829415MUA 5962-3829415MMA 5962-3829415MTA 5962-3829416MXA 5962-3829416MYA 5962-3829416MZA Vendor CAGE number 3DTT2 3/ 3/ 61772 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3DTT2 0C7V7 3/ 3/ 3DTT2 3/ 3/ 61772 3/ 3/ 3/ 0C7V7 3/ 3/ 3DTT2 3/ 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3/ 61772 3/ 3DTT2 61772 3/ 3/ 3DTT2 61772 3/ 3/ 3DTT2 Vendor similar PIN 2/ P4C164-25DWMB CY7C186A-25DMB MC5164-25/B IDT7164S25DB HM1E-65764H/883 L7C185HMB or IMB25 QP7C186A-25DMB MR5164-25/B MT5C6408ECW-25 CY7C186A-25LMB IDT7164S25L32B P4C164-25L32MB QP7C186A-25LMB L7C185TMB25 HM4-65764H/883 P4C164-25DMB MT5C6408C-25 CY7C185A-25DMB IDT7164S25TDB HM1-65764H/883 L7C185DMB or CMB25 EDI8808CB25QB QP7C185A-25DMB MT5C6408EC-25 L7C185KMB25 P4C164-25LSMB MT5C6408F-25 MF5164-25/B L7C185FMB25 P4C164-25FSMB CY7C185A-25KMB P4C164-25FMB IDT7164S25XEB L7C185MMB25 IDT7164L20DB L7C185HMB or IMB25 P4C164L-20DWMB IDT7164L20L32B MT5C6408ECW-20L L7C185TMB20 P4C164L-20L32MB IDT7164L20TDB MT5C6408C-20L L7C185DMB or CMB20 P4C164L-20DMB See footnotes at end of list. 8 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829416MUA 5962-3829416MMA 5962-3829416MTA 5962-3829417MXA 5962-3829417MYA 5962-3829417MYC 5962-3829417MZA 5962-3829417MUA 5962-3829417MMA 5962-3829417MTA 5962-3829418MXA Vendor CAGE number 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3DTT2 3/ 3/ 3/ 3DTT2 61772 3/ 3/ 0C7V7 3/ 3/ 3/ 0C7V7 3DTT2 3/ 3/ 3DTT2 3/ 3/ 61772 3/ 3/ 0C7V7 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3DTT2 3/ 3/ 3/ 3/ 3DTT2 Vendor similar PIN 2/ MT5C6408EC-20L L7C185KMB20 P4C164L-20LSMB MT5C6408F-20L L7C185FMB20 P4C164L-20FSMB P4C164L-20FMB IDT7164L20XEB L7C185MMB20 CY7C186A-20DMB P4C164-20DWMB IDT7164S20DB HM1E-65764F/883 L7C185HMB or IMB20 QP7C186A-20DMB MT5C6408ECW-20 CY7C186A-20LMB IDT7164S20L32B QP7C186A-20LMB P4C164-20L32MB L7C185TMB20 HM4-65764F/883 P4C164-20DMB MT5C6408C-20 CY7C185A-20DMB IDT7164S20TDB HM1-65764F/883 L7C185DMB or CMB20 QP7C185A-20DMB MT5C6408EC-20 L7C185KMB20 P4C164-20LSMB MT5C6408F-20 L7C185FMB20 P4C164-20FSMB P4C164-20FMB CY7C185A-20KMB IDT7164S20XEB L7C185MMB20 L7C185HMB or IMB15 P4C164L-15DWMB See footnotes at end of list. 9 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829418MYA 5962-3829418MZA 5962-3829418MUA 5962-3829418MMA 5962-3829418MTA 5962-3829419MXA 5962-3829419MYA 5962-3829419MZA 5962-3829419MUA 5962-3829419MMA 5962-3829419MTA 5962-3829420MXA 5962-3829420MYA 5962-3829420MZA Vendor CAGE number 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3DTT2 3DTT2 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ Vendor similar PIN 2/ MT5C6408ECW-15L L7C185TMB15 P4C164L-15L32MB MT5C6408C-15L L7C185DMB or CMB15 P4C164L-15DMB MT5C6408EC-15L L7C185KMB15 P4C164L-15LMB MT5C6408F-15L L7C185FMB15 P4C164L-15FSMB L7C185MMB15 P4C164L-15FMB P4C164-15DWMB L7C185HMB or IMB15 CY7C186-15DMB MT5C6408ECW-15 L7C185TMB15 P4C164-15L32MB MT5C6408C-15 L7C185DMB or CMB15 P4C164-15DMB MT5C6408EC-15 L7C185KMB15 P4C164-15LSMB MT5C6408F-15 L7C185FMB15 P4C164-15FSMB P4C164-15FMB L7C185MMB15 CY7C186-15KMB L7C185IMB70 L7C185TMB70 MT5C6408ECW -70L L7C185CMB70 MT5C6408C -70L See footnotes at end of list. 10 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Vendor CAGE number 5962-3829420MUA 3/ 3/ 3/ 5962-3829420MMA 3/ 5962-3829420MTA 3/ 5962-3829421MXA 3/ 3/ 5962-3829421MYA 3/ 3/ 5962-3829421MZA 3/ 3/ 5962-3829421MUA 3DTT2 3/ 3/ 0C7V7 5962-3829421MTA 3/ 5962-3829421MMA 3/ 5962-3829422MXA 3/ 3/ 5962-3829422MYA 3/ 3/ 5962-3829422MZA 3/ 3/ 5962-3829422MUA 3DTT2 3/ 3/ 5962-3829422MTA 3/ 5962-3829422MMA 3/ 5962-3829423MXA 3/ 3/ 5962-3829423MYA 3/ 3/ See footnotes at end of list. Standard microcircuit drawing PIN 1/ Vendor similar PIN 2/ P4C164L-70LMB MT5C6408EC -70L L7C185KMB70 MT5C6408F-70L L7C185MMB70 L7C185IMB70 P4C164-70DWMB L7C185TMB70 MT5C6408ECW -70 L7C185CMB70 MT5C6408C -70 P4C164-70LMB MT5C6408EC-70 L7C185KMB70 QP7C185A-70LMB L7C185MMB70 MT5C6408F-70 L7C185IMB55 P4C164L-55DWMB L7C185TMB55 MT5C6408ECW -55L L7C185CMB55 MT5C6408C -55L P4C164L-55LMB MT5C6408EC-55L L7C185KMB55 L7C185MMB55 MT5C6408F-55L L7C185IMB55 P4C164-55DWMB L7C185TMB55 MT5C6408ECW-55 11 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829423MZA 5962-3829423MUA 5962-3829423MTA 5962-3829423MMA 5962-3829424MXA 5962-3829424MYA 5962-3829424MZA 5962-3829424MUA 5962-3829424MTA 5962-3829424MMA 5962-3829425MXA 5962-3829425MYA 5962-3829425MZA 5962-3829425MUA 5962-3829425MTA Vendor CAGE number 3/ 3/ 3DTT2 3/ 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 0C7V7 3/ See footnotes at end of list. 12 of 22 Vendor similar PIN 2/ L7C185CMB55 MT5C6408C-55 P4C164-55LMB MT5C6408EC-55 L7C185KMB55 CY7C185A-55LMB QP7C185A-55LMB L7C185MMB55 MT5C6408F-55 L7C185IMB45 P4C164L-45DWMB L7C185TMB45 MT5C6408ECW-45L L7C185CMB45 MT5C6408C-45L P4C164L-45LMB CY7C185L-45LMB MT5C6408EC-45L L7C185KMB45 L7C185MMB45 MT5C6408F-45L L7C185IMB45 P4C164-45DWMB L7C185TMB45 MT5C6408ECW-45 EDI8808CB45QB L7C185CMB45 MT5C6408C-45 P4C164-45LMB CY7C185A-45LMB L7C185KMB45 MT5C6408EC-45 QP7C185A-45LMB L7C185MMB45 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829425MMA 5962-3829426MXA 5962-3829426MYA 5962-3829426MZA 5962-3829426MUA 5962-3829426MTA 5962-3829426MMA 5962-3829427MXA 5962-3829427MYA 5962-3829427MZA 5962-3829427MUA 5962-3829427MTA 5962-3829427MMA 5962-3829428MXA 5962-3829428MYA 5962-3829428MZA Vendor CAGE number 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ See footnotes at end of list. 13 of 22 Vendor similar PIN 2/ MT5C6408F-45 L7C185IMB35 P4C164L-35DWMB L7C185TMB35 MT5C6408ECW-35L L7C185CMB35 MT5C6408C-35L P4C164L-35LMB CY7C185L-35LMB L7C185KMB35 MT5C6408EC-35L L7C185MMB35 MT5C6408F-35L L7C185IMB35 P4C164-35DWMB L7C185TMB35 MT5C6408ECW-35 EDI8808CB35QB L7C185CMB35 MT5C6408C-35 CY7C185A-35LMB P4C164-35LMB MT5C6408EC-35 L7C185KMB35 QP7C185A-35LMB L7C185MMB35 MT5C6408F-35 L7C185HMB or IMB25 P4C164L-25DWMB L7C185TMB25 MT5C6408ECW-25L L7C185DMB or CMB25 MT5C6408C-25L STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829428MUA 5962-3829428MMA 5962-3829428MTA 5962-3829429MXA 5962-3829429MYA 5962-3829429MZA 5962-3829429MUA 5962-3829429MMA 5962-3829429MTA 5962-3829430MXA 5962-3829430MYA 5962-3829430MZA 5962-3829430MUA Vendor CAGE number 3DTT2 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 0C7V7 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 0C7V7 See footnotes at end of list. 14 of 22 Vendor similar PIN 2/ P4C164L-25LMB L7C185KMB25 MT5C6408EC-25L L7C185FMB25 MT5C6408F-25L L7C185MMB25 L7C185HMB or IMB25 P4C164-25DWMB L7C185TMB25 MT5C6408ECW-25 L7C185DMB or CMB25 EDI8808CB25QB MT5C6408C-25 CY7C185A-25LMB P4C164-25LMB L7C185KMB25 MT5C6408EC-25 QP7C185A-25LMB L7C185FMB25 MT5C6408F-25 L7C185MMB25 L7C185HMB or IMB20 P4C164-20DWMB L7C185TMB20 MT5C6408ECW-20 L7C185DMB or CMB20 EDI8808CB25QB MT5C6408C-20 CY7C185A-20LMB P4C164-20LMB L7C185KMB20 MT5C6408EC-20 QP7C185A-20LMB STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829430MMA 5962-3829430MTA 5962-3829431MXA 5962-3829431MYA 5962-3829432MXA 5962-3829432MYA 5962-3829433MXA 5962-3829433MYA 5962-3829433MZA 5962-3829433MUA 5962-3829433MMA 5962-3829433MTA 5962-3829434MXA 5962-3829434MYA 5962-3829434MZA Vendor CAGE number 3/ 3/ 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3/ 3/ 3DTT2 3/ 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 3/ 3DTT2 See footnotes at end of list. 15 of 22 Vendor similar PIN 2/ L7C185FMB20 MT5C6408F-20 L7C185MMB20 EDI8810L100DB P4C164L-100CWMB EDI8810L100LB EDI8810L70DB P4C164L-70CWMB EDI8810L70LB L7C185IMB55 EDI8810L55DB P4C164L-55DWMB L7C185TMB55 EDI8810L55LB P4C164L-55L32MB L7C185CMB55 P4C164L-55DMB L7C185KMB55 P4C164L-55LSMB 7C185-55 P4C164L-55FSMB L7C185MMB55 P4C164L-55FMB L7C185IMB45 P4C164L-45DWMB L7C185TMB45 P4C164L-45L32MB L7C185CMB45 P4C164L-45DMB STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard Vendor microcircuit drawing CAGE PIN 1/ number 5962-3829434MUA 3/ 3DTT2 5962-3829434MMA 3/ 3DTT2 5962-3829434MTA 3/ 3DTT2 5962-3829435MXA 3DTT2 5962-3829435*- 3/ 5962H3829435BNA 3/ 5962H3829435BNC 3/ 5962H3829435BXA 3/ 5962H3829435BXC 3/ 5962H3829435SNA 3/ 5962H3829435SNC 3/ 5962H3829435SXA 3/ 5962H3829435SXC 3/ 5962-3829436MXA 3DTT2 5962-3829436*- 3/ 5962H3829436BNA 3/ 5962H3829436BNC 3/ 5962H3829436BXA 3/ 5962H3829436BXC 3/ 5962H3829436SNA 3/ 5962H3829436SNC 3/ 5962H3829436SXA 3/ 5962H3829436SXC 3/ 5962-3829437MXA 3DTT2 See footnotes at end of list. 16 of 22 Vendor similar PIN 2/ L7C185KMB45 P4C164L-45LSMB 7C185-45 P4C164L-45FSMB L7C185MMB45 P4C164L-45FMB P4C164L-85CWMB UT6716485 UT6716485 UT6716485 UT6716485 UT6716485 UT6716485 UT6716485 UT6716485 UT6716485 P4C164L-70CWMB MK48H64 UT6716470 UT6716470 UT6716470 UT6716470 UT6716470 UT6716470 UT6716470 UT6716470 P4C164L-55CWMB STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829437*-5962H3829437BNA 5962H3829437BNC 5962H3829437BXA 5962H3829437BXC 5962H3829437SNA 5962H3829437SXA 5962H3829437SXC 5962H3829438V9C 5962H3829438Q9C 5962H3829439*-5962H3829440V9C 5962H3829440Q9C 5962H3829441*-5962H3829442V9C 5962H3829442Q9C 5962H3829443V9C 5962H3829443Q9C 5962H3829444V8A 5962H3829444Q8A 5962H3829444V9C 5962H3829444Q9C 5962H3829445V9C 5962H3829445Q9C 5962-3829446MZA 5962-3829446MUA Vendor Vendor CAGE similar number PIN 2/ UT6716455 3/ UT6716455 3/ UT6716455 3/ UT6716455 3/ UT6716455 3/ UT6716455 3/ UT6716455 3/ UT6716455 3/ HC6364/1XVHBT 3/ HC6364/1XQHBT 3/ HC6364 3/ HC6364/1XVHBC 3/ HC6364/1XQHBC 3/ HC6364 3/ 3/ HC6364/1XVHBC 3/ HC6364/1XQHBC 3/ HC6364/1XVHBC 3/ HC6364/1XQHBC 3/ IBM6408C-V55X 3/ IBM6408C-Q55X 3/ LOR6408C-V55Y 3/ LOR6408C-Q55Y 3/ HC6364/2XVHBC 3/ HC6364/2XQHBC MT5C6408C-12L 3/ 3DTT2 P4C164L-12DMB MT5C6408EC-12L 3/ 3DTT2 P4C164L-12LSMB See footnotes at end of list. 17 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard Vendor Vendor microcircuit drawing CAGE similar number PIN 2/ PIN 1/ MT5C6408F-12L 5962-3829446MMA 3/ 3DTT2 P4C164L-12FSMB 5962-3829446MTA 3DTT2 P4C164L-12FMB MT5C6408ECW-12L 5962-3829446MYA 3/ MT5C6408C-12 5962-3829447MZA 3/ 3DTT2 P4C164-12DMB MT5C6408EC-12 5962-3829447MUA 3/ 3DTT2 P4C164-12LSMB MT5C6408F-12 5962-3829447MMA 3/ 3DTT2 P4C164-12FSMB 5962-3829447MTA 3DTT2 P4C164-12FMB MT5C6408ECW-12 5962-3829447MYA 3/ 5962-3829448MXA 3DTT2 P4C164-70DWMB MT5C6408ECW-70 5962-3829448MYA 3/ 3DTT2 P4C164-70L32MB MT5C6408C-70 5962-3829448MZA 3/ 3DTT2 P4C164-70DMB MT5C6408EC-70 5962-3829448MUA 3/ 3DTT2 P4C164-70LSMB MT5C6408F-70 5962-3829448MMA 3/ 3DTT2 P4C164-70FSMB 5962-3829448MTA 3DTT2 P4C164-70FMB 5962-3829449MXA 3DTT2 P4C164L-55DWMB MT5C6408ECW-55L 5962-3829449MYA 3/ 3DTT2 P4C164L-55L32MB MT5C6408C-55L 5962-3829449MZA 3/ 3DTT2 P4C164L-55DMB 5962-3829449MTA 3DTT2 P4C164L-55FMB MT5C6408ECW-55L 5962-3829449MUA 3/ 3DTT2 P4C164L-55LSMB MT5C6408F-55L 5962-3829449MMA 3/ 3DTT2 P4C164L-55FSMB See footnotes at end of list. 18 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard Vendor Vendor microcircuit drawing CAGE similar number PIN 2/ PIN 1/ 5962-3829450MXA 3DTT2 P4C164-55DWMB MT5C6408ECW-55 5962-3829450MYA 3/ 3DTT2 P4C164-55L32MB MT5C6408C-55 5962-3829450MZA 3/ 3DTT2 P4C164-55DMB MT5C6408EC-55 5962-3829450MUA 3/ 3DTT2 P4C164-55LSMB MT5C6408F-55 5962-3829450MMA 3/ 3DTT2 P4C164-55FSMB 5962-3829450MTA 3DTT2 P4C164-55FMB 5962-3829451MXA 3DTT2 P4C164L-45DWMB MT5C6408ECW-45 5962-3829451MYA 3/ 3DTT2 P4C164L-45L32MB MT5C6408C-45 5962-3829451MZA 3/ 3DTT2 P4C164L-45DMB MT5C6408EC-45 5962-3829451MUA 3/ 3DTT2 P4C164L-45LSMB 5962-3829451MMA 0EU86 MT5C6408F-45 3DTT2 P4C164L-45FSMB 5962-3829451MTA 3DTT2 P4C164L-45FMB 5962-3829452MXA 3DTT2 P4C164-45DWMB MT5C6408ECW-45 5962-3829452MYA 3/ 3DTT2 P4C164-45L32MB MT5C6408C-45 5962-3829452MZA 3/ 3DTT2 P4C164-45DMB MT5C6408EC-45 5962-3829452MUA 3/ 3DTT2 P4C164-45LSMB MT5C6408F-45 5962-3829452MMA 3/ 3DTT2 P4C164-45FSMB 5962-3829452MTA 3DTT2 P4C164-45FMB See footnotes at end of list. 19 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829453MXA 5962-3829453MYA 5962-3829453MZA 5962-3829453MUA 5962-3829453MMA 5962-3829453MTA 5962-3829454MXA 5962-3829454MYA 5962-3829454MZA 5962-3829454MUA 5962-3829454MMA 5962-3829454MTA 5962-3829455MXA 5962-3829455MYA 5962-3829455MZA 5962-3829455MUA 5962-3829455MMA 5962-3829455MTA Vendor Vendor CAGE similar number PIN 2/ 3DTT2 P4C164L-35DWMB MT5C6408ECW-35L 3/ 3DTT2 P4C164-35L32MB MT5C6408C-35L 3/ 3DTT2 P4C164L-35DMB MT5C6408EC-35L 3/ 3DTT2 P4C164L-35LSMB MT5C6408F-35L 3/ 3DTT2 P4C164L-35FSMB 3DTT2 P4C164L-35FMB 3DTT2 P4C164-35DWMB MT5C6408ECW-35 3/ 3DTT2 P4C164-35L32MB MT5C6408C-35 3/ 3DTT2 P4C164-35DMB MT5C6408EC-35 3/ 3DTT2 P4C164-35LSMB MT5C6408F-35 3/ 3DTT2 P4C164-35FSMB 3DTT2 P4C164-35FMB 3DTT2 P4C164L-25DWMB MT5C6408ECW-25L 3/ 3DTT2 P4C164L-25L32MB MT5C6408C-25L 3/ 3DTT2 P4C164L-25DMB MT5C6408EC-25L 3/ 3DTT2 P4C164L-25LSMB MT5C6408F-25L 3/ 3DTT2 P4C164L-25FSMB 3DTT2 P4C164L-25FMB See footnotes at end of list. 20 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829456MXA 5962-3829456MYA 5962-3829456MZA 5962-3829456MUA 5962-3829456MMA 5962-3829456MTA 5962-3829457MXA 5962-3829457MYA 5962-3829457MZA 5962-3829457MUA 5962-3829457MMA 5962-3829457MTA 5962-3829458MXA 5962-3829458MYA 5962-3829458MZA 5962-3829458MUA 5962-3829458MMA 5962-3829458MTA Vendor Vendor CAGE similar number PIN 2/ 3DTT2 P4C164-25DWMB MT5C6408ECW-25 3/ 3DTT2 P4C164-25L32MB MT5C6408C-25 3/ 3DTT2 P4C164-25DMB MT5C6408EC-25 3/ 3DTT2 P4C164-25LSMB MT5C6408F-25 3/ 3DTT2 P4C164-25FSMB 3DTT2 P4C164-25FMB 3DTT2 P4C164L-20DWMB MT5C6408ECW-20L 3/ 3DTT2 P4C164L-20L32MB MT5C6408C-20L 3/ 3DTT2 P4C164L-20DMB MT5C6408EC-20L 3/ 3DTT2 P4C164L-20LSMB MT5C6408F-20L 3/ 3DTT2 P4C164L-20FSMB 3DTT2 P4C164L-20FMB 3DTT2 P4C164-20DWMB MT5C6408ECW-20 3/ 3DTT2 P4C164-20L32MB MT5C6408C-20 3/ 3DTT2 P4C164-20DMB MT5C6408EC-20 3/ 3DTT2 P4C164-20LSMB MT5C6408F-20 3/ 3DTT2 P4C164-20FSMB 3DTT2 P4C164-20FMB See footnotes at end of list. 21 of 22 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued Standard microcircuit drawing PIN 1/ 5962-3829459MUA 5962-3829460MUA 5962-3829461MUA 5962-3829462MUA 5962-3829463MUA 5962-3829464MUA 5962-3829465MUA 5962-3829466MUA 5962-3829467MUA 5962-3829468MUA Vendor Vendor CAGE similar number PIN 2/ 3DTT2 P4C164-70LMB 3DTT2 P4C164L-55LMB 3DTT2 P4C164-55LMB 3DTT2 P4C164L-45LMB 3DTT2 P4C164-45LMB 3DTT2 P4C164L-35LMB 3DTT2 P4C164-35LMB 3DTT2 P4C164L-25LMB 3DTT2 P4C164-25LMB 3DTT2 P4C164-20LMB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for the part. If the desired lead finish is not listed, contact the Vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source. Vendor CAGE number Vendor name and address 61772 Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 3DTT2 Pyramid Semiconductor Corp. 1340 Bordeaux Drive Sunnyvale, CA 94089 0C7V7QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. 22 of 22