AUIRF4104 AUIRF4104S AUTOMOTIVE GRADE HEXFET(R) Power MOSFET Features Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Fully Avalanche Rated Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * VDSS RDS(on) typ. max. Description Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and wide variety of other applications. Base part number Package Type AUIRF4104 TO-220 D -Pak 4.3m ID (Silicon Limited) 5.5m 120A ID (Package Limited) 75A D S D G S G D2Pak AUIRF4104S TO-220AB AUIRF4104 G Gate Standard Pack Form Quantity Tube 50 Tube 50 Tape and Reel Left 800 2 AUIRF4104S 40V D Drain S Source Orderable Part Number AUIRF4104 AUIRF4104S AUIRF4104STRL Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25C, unless otherwise specified. Symbol Parameter Max. ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 120 ID @ TC = 100C ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 84 75 IDM PD @TC = 25C Pulsed Drain Current Maximum Power Dissipation 470 140 VGS EAS EAS (tested) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Thermal Resistance Symbol RJC RCS RJA RJA Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient ( PCB Mount, steady state) Units A W 0.95 20 120 220 See Fig.15,16, 12a, 12b W/C V mJ A mJ -55 to + 175 C 300 10 lbf*in (1.1N*m) Typ. Max. Units --- 0.50 --- 1.05 --- 62 40 C/W HEXFET(R) is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2017-09-22 AUIRF4104/S Static @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 40 --- --- V VGS = 0V, ID = 250A --- 0.032 --- V/C Reference to 25C, ID = 1mA --- 4.3 5.5 m VGS = 10V, ID = 75A 2.0 --- 4.0 V VDS = VGS, ID = 250A 63 --- --- S VDS = 10V, ID = 75A --- --- 20 VDS =40V, VGS = 0V A --- --- 250 VDS = 40V,VGS = 0V,TJ =125C --- --- 200 VGS = 20V nA --- --- -200 VGS = -20V Dynamic Electrical Characteristics @ TJ = 25C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time --- --- --- --- --- --- --- 68 21 27 16 130 38 77 100 --- --- --- --- --- --- LD Internal Drain Inductance --- 4.5 --- LS Internal Source Inductance --- 7.5 --- --- --- --- --- --- --- 3000 660 380 2160 560 850 --- --- --- --- --- --- Min. Typ. Max. Units --- --- 75 --- --- 470 --- --- --- --- 23 6.8 1.3 35 10 Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Output Capacitance Coss Effective Output Capacitance Coss eff. Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage Reverse Recovery Time trr Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 75A nC VDS = 32V VGS = 10V VDD = 20V ID = 75A ns RG= 6.8 VGS = 10V Between lead, 6mm (0.25in.) nH from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 pF VGS = 0V, VDS = 1.0V = 1.0MHz VGS = 0V, VDS = 32V = 1.0MHz VGS = 0V, VDS = 0V to 32V Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25C,IS = 75A,VGS = 0V ns TJ = 25C ,IF = 75A, VDD = 20V nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Limited by TJmax , starting TJ = 25C, L = 0.04mH, RG = 25, IAS = 75A, VGS =10V. Part not recommended for use above this value. Pulse width 1.0ms; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. This value determined from sample failure population, TJ = 25C, L = 0.04mH, RG = 25, IAS = 75A, VGS =10V. This is applied to D2Pak When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ of approximately 90C This is only applied to TO-220AB package. Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 75A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) 2 2017-09-22 AUIRF4104/S 1000 1000 VGS VGS TOP 100 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 10 4.5V 1 4.5V 20s PULSE WIDTH Tj = 25C 0.1 0.1 1 10 100 10 0.1 100 20s PULSE WIDTH Tj = 175C 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 120 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current A) 1000 T J = 25C T J = 175C 100 10 VDS = 15V 20s PULSE WIDTH 1 4 6 8 10 80 60 T J = 175C 40 20 VDS = 10V 380s PULSE WIDTH 0 12 VGS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 T J = 25C 100 0 20 40 60 80 100 ID, Drain-to-Source Current (A) Fig. 4 Typical Forward Transconductance vs. Drain Current 2017-09-22 AUIRF4104/S 5000 VGS, Gate-to-Source Voltage (V) 4000 C, Capacitance (pF) 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd Ciss 3000 2000 Coss 1000 ID= 75A VDS = 32V VDS= 20V 16 12 8 4 Crss 0 0 1 10 0 100 Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100.0 T J = 175C 10.0 T J = 25C 1.0 VGS = 0V 0.2 0.6 1.0 1.4 VSD, Source-toDrain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 60 80 100 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000.0 0.1 40 QG Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) 4 20 1000 100 100sec 10 1 1.8 OPERATION IN THIS AREA LIMITED BY R DS (on) 1msec Tc = 25C Tj = 175C Single Pulse 0 1 10msec 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area 2017-09-22 AUIRF4104/S 120 R DS(on) , Drain-to-Source On Resistance (Normalized) 2.0 LIMITED BY PACKAGE ID , Drain Current (A) 100 80 60 40 20 0 ID = 75A VGS = 10V 1.5 1.0 0.5 25 50 75 100 125 150 175 -60 -40 -20 T C , Case Temperature (C) 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (C) Fig 10. Normalized On-Resistance vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature Thermal Response ( Z thJC ) 10 1 D = 0.50 0.20 0.10 0.05 0.1 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 R3 R3 C 1 2 2 Ci= iRi Ci= iRi 3 3 C Ri (C/W) i (sec) 0.371 0.000272 0.337 0.001375 0.337 0.018713 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2017-09-22 AUIRF4104/S 15V VDS D.U.T RG + V - DD IAS 20V A 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS, Single Pulse Avalanche Energy (mJ) 500 DRIVER L ID TOP 400 BOTTOM 11A 16A 75A 300 200 100 0 25 50 75 100 125 150 175 Starting T J, Junction Temperature (C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Id Vds Vgs 4.0 Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform VGS(th) Gate threshold Voltage (V) Vgs(th) ID = 250A 3.0 2.0 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( C ) Fig 14. Threshold Voltage vs. Temperature Fig 13b. Gate Charge Test Circuit 6 2017-09-22 AUIRF4104/S Avalanche Current (A) 1000 Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax 0.01 0.05 10 0.10 1 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 tav (sec) Fig 15. Typical Avalanche Current vs. Pulse width 140 120 EAR , Avalanche Energy (mJ) Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.infineon.com) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 100 80 60 40 20 0 25 50 75 100 125 150 Starting T J , Junction Temperature (C) 175 PD (ave) = 1/2 ( 1.3*BV*Iav) = T/ ZthJC Iav = 2T/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 16. Maximum Avalanche Energy vs. Temperature 7 2017-09-22 AUIRF4104/S Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms 8 2017-09-22 AUIRF4104/S TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information Part Number AUIRF4104 YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code TO-220AB package is not recommended for Surface Mount Application. 9 2017-09-22 AUIRF4104/S D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) D2Pak (TO-263AB) Part Marking Information Part Number AUIRF4104S YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code 10 2017-09-22 AUIRF4104/S D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 11 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 2017-09-22 AUIRF4104/S Qualification Information Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon's Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Qualification Level Moisture Sensitivity Level TO-220AB N/A 2 D -Pak MSL1 Class M4 AEC-Q101-002 Class H1C AEC-Q101-001 Class C3 AEC-Q101-005 Yes Machine Model Human Body Model ESD Charged Device Model RoHS Compliant Highest passing voltage. Revision History Date Comments 09/30/2015 Updated datasheet with corporate template Corrected ordering table on page 1. 09/22/2017 Corrected typo error on part marking on pages 9,10. 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Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies' products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 12 2017-09-22