2.3 GHz to 4.0 GHz
¼ Watt RF Driver Amplifier
Data Sheet
ADL5321
Rev. C
Information
furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©20082012 Analog Devices, Inc. All rights reserved.
FEATURES
Operation: 2.3 GHz to 4.0 GHz
Gain of 14.0 dB at 2.6 GHz
OIP3 of 41.0 dBm at 2.6 GHz
P1dB of 25.7 dBm at 2.6 GHz
Noise figure: 4.0 dB at 2.6 GHz
Power supply voltage: 3.3 V to 5 V
Power supply current: 37 mA to 90 mA
Dynamically adjustable bias
No bias resistor required
Thermally efficient, MSL-1 rated SOT-89 package
Operating temperature range: −40°C to +105°C
ESD rating of ±2 kV (Class 3A)
APPLICATIONS
Wireless infrastructure
Automated test equipment
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
ISM/AMR applications
GENERAL DESCRIPTION
The ADL5321 incorporates a dynamically adjustable biasing
circuit that allows for the customization of OIP3 and P1dB
performance from 3.3 V to 5 V without the need for an external
bias resistor. This feature gives the designer the ability to tailor
driver amplifier performance to the specific needs of the design.
This feature also creates the opportunity for dynamic biasing of
the driver amplifier, where a variable supply is used to allow for
full 5 V biasing under large signal conditions and then can
reduce the supply voltage when signal levels are smaller and
lower power consumption is desirable. This scalability reduces
the need to evaluate and inventory multiple driver amplifiers
for different output power requirements from 22 dBm to
26 dBm output power levels.
The ADL5321 is also rated to operate across the wide temper-
ature range of −40°C to +105°C for reliable performance in
designs that experience higher temperatures, such as power
amplifiers. The 14 watt driver amplifier covers the 2.3 GHz to
4.0 GHz wide frequency range and only requires a few external
components to be tuned to a specific band within that wide
range. This high performance, broadband RF driver amplifier
is well suited for a variety of wired and wireless applications
including cellular infrastructure, ISM band power amplifiers,
defense equipment, and instrumentation equipment. A fully
populated evaluation board is available.
The ADL5321 also delivers excellent adjacent channel leakage
ratio (ACLR) vs. POUT. For output powers up to 10 dBm rms, the
ADL5321 adds very little distortion to the output spectrum. At
2.6 GHz, the ACLR is −59 dB and a relative constellation error of
−46.6 dB (<0.5% EVM) at an output power of 10 dBm rms.
Figure 2. WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
RFIN GND RFOUT
1 2
BIAS
3
GND
ADL5321
(2)
07307-001
07307-125
–30
–40
–50
–60
–70
–80
–90
–10 –5 0 5 10 15 20
ACLR ( dB)
POUT (d Bm)
ADJ CH LOW 2.6 GHZ
ALT CHLOW 2.6 GHZ
ADJ CH LOW 3.5 GHZ
ALT CHUP3.5 GHZ
ADL5321 Data Sheet
Rev. C | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Typical Scattering Parameters ..................................................... 4
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ..............................................7
High Temperature and 3.3 V Operation ..................................... 10
Basic Layout Connections ............................................................. 11
Soldering Information and Recommended PCB Land
Pattern .......................................................................................... 11
Matching Procedure ................................................................... 12
WiMAX Operation .................................................................... 13
Evaluation Board ............................................................................ 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
7/12Rev. B to Rev. C
Change to Title .................................................................................. 1
Changes to Table 1 ............................................................................ 3
Replaced Table 2 ............................................................................... 4
Changes to Table 3 and Table 4 ................................................................. 5
Added Figure 20; Renumbered Sequentially ......................................... 9
Moved High Temperature and 3.3 V Operation Section and added
Figure 30 to Figure 32 ................................................................................ 10
Changes to Soldering Information and Recommended PCB
Land Pattern Section and changes to Figure 22 .................................. 11
6/10Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Operating Temperature Range, Table 3 .................... 4
Added High Temperature Operation Section, Figure 27, Figure 28,
and Figure 29 ................................................................................... 13
Changes to Ordering Guide .......................................................... 16
2/09Rev. 0 to Rev. A
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 15
5/08Revision 0: Initial Version
Data Sheet ADL5321
Rev. C | Page 3 of 16
SPECIFICATIONS
TA = 25°C, unless otherwise noted.
Table 1.
3.3 V 5 V
Parameter Conditions Min Typ Max Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 2.3 4.0 2.3 4.0 GHz
FREQUENCY = 2.6 GHz
Gain1 12.6 13.2 14.0 14.6 dB
vs. Frequency ±100 MHz ±0.3 ±0.4 dB
vs. Temperature 40°C T
A
+85°C ±0.6 ±0.7 dB
vs. Supply 3.2 V to 3.4 V, 4.75 V to 5.25 V ±0.16 ±0.07 dB
Output 1 dB Compression Point, P1dB 22.0 25.7 dBm
Output Third-Order Intercept, OIP3 Δf = 1 MHz, P
OUT
= 5 dBm per tone 31 41 dBm
Noise Figure 3.5 4.0 dB
FREQUENCY = 3.5 GHz
Gain1 10.4 11.1 12.0 12.9 dB
vs. Frequency ±100 MHz ±0.17 ±0.05 dB
vs. Temperature 40°C T
A
+85°C ±0.7 ±0.8 dB
vs. Supply 3.2 V to 3.4 V, 4.75 V to 5.25 V ±0.2 ±0.07 dB
Output 1 dB Compression Point, P1dB 24.7 25.7 dBm
Output Third-Order Intercept, OIP3 Δf = 1 MHz, P
OUT
= 5 dBm per tone 27 38 dBm
Noise Figure 4.3 4.9 dB
POWER INTERFACE Pin RFOUT
Supply Voltage 3.3 4.5 5 5.5 V
Supply Current 37 90 100 mA
vs. Temperature
−40°C TA+85°C
±4.0
±6.0
mA
Power Dissipation VCC = 3.3 V, VCC = 5 V 122 520 mW
1 Guaranteed maximum and minimum specified limits on this parameter are based on six sigma calculations.
ADL5321 Data Sheet
Rev. C | Page 4 of 16
TYPICAL SCATTERING PARAMETERS
VCC = 5 V and TA = 25°C; the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
S11 S21 S12 S22
Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)
2400
4.54
129.60
11.90
21.92
26.72
33.83
8.18
166.39
2450
4.65
126.65
11.89
18.30
-26.63
36.64
8.27
169.02
2500
4.79
123.62
11.88
14.57
-26.55
39.62
8.37
171.83
2550
4.92
120.44
11.87
10.68
26.48
42.70
8.45
175.32
2600
5.04
117.31
11.85
6.80
26.42
45.95
8.44
179.11
2650
5.17
114.43
11.83
2.90
26.37
49.25
8.39
177.31
2700
5.33
111.78
11.80
1.06
26.34
52.65
8.33
173.43
2750
5.50
109.21
11.77
5.17
26.31
56.16
8.15
169.22
2800
5.70
106.84
11.74
9.36
26.30
59.84
7.90
165.46
2850
5.94
104.85
11.71
13.64
26.30
63.64
7.63
161.87
2900
6.25
103.23
11.66
18.05
26.31
67.63
7.31
158.01
2950
6.61
101.91
11.62
22.58
26.34
71.77
6.88
154.58
3000
7.03
101.06
11.56
27.18
26.37
76.13
6.44
151.64
3050
7.53
100.92
11.50
31.98
26.44
80.76
6.00
148.53
3100
8.12
101.82
11.40
36.95
26.55
85.61
5.53
145.65
3150
8.78
104.04
11.29
42.09
26.68
90.69
5.03
143.14
3200
9.47
107.91
11.15
47.34
26.85
95.96
4.56
140.74
3250
10.07
113.72
10.97
52.74
27.06
101.50
4.08
138.36
3300
10.45
121.55
10.76
58.29
27.32
107.30
3.61
136.16
3350
10.45
130.87
10.49
63.95
27.65
113.32
3.19
133.97
3400
10.02
140.04
10.17
69.56
28.05
119.45
2.80
131.77
3450
9.25
147.61
9.80
75.16
28.49
125.70
2.43
129.85
3500
8.28
153.06
9.39
80.70
29.00
132.04
2.13
128.08
3550
7.27
156.76
8.92
86.04
29.58
138.45
1.89
126.22
3600
6.34
159.01
8.39
91.20
30.20
144.79
1.66
124.51
3650
5.51
160.11
7.83
96.07
30.88
151.12
1.48
123.23
3700
4.78
160.43
7.26
100.64
31.57
157.36
1.37
122.16
3750
4.14
160.36
6.66
104.97
32.29
163.69
1.27
121.07
3800
3.60
160.07
6.04
108.96
33.02
170.01
1.19
120.25
3850
3.16
159.62
5.43
112.61
33.74
176.34
1.14
119.79
3900
2.78
158.95
4.82
116.07
34.44
177.21
1.12
119.31
3950
2.45
158.24
4.20
119.27
35.12
170.60
1.10
118.94
4000
2.17
157.64
3.60
122.18
35.74
163.89
1.09
118.86
Data Sheet ADL5321
Rev. C | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VCC 6.5 V
Input Power, 50 Ω Impedance 20 dBm
Internal Power Dissipation, Paddle Soldered 683 mW
θ
JC
, Junction to Paddle 28.5°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +105°C
Storage Temperature Range 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Table 4 lists the junction-to-air thermal resistance (θJA) and the
junction-to-paddle thermal resistance (θJC) for the ADL5321.
Table 4. Thermal Resistance
Package Type θ
JA
1 θ
JC
2 Unit
3-Lead SOT-89 35 11 °C/W
1 Measured on Analog Devices evaluation board. For more information about
board layout, see the Soldering Information and Recommended PCB Land
Pattern section.
2 Based on simulation with JEDEC standard JESD51.
ESD CAUTION
ADL5321 Data Sheet
Rev. C | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 RFIN RF Input. This pin requires a dc blocking capacitor.
2 GND Ground. Connect this pin to a low impedance ground plane.
3 RFOUT RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected
to the external power supply. RF path requires a dc blocking capacitor.
Exposed Paddle Expose Paddle. Internally connected to GND. Solder to a low impedance ground plane.
RFIN
GND
RFOUT
1
2
3
GND
ADL5321
TOP VIEW
(Not to Scale) (2)
07307-002
Data Sheet ADL5321
Rev. C | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
2.5 GHz to 2.7 GHz
Figure 5. Gain vs. Frequency and Temperature, 2.5 GHz to 2.7 GHz
Figure 6. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 2.2 GHz to 2.9 GHz
Figure 7. OIP3 and P1dB vs. Frequency and Temperature,
2.5 GHz to 2.7 GHz
Figure 8. OIP3 vs. POUT and Frequency, 2.5 GHz to 2.7 GHz
Figure 9. Noise Figure vs. Frequency and Temperature, 2.2 GHz to 2.9 GHz
45
40
35
30
25
20
15
10
5
0
07307-003
FRE QUENCY ( GHz)
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
NOISE FIGURE
GAIN
P1dB
OIP3 (5dBm)
2.500 2.525 2.550 2.575 2.600 2.625 2.650 2.675 2.700
16.0
15.5
15.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
07307-004
GAIN (d B)
–40°C
+85°C
+25°C
FRE QUENCY ( GHz)
2.500 2.525 2.550 2.575 2.600 2.625 2.650 2.675 2.700
–24.0
–24.2
–24.4
–24.6
–24.8
–25.0
–25.2
–25.4
–25.6
–25.8
–26.0
0
–2
–4
–6
–8
–10
–12
–14
–16
07307-005
S12 (dB)
S11 (dB) AND S22 ( dB)
FRE QUENCY ( GHz)
2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
S12
S11
S22
42
41
40
39
38
37
36
35
34
30
29
28
27
26
25
24
07307-006
OIP3 (dBm)
P1d B ( dBm)
FRE QUENCY ( GHz)
P1dB (–40°C)
P1dB (+85°C)
OIP3 (+85°C)
OIP3 (+25°C)
OIP3 (–40°C)
P1dB (+25°C)
2.500 2.525 2.550 2.575 2.600 2.625 2.650 2.675 2.700
46
44
42
40
38
36
34
32
30
–4 –2 0246810 12 14 16 18 20 22
07307-007
OIP3 (dBm)
POUT (d Bm)
2.5GHz
2.7GHz
2.6GHz
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
07307-008
NOISE FIGURE (dB)
FRE QUENCY ( GHz)
2.2 2.3 2.4 2.5 2.6
+85°C
+25°C
–40°C
2.7 2.8 2.9
ADL5321 Data Sheet
Rev. C | Page 8 of 16
Figure 10. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,
3.4 GHz to 3.6 GHz
Figure 11. Gain vs. Frequency and Temperature, 3.4 GHz to 3.6 GHz
Figure 12. Reverse Isolation (S12), Input Return Loss (S11), and
Output Return Loss (S22) vs. Frequency, 3.2 GHz to 4.0 GHz
Figure 13. OIP3 and P1dB vs. Frequency and Temperature,
3.4 GHz to 3.6 GHz
Figure 14. OIP3 vs. POUT and Frequency, 3.4 GHz to 3.6 GHz
Figure 15. Noise Figure vs. Frequency and Temperature,
3.2 GHz to 4.0 GHz
3.400 3.425 3.450 3.475 3.500 3.525 3.550 3.575 3.600
45
40
35
30
25
20
15
10
5
0
07307-009
FRE QUENCY ( GHz)
GAIN
P1dB
OIP3 (5dBm)
GAIN, P1dB, OIP3, NOISE FIGURE (dB, dBm)
NOISE FIGURE
3.400 3.425 3.450 3.475 3.500 3.525 3.550 3.575 3.600
14.0
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
07307-010
GAIN (d B)
FRE QUENCY ( GHz)
–40°C
+85°C
+25°C
–25
–26
–27
–28
–29
–30
–31
–32
–33
–34
–35
0
–5
–10
–15
–20
–25
–30
07307-011
S12 (dB)
S11 (dB) AND S22 ( dB)
FREQUENCY (MHz)
3.2 3.3 3.4 3.63.5 3.7 3.8 3.9 4.0
S11
S12 S22
42
41
40
39
38
37
36
35
34
33
32
30
29
28
27
26
25
24
07307-012
OIP3 (dBM)
P1d B ( dBm)
FREQUENCY (MHz)
3.400 3.425 3.450 3.475 3.500 3.525 3.550 3.575 3.600
P1dB (–40°C)
P1dB (+85°C)
OIP3 (+25°C)
OIP3 (+85°C)
OIP3 (–40°C)
P1dB (+25°C)
42
40
38
36
34
32
30
–4 –2 0 2 4 6 8 10 12 14 16 18 20 22
07307-013
OIP3 (dBm)
P
OUT
(d Bm)
3.6GHz
3.5GHz
3.4GHz
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
07307-014
NOISE FIGURE (dB)
FRE QUENCY ( GHz)
3.2 3.3 3.4 3.5 3.6
3.7 3.8 3.9 4.0
–40°C
+25°C
+85°C
Data Sheet ADL5321
Rev. C | Page 9 of 16
Figure 16. OIP3 Distribution at 2.6 GHz
Figure 17. P1dB Distribution at 2.6 GHz
Figure 18. Gain Distribution at 2.6 GHz
Figure 19. Noise Figure (NF) Distribution at 2.6 GHz
Figure 20. Supply Current vs. Temperature and Supply Voltage
(Using 2.6 GHz Matching Components)
Figure 21. Supply Current vs. POUT 3.3 V and 5 V
(2.6 GHz Matching Components)
30
25
20
15
10
5
0
07307-015
PERCE NTAGE ( %)
OIP3 (dBM)
39.4
39.8
40.2
40.6
42.2
42.6
41.0
41.4
41.8
39.6
40.0
40.4
40.8
42.4
41.2
41.6
42.0
35
30
25
20
15
10
5
0
07307-016
PERCE NTAGE ( %)
P1d B ( dBM)
24.6
25.0
25.4
25.8
27.0
26.2
26.6
24.8
25.2
25.6
26.0
26.4
26.8
35
30
25
20
15
10
5
0
07307-017
PERCE NTAGE ( %)
GAIN (d B)
13.70
13.80
13.90
14.00
14.25
14.10
14.15
13.75
13.85
13.95
14.05
14.20
30
25
20
15
10
5
0
07307-018
PERCE NTAGE ( %)
NF ( dB)
3.76 3.84 3.92 4.00 4.083.80 3.88 3.96 4.04 4.12 4.16
110
105
100
95
90
85
80
75
70
07307-019
SUPP LY CURRENT (mA)
TEMPERATURE (°C)
–40 –30 –20 –10 010 20 30 40 50 60 70 80
5.25V
5.0V
4.75V
220
20–6 28
SUPP LY CUURE NT (mA)
P
OUT
(d Bm)
40
60
80
100
120
140
160
180
200
–4 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26
5V
3.3V
07307-120
ADL5321 Data Sheet
Rev. C | Page 10 of 16
HIGH TEMPERATURE AND 3.3 V OPERATION
The ADL5321 has excellent performance at temperatures above 85°C. At 105°C, the gain and P1dB decrease by 0.2 dB, the OIP3 decreases by
0.1 dB, and the noise figure increases by 0.31 dB compared with the data at 85°C. Figure 25 through Figure 27 show the performance at 105°C.
Figure 22. Gain vs. Frequency and Temperature, 5 V Supply, 2.5 GHz to 2.7 GHz
Figure 23. OIP3 and P1dB vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
Figure 24. Noise Figure vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
Figure 25. Gain vs. Frequency and Temperature, 3.3 V Supply, 2.5 GHz to 2.7 GHz
Figure 26. OIP3 and P1dB vs. Frequency and Temperature,
3.3 V Supply, 2.5 GHz to 2.7 GHz
Figure 27. Noise Figure vs. Frequency and Temperature,
3.3 V Supply 2.5 GHz to 2.7 GHz
16.0
15.5
15.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
2.500 2.7002.6752.6502.6252.6002.5752.5502.525
GAI N ( dB)
FREQUENCY ( GHz)
07307-030
25°C
85°C
105°C
42
41
40
39
38
37
36
35
34
32
31
30
29
28
27
26
25
24
2.500 2.7002.6752.6502.6252.6002.5752.5502.525
OIP3 (dBm)
P1d B ( dBm)
FRE QUENCY ( GHz)
07307-031
25°C
85°C
105°C OIP3
P1dB
5.5
5.0
4.5
4.0
3.5
3.0
2.50 2.702.652.602.55
NOISE FIGURE (dB)
FRE QUENCY ( GHz)
07307-032
25°C
85°C
105°C
15.0
10.0
2.500 2.525 2.7002.6752.6502.6252.6002.5752.555
GAIN (dB)
FRE QUENCY ( GHz)
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
25°C
85°C
105°C
–40°C
07307-130
33
26
2.500 2.525 2.7002.6752.6502.6252.6002.5752.555
OIP3 ( dBm)
P1d B ( dBm)
FRE QUENCY ( GHz)
27
28
29
30
31
32
27
20
21
22
23
24
25
26
P1dB (25°C) P1dB (–40°C)
P1dB (+105°C)
P1dB (+85°C)
OIP3 (+25°C) OIP3 (–40°C)
OIP3 (+85°C) OIP3 (+105°C)
07307-131
7
5
6
4
3
2
1
2.2 2.92.5 2.6 2.82.72.42.3
NOISE FIGURE (dB)
FRE QUENCY ( GHz)
85°C 105°C
25°C
–40°C
07307-132
Data Sheet ADL5321
Rev. C | Page 11 of 16
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5321 are shown
in Figure 28.
Table 6 lists the required matching components. Capacitors
C1, C2, C3, C4, and C7 are Murata GRM155 series (0402 size)
and Inductor L1 is a Coilcraft 0603CS series (0603 size). For all
frequency bands, the placement of C3 and C7 is critical. From
2500 MHz to 2700 MHz, the placement of C1 is also important.
Table 7 lists the recommended component placement for
various frequencies.
A 5 V dc bias is supplied through L1 that is connected to RFOUT
(Pin 3). In addition to C4, 10 nF and 10 μF power supply
decoupling capacitors are also required. The typical current
consumption for the ADL5321 is 90 mA.
Figure 28. Basic Connections
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 29 shows the recommended land pattern for the ADL5321.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with (GND) Pin 2. If multiple ground layers exist, they
should be stitched together using vias. For more information on
land pattern design and layout, refer to the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
This land pattern, on the ADL5321 evaluation board, provides
a measured thermal resistance (θJA) of 35°C/W. To measure θJA,
the temperature at the top of the SOT-89 package is found with
an IR temperature gun. Thermal simulation suggests a junction
temperature 10°C higher than the top of package temperature.
With additional ambient temperature and I/O power measure-
ments, θJA could be determined.
Figure 29. Recommended Land Pattern
Table 6. Recommended Components for Basic Connections
Frequency (MHz) C1 (pF) C2 (pF) C3 (pF) C4 (pF) C7 (pF) L1 (nH)
2500 to 2700 1.0 10 1.2 10 Open 9.5
3400 to 3850 10 10 1.2 10 1.0 9.5
Table 7. Matching Component Spacing
Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils)
2500 to 2700 240 75 89 325
3400 to 3850 90 35 40 416
RFIN
GND
GND
RFOUT
12
(2)
3
ADL5321
C6 10µF
C5 10nF
C4
1
L1
1
VCC
GND
RF
IN
C2
1
C3
1
RF
OUT
C1
1
C7
1
λ
1
2
λ
3
2
λ
4
2
λ
2
2
1
SEE TABL E 5 FO R FREQUENCY SPECIFI C COMPONENTS.
2
SEE TABL E 6 FO R RE COMM E NDE D COMP ONENT SPACING.
07307-026
0.86mm
5.56mm 0.20mm
1.80mm
1.27mm
0.62mm
3.48mm
1.50mm 3.00mm
07307-051
ADL5321 Data Sheet
Rev. C | Page 12 of 16
MATCHING PROCEDURE
The ADL5321 is designed to achieve excellent gain and IP3
performance. To achieve this, both input and output matching
networks must present specific impedance to the device. The
matching components listed in Table 6 were chosen to provide
14 dB input return loss while maximizing OIP3. The load-pull
plots (see Figure 30, Figure 31, and Figure 32) show the load
impedance points on the Smith chart where optimum OIP3,
gain, and output power can be achieved. These load impedance
values (that is, the impedance that the device sees when looking
into the output matching network) are listed in Table 8 and Table 9
for maximum gain and maximum OIP3, respectively. The contours
show how each parameter degrades as it is moved away from
the optimum point.
From the data shown in Table 8 and Table 9, it becomes clear that
maximum gain and maximum OIP3 do not occur at the same
impedance. This can also be seen on the load-pull contours in
Figure 30 through Figure 32. Therefore, output matching generally
involves compromising between gain and OIP3. In addition, the
load-pull plots demonstrate that the quality of the output
impedance match must be compromised to optimize gain and/
or OIP3. In most applications where line lengths are short and
where the next device in the signal chain presents a low input
return loss, compromising on the output match is acceptable.
To adjust the output match for operation at a different frequency or
if a different trade-off between OIP3, gain, and output impedance
is desired, the following procedure is recommended.
For example, to optimize the ADL5321 for optimum OIP3 and
gain at 2300 MHz, use the following steps:
1. Install the recommended tuning components for a 2500 MHz
to 2700 MHz tuning band, but do not install C3 and C7.
2. Connect the evaluation board to a vector network analyzer
so that input and output return loss can be viewed simulta-
neously.
3. Starting with the recommended values and positions for
C3 and C7, adjust the positions of these capacitors along
the transmission line until the return loss and gain are
acceptable. Push-down capacitors that are mounted on
small sticks can be used in this case as an alternative to
soldering. If moving the component positions does not
yield satisfactory results, then the values of C3 and C7
should be increased or decreased (most likely increased
in this case because the user is tuning for a lower frequency).
Repeat the process.
4. Once the desired gain and return loss are realized, OIP3
should be measured. It may be necessary to go back and
forth between return loss/gain and OIP3 measurements
(probably compromising most on output return loss) until
an acceptable compromise is achieved.
Figure 30. Load-Pull Contours, 2600 MHz
Figure 31. Load-Pull Contours, 3500 MHz
Figure 32. Load-Pull Contours, 3600 MHz
07307-022
LOADFI XED L OAD PULL
FREQ = 2.6000 GHz
IP3 MAX = 41. 70dBm
AT 0. 4705< 86.63
10 CONTOURS, 1.0 0 dBm STEP
(32.00 TO 41.00dBm)
POUT M AX = 14.16dBm
AT 0. 6100< 136.24
10 CONTOURS, 1.0 0 dBm STEP
(5.00 TO 14.00dBm)
GT MAX = 15.02dBm
AT 0. 6100< 136.24
10 CONTOURS, 1.0 0 dBm STEP
(6.00 TO 15.00dB)
SPECS: O F F
0.404< 93.05
07307-023
LOAD
FI XED L OAD PULL
FREQ = 3.5000 GHz
IP3 MAX = 41. 37dBm
AT 0. 6911< 142.11
10 CONTOURS, 1.0 0 dBm STEP
(32.00 TO 41.00dBm)
POUT M AX = 14.96dBm
AT 0. 7686< 162.58
10 CONTOURS, 1.0 0 dBm STEP
(5.00 TO 14.00dBm)
GT MAX = 14.02dBm
AT 0. 7686< 162.58
10 CONTOURS, 1.0 0 dBm STEP
(5.00 TO 14.00dB)
SPECS: O F F
0.875< –147.48
07307-024
LOAD
FI XED L OAD PULL
FREQ = 3.6000 GHz
IP3 MAX = 41. 29dBm
AT 0. 7070< 140.65
10 CONTOURS, 1.0 0 dBm STEP
(32.00 TO 41.00dBm)
POUT M AX = 15.63dBm
AT 0. 7057< 161.81
10 CONTOURS, 1.0 0 dBm STEP
(6.00 TO 15.00dBm)
GT MAX = 13.44dBm
AT 0. 7057< 161.81
10 CONTOURS, 1.0 0 dBm STEP
(4.00 TO 13.00dB)
SPECS: O F F
Data Sheet ADL5321
Rev. C | Page 13 of 16
Table 8. Load Conditions for GainMAX
Frequency (MHz)
ΓLoad
(Magnitude) ΓLoad (°) Gain
MAX
(dB)
2600 0.6100 136.24 15.02
3500 0.7686 162.58 14.02
3600 0.7057 161.81 13.44
Table 9. Load Conditions for OIP3MAX
Frequency (MHz)
ΓLoad
(Magnitude)
ΓLoad (°)
IP3 MAX (dBm)
2600 0.4705 86.63 41.7
3500 0.6911 142.11 41.37
3600 0.7070 140.65 41.29
WiMAX OPERATION
Figure 33 shows a plot of adjacent channel leakage ratio (ACLR)
vs. POUT for the ADL5321. The signal type used is a WiMAX,
64 QAM, single carrier with a 10 MHz channel bandwidth. This
signal is generated by a WiMAX-enabled source and followed
with suitable band-pass filtering. The band-pass filter helps reduce
the adjacent and alternate channel noise and distortion out of
the signal generator down to −63 dB in the adjacent channels
and −76 dB in the alternate channels at 2.6 GHz and −60 dB
at 3.5 GHz.
Below an output power of 7 dBm, measured ADL5321 output
spectral performance is limited by the signal quality from the
signal source used (−63 dB at 2.6 GHz and −60 dB at 3.5 GHz).
At high power operation, input power to the ADL5321 is 1 dBm
for 15 dBm output power and the source ACLR is −60.2 dB. It
is expected that with a better signal source, the ADL5321 output
spectral quality improves further, especially at output power
levels ≤10 dBm. For instance, the ADL5373 quadrature modulator
measured ACLR is −69 dB for an output power of −10 dBm.
For output powers up to 10 dBm rms, the ADL5321 adds very
little distortion to the output spectrum. At 2.6 GHz, the ACLR is
−59 dB and a relative constellation error of −46.6 dB (<0.5% EVM)
at an output power of 10 dBm rms.
Figure 33. ACLR vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
Figure 34. RCE/EVM vs. POUT, WiMAX 64 QAM, 10 MHz Bandwidth, Single Carrier
–30
–40
–50
–60
–70
–80
–90
–10 –5 0 5 10 15 20
07307-025
ACLR ( dB)
P
OUT
(d Bm)
ADJ CH LOW 2.6 GHZ
ALT CHLOW 2.6 GHZ
ADJ CH LOW 3.5 GHZ
ALT CHUP 3.5 GHZ
0
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
–20 –15 –10 –5 0 5 10 15 20
07307-126
RCE/EVM (dB)
P
OUT
(d Bm)
2.6 G Hz
3.5 G Hz
ADL5321 Data Sheet
Rev. C | Page 14 of 16
EVALUATION BOARD
The schematic of the ADL5321 evaluation board is shown in
Figure 35. This evaluation board uses 25 mil wide traces and is
made from IS410 material (lead-free version of FR4). The
evaluation board comes tuned for operation in the 2500 MHz to
2700 MHz tuning band. Tuning options for other frequency bands
are also provided in Table 10. The recommended placement for
these components is provided in Table 11. The inputs and outputs
should be ac-coupled with appropriately sized capacitors. DC
bias is provided to the amplifier via an inductor connected to
the RFOUT pin. A bias voltage of 5 V is recommended.
Figure 35. Evaluation Board, 2500 MHz to 2700 MHz
Table 10. Evaluation Board Configuration Options
Component Function 2500 MHz to 2700 MHz 3400 MHz to 3850 MHz
C1, C2 AC coupling capacitors C1 = 0402, 1.0 pF C1 = 0402, 10 pF
C2 = 0402, 10 pF C2 = 0402, 10 pF
C4, C5, C6 Power supply bypassing capacitors C4 = 0603, 10 pF C4 = 0603, 10 pF
C5 = 0603, 10 nF C5 = 0603, 10 nF
C6 = 1206, 10 µF C6 = 1206, 10 µF
L1 DC bias inductor 0603, 9.5 nH 0603, 9.5 nH
C3, C7
Tuning capacitors
C3 = 0402, 1.2 pF
C3 = 0402, 1.2 pF
C7 = 0402, open C7 = 0402, 1.0 pF
VCC, GND Power supply connections VCC, red test loop VCC, red test loop
GND, black test loop GND, black test loop
Table 11. Recommended Component Spacing on Evaluation Board
Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils)
2500 to 2700 240 75 89 325
3400 to 3850 90 35 40 416
RFIN
GND
GND
RFOUT
12
(2)
3
ADL5321
C6 10µF
C5 10nF
C4 10pF
L1
9.5nH
VCCGND
RFIN
C2
10pF
C3
1.2pF
RFOUT
C1
1.0pF
C7
OPEN
λ
1
λ
3
λ
4
λ
2
07307-127
Data Sheet ADL5321
Rev. C | Page 15 of 16
Figure 36. Evaluation Board Layout and Default Component Placement for
Operation from 2500 MHz to 2700 MHz (Note: C7 Is Not Placed)
Figure 37. Evaluation Board Layout and Component Placement for
Operation from 3400 MHz to 3850 MHz
10µF
C1
1.0 pF C2
10pF
10 nF
10 pF
9.5 nH
C3
1.2 pF
12
(2)
3
07307-028
07307-029
10µF
C3
1.2 pF
C1
10 pF
C7
C2
10 pF
10 nF
10 pF
9.5 nH
12
(2)
3
ADL5321 Data Sheet
Rev. C | Page 16 of 16
OUTLINE DIMENSIONS
Figure 38. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
ADL5321ARKZ-R7 −40°C to +105°C 3-Lead SOT-89, 7“ Tape and Reel RK-3
ADL5321-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
*COMPLIANT TO JEDEC STANDARDS TO-243 WITH THE
EXCEPTION OF DIMENSIONS INDICATED BY AN ASTERISK.
4.25
3.94
4.60
4.40
*1.75
1.55
1.50 TYP
3.00 TYP
END VIEW
2.60
2.30
1.20
0.75
1 2
(2)
3
2.29
2.14
*0.56
0.36 *0.52
0.32
1.60
1.40
0.44
0.35
12-18-2008-B
©20082012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07307-0-7/12(C)