100353 Low Power 8-Bit Register General Description Features The 100353 contains eight D-type edge triggered, master/ slave flip-flops with individual inputs (Dn), true outputs (Qn), a clock input (CP), and a common clock enable pin (CEN). Data enters the master when CP is LOW and transfers to the slave when CP goes HIGH. When the CEN input goes HIGH it overrides all other inputs, disables the clock, and the Q outputs maintain the last state. The 100353 output drivers are designed to drive 50X termination to b2.0V. All inputs have 50 kX pull-down resistors. Y Y Y Y Low power operation 2000V ESD protection Voltage compensated operating range e b4.2V to b 5.7V Available to industrial grade temperature range Logic Symbol Pin Names D0 -D7 CEN CP Q0 -Q7 NC Description Data Inputs Clock Enable Input Clock Input (Active Rising Edge) Data Outputs No Connect TL/F/9882 - 4 Connection Diagrams 24-Pin DIP 28-Pin PCC 24-Pin Quad Cerpak TL/F/9882 - 3 TL/F/9882 - 2 TL/F/9882-1 C1995 National Semiconductor Corporation TL/F/9882 RRD-B30M115/Printed in U. S. A. 100353 Low Power 8-Bit Register July 1992 Logic Diagram TL/F/9882 - 5 Truth Table Inputs Outputs Dn CEN CP Qn L H X X X L L X X H L L L H X L H NC NC NC H e HIGH Voltage Level L e LOW Voltage Level X e Don't Care NC e No Change L e LOW to HIGH Transition 2 Absolute Maximum Ratings Recommended Operating Conditions Above which the useful life may be impared (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. b 65 C to a 150 C Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic Plastic Case Temperature (TC) Commercial Industrial Military Supply Voltage (VEE) a 175 C a 150 C VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) ESD (Note 2) 0 C to a 85 C b 40 C to a 85 C b 55 C to a 125 C b 5.7V to b 4.2V b 7.0V to a 0.5V VEE to a 0.5V b 50 mA t 2000V Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND, TC e 0 C to a 85 C (Note 3) Symbol Parameter Min Typ Max Units VOH Output HIGH Voltage b 1025 b 955 b 870 mV VOL Output LOW Voltage b 1830 b 1705 b 1620 mV VOHC Output HIGH Voltage b 1035 VOLC Output LOW Voltage b 1610 mV VIH Input HIGH Voltage b 1165 b 870 mV Guaranteed HIGH Signal for all Inputs VIL Input LOW Voltage b 1830 b 1475 mV Guaranteed LOW Signal for all Inputs IIL Input LOW Current 0.50 IIH Input HIGH Current IEE Power Supply Current mV b 119 b 122 Conditions VIN e VIH (Max) or VIL (Min) Loading with 50X to b2.0V VIN e VIH (Min) or VIL (Max) Loading with 50X to b2.0V mA VIN e VIL (Min) 240 mA VIN e VIH(Max) b 61 b 61 mA Inputs Open VEE e b4.2V to b4.8V VEE e b4.2V to b5.7V Note 3: The specified limits represent the ``worst case'' value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under ``worst case'' conditions. DIP AC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND Symbol Parameter TC e 0 C Min Max 425 TC e a 25 C TC e a 85 C Min Min Max Units MHz Figures 1, 2 3.10 ns Figures 1, 2 (Note 4) 2.00 ns Figures 1, 2 1.10 0.40 1.10 ns Figures 1, 3 0.10 0.10 ns Figures 1, 4 2.00 2.00 ns Figures 1, 2 fmax Toggle Frequency tPLH tPHL Propagation Delay CP to Output 425 1.40 3.00 1.40 3.00 1.50 tTLH tTHL Transition Time 20% to 80%, 80% to 20% 0.45 2.00 0.45 2.00 0.45 ts Setup Time Dn CEN (Disable Time) CEN (Release Time) 1.10 0.40 1.10 1.10 0.40 1.10 th Hold Time Dn 0.10 tpw(H) Pulse Width HIGH CP 425 2.00 Note 4: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 3 Conditions Max Commercial Version (Continued) PCC and Cerpack AC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND Symbol TC e 0 C Parameter Min Max 425 TC e a 25 C TC e a 85 C Min Min Max 425 Figures 1, 2 2.90 ns Figures 1, 2 (Note 2) 1.90 ns Figures 1, 2 1.00 0.30 1.00 ns Figures 1, 3 Toggle Frequency tPLH tPHL Propagation Delay CP to Output 425 1.40 2.80 1.40 2.80 1.50 tTLH tTHL Transition Time 20% to 80%, 80% to 20% 0.45 1.90 0.45 1.90 0.45 ts Setup Time Dn CEN (Disable Time) CEN (Release Time) 1.00 0.30 1.00 Conditions MHz fmax 1.00 0.30 1.00 Units Max th Hold Time Dn 0 0 0 ns Figures 1, 4 tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns Figures 1, 2 tOSHL Maximum Skew Common Edge Output-to-Output Variation Data to Output Path 200 200 200 ps PCC Only (Note 1) Maximum Skew Common Edge Output-to-Output Variation Data to Output Path 200 200 200 ps PCC Only (Note 1) Maximum Skew Opposite Edge Output-to-Output Variation Data to Output Path 260 260 260 ps PCC Only (Note 1) Maximum Skew Pin (Signal) Transition Variation Data to Output Path 280 280 280 ps PCC Only (Note 1) tOSLH tOST tPS Note 1: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL), or LOW to HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. Note 2: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 4 Industrial Version PCC DC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND, TC e b40 C to a 85 C (Note 1) Symbol TC e b40 C Parameter Min VOH TC e 0 C to a 85 C Max Min Units Output HIGH Voltage b 1085 b 870 b 1025 b 870 mV VOL Output LOW Voltage b 1830 b 1575 b 1830 b 1620 mV VOHC Output HIGH Voltage b 1095 VOLC Output LOW Voltage VIN e VIH (Max) or VIL (Min) Loading with 50X to b2.0V b 1610 mV VIN e VIH (Min) or VIL (Max) Loading with 50X to b2.0V VIH Input HIGH Voltage b 1170 b 870 b 1165 VIL Input LOW Voltage b 1830 b 1480 b 1830 b 870 mV Guaranteed HIGH Signal for all Inputs b 1475 IIL Input LOW Current 0.50 mV Guaranteed LOW Signal for all Inputs mA IIH Input HIGH Current VIN e VIL (Min) mA IEE Power Supply Current VIN e VIH (Max) b 1035 mV b 1565 0.50 240 b 119 b 122 240 b 61 b 61 Conditions Max b 119 b 122 b 61 b 61 Inputs Open VEE e b4.2V to b4.8V VEE e b4.2V to b5.7V mA Note 1: The specified limits represent the ``worst case'' value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under ``worst case'' conditions. PCC AC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND Symbol Parameter TC e b40 C TC e a 25 C TC e a 85 C Min Min Min Max Max 425 Units Conditions MHz Figures 1, 2 Max fmax Toggle Frequency 425 tPLH tPHL Propagation Delay CP to Output 1.40 2.80 1.40 2.80 1.50 2.90 ns Figures 1, 2 (Note 2) tTLH tTHL Transition Time 20% to 80%, 80% to 20% 0.40 2.50 0.45 1.90 0.45 1.90 ns Figures 1, 2 ts Setup Time Dn CEN (Disable Time) CEN (Release Time) 1.00 0.30 1.00 ns Figures 1, 3 0.60 0.90 1.40 1.00 0.30 1.00 425 th Hold Time Dn 0.30 0 0 ns Figures 1, 4 tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns Figures 1, 2 Note 2: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 5 Military VersionPreliminary DC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND, TC e b55 C to a 125 C Symbol Parameter VOH Output HIGH Voltage VOL Output LOW Voltage VOHC VOLC Output HIGH Voltage Input HIGH Voltage VIL Input LOW Voltage IIL Input LOW Current IIH Input HIGH Current Max Units TC b 1025 b 870 mV 0 C to a 125 C b 1085 b 870 mV b 55 C b 1830 b 1620 mV 0 C to a 125 C b 1830 b 1555 mV b 55 C Conditions Notes VIN e VIH (Max) or VIL (Min) Loading with 50X to b2.0V 1, 2, 3 VIN e VIH (Min) or VIL (Max) Loading with 50X to b2.0V 1, 2, 3 0 C to b 1035 mV b 1085 mV b 55 C b 1610 mV 0 C to a 125 C b 1555 mV b 55 C Guaranteed HIGH Signal for all Inputs Output LOW Voltage VIH IEE Min a 125 C b 1165 b 870 mV b 55 C to a 125 C b 1830 b 1475 mV b 55 C to a 125 C Guaranteed LOW Signal for all Inputs mA b 55 C to a 125 C VEE e b4.2V VIN e VIL (Min) 0.50 0 C to 240 mA 340 mA b 55 C b 50 mA b 55 C to a 125 C a 125 C Power Supply Current b 125 b 130 1, 2, 3, 4 1, 2, 3, 4 1, 2, 3 VEE e b5.7V VIN e VIH (Max) 1, 2, 3 Inputs Open VEE e b4.2V to b4.8V VEE e b4.2V to b5.7V 1, 2, 3 Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b 55 C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides ``cold start'' specs which can be considered a worst case condition at cold temperatures. Note 2: Screen tested 100% on each device at b 55 C, a 25 C, and a 125 C, Subgroups 1, 2, 3, 7, and 8. Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at b 55 C, a 25 C, and a 125 C, Subgroups A1, 2, 3, 7, and 8. Note 4: Guaranteed by applying specified input condition and testing VOH/VOL. 6 Military VersionPreliminary (Continued) AC Electrical Characteristics VEE e b4.2V to b5.7V, VCC e VCCA e GND Symbol Parameter TC e b55 C TC e a 25 C Min Min fmax Toggle Frequency 400 tPLH tPHL Propagation Delay CP to Output 0.70 tTLH tTHL Transition Time 20% to 80%, 80% to 20% 0.40 ts Setup Time Dn CEN (Disable Time) CEN (Release Time) Max Max 400 3.30 0.80 TC e a 125 C Min 400 3.10 0.80 Units Conditions Notes MHz Figures 1, 2 4 Max 3.80 ns 1, 2, 3, 5 Figures 1, 2 2.50 0.40 2.40 0.40 2.70 ns 4 0.60 0.90 1.40 0.60 0.70 1.40 0.60 0.90 2.10 ns Figures 1, 3 4 th Hold Time Dn 0.30 0.30 0.30 ns Figures 1, 4 4 tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns Figures 1, 2 4 Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b 55 C), then testing immediately after power-up. This provides ``cold start'' specs which can be considered a worst case condition at cold temperatures. Note 2: Screen tested 100% on each device at a 25 C temperature only, Subgroup A9. Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at a 25 C, Subgroup A9, and at a 125 C and b 55 C, temperatures, Subgroups A10 and A11. Note 4: Not tested at a 25 C, a 125 C, and b 55 C temperature (design characterization data). Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 7 Test Circuitry TL/F/9882 - 6 FIGURE 1. AC, Toggle Frequency Test Circuit Notes: VCC, VCCA e a 2V, VEE e b 2.5V L1 and L2 e equal length 50X impedance lines RT e 50X terminator internal to scope Decoupling 0.1 mF from GND to VCC and VEE All unused outputs are loaded with 50X to GND CL e Fixture and stray capacitance s 3 pF Switching Waveforms TL/F/9882 - 8 FIGURE 2. Propagation Delay (Clock) and Transition Times 8 Switching Waveforms (Continued) TL/F/9882 - 9 FIGURE 3. Setup and Pulse Width Times TL/F/9882 - 10 FIGURE 4. Data Setup and Hold Time Note 1: ts is the minimum time before the transition of the clock that information must be present at the data input. Note 2: th is the minimum time after the transition of the clock that information must remain unchanged at the data input. Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 100353 D C QB Device Type (Basic) Special Variations QB e Military grade device with environmental and burn-in processing Package Code D e Ceramic DIP F e Quad Cerpak Q e Plastic Leaded Chip Carrier (PCC) P e Plastic DIP Temperature Range C e Commercial (0 C to a 85 C) I e Industrial (b40 C to a 85 C) (PCC only) M e Military (b55 C to a 125 C) 9 Physical Dimensions inches (millimeters) 24-Lead Ceramic Dual-In-Line Package (0.400x Wide) (D) NS Package Number J24E 10 Physical Dimensions inches (millimeters) (Continued) 24-Lead Plastic Dual-In-Line Package (P) NS Package Number N24E NS Package Number V28A 28-Lead Plastic Chip Carrier (Q) 11 --- OVERFLOW DATA THIS PAGE --- 100353 Low Power 8-Bit Register Physical Dimensions inches (millimeters) (Continued) Lit. Y114921 24 Lead Quad Cerpak (F) NS Package Number W24B LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.