TL/F/9882
100353 Low Power 8-Bit Register
July 1992
100353
Low Power 8-Bit Register
General Description
The 100353 contains eight D-type edge triggered, master/
slave flip-flops with individual inputs (Dn), true outputs (Qn),
a clock input (CP), and a common clock enable pin (CEN).
Data enters the master when CP is LOW and transfers to
the slave when CP goes HIGH. When the CEN input goes
HIGH it overrides all other inputs, disables the clock, and
the Q outputs maintain the last state.
The 100353 output drivers are designed to drive 50Xtermi-
nation to b2.0V. All inputs have 50 kXpull-down resistors.
Features
YLow power operation
Y2000V ESD protection
YVoltage compensated operating range eb
4.2V to
b5.7V
YAvailable to industrial grade temperature range
Logic Symbol
TL/F/9882 4
Pin Names Description
D0–D7Data Inputs
CEN Clock Enable Input
CP Clock Input (Active Rising Edge)
Q0–Q7Data Outputs
NC No Connect
Connection Diagrams
24-Pin DIP
TL/F/9882 1
28-Pin PCC
TL/F/9882 3
24-Pin Quad Cerpak
TL/F/9882 2
C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Logic Diagram
TL/F/9882 5
Truth Table
Inputs Outputs
DnCEN CP Qn
LLLL
HLLH
XX L NC
XX H NC
XH X NC
H
e
HIGH Voltage Level
LeLOW Voltage Level
XeDon’t Care
NC eNo Change
LeLOW to HIGH Transition
2
Absolute Maximum Ratings
Above which the useful life may be impared (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature (TSTG)b65§Ctoa
150§C
Maximum Junction Temperature (TJ)
Ceramic a175§C
Plastic a150§C
VEE Pin Potential to Ground Pin b7.0V to a0.5V
Input Voltage (DC) VEE to a0.5V
Output Current (DC Output HIGH) b50 mA
ESD (Note 2) t2000V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Recommended Operating
Conditions
Case Temperature (TC)
Commercial 0§Ctoa
85§C
Industrial b40§Ctoa
85§C
Military b55§Ctoa
125§C
Supply Voltage (VEE)b5.7V to b4.2V
Commercial Version
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCe0§Ctoa
85§C (Note 3)
Symbol Parameter Min Typ Max Units Conditions
VOH Output HIGH Voltage b1025 b955 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1705 b1620 mV or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1035 mV VIN eVIH (Min) Loading with
VOLC Output LOW Voltage b1610 mV or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage b1165 b870 mV Guaranteed HIGH Signal for all Inputs
VIL Input LOW Voltage b1830 b1475 mV Guaranteed LOW Signal for all Inputs
IIL Input LOW Current 0.50 mAV
IN eVIL (Min)
IIH Input HIGH Current 240 mAV
IN eVIH(Max)
IEE Power Supply Current Inputs Open
b119 b61 mA VEE eb
4.2V to b4.8V
b122 b61 VEE eb
4.2V to b5.7V
Note 3: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operation under ‘‘worst case’’ conditions.
DIP AC Electrical Characteristics VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
fmax Toggle Frequency 425 425 425 MHz
Figures 1, 2
tPLH Propagation Delay 1.40 3.00 1.40 3.00 1.50 3.10 ns
Figures 1, 2
tPHL CP to Output (Note 4)
tTLH Transition Time 0.45 2.00 0.45 2.00 0.45 2.00 ns
Figures 1, 2
tTHL 20% to 80%, 80% to 20%
tsSetup Time
Dn1.10 1.10 1.10
CEN (Disable Time) 0.40 0.40 0.40 ns
Figures 1, 3
CEN (Release Time) 1.10 1.10 1.10
thHold Time
Dn0.10 0.10 0.10 ns
Figures 1, 4
tpw(H) Pulse Width HIGH
CP 2.00 2.00 2.00 ns
Figures 1, 2
Note 4: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
3
Commercial Version (Continued)
PCC and Cerpack AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
fmax Toggle Frequency 425 425 425 MHz
Figures 1, 2
tPLH Propagation Delay 1.40 2.80 1.40 2.80 1.50 2.90 ns
Figures 1, 2
tPHL CP to Output (Note 2)
tTLH Transition Time 0.45 1.90 0.45 1.90 0.45 1.90 ns
Figures 1, 2
tTHL 20% to 80%, 80% to 20%
tsSetup Time
Dn1.00 1.00 1.00
CEN (Disable Time) 0.30 0.30 0.30 ns
Figures 1, 3
CEN (Release Time) 1.00 1.00 1.00
thHold Time Dn000ns
Figures 1, 4
tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns
Figures 1, 2
tOSHL Maximum Skew Common Edge PCC Only
Output-to-Output Variation 200 200 200 ps (Note 1)
Data to Output Path
tOSLH Maximum Skew Common Edge PCC Only
Output-to-Output Variation 200 200 200 ps (Note 1)
Data to Output Path
tOST Maximum Skew Opposite Edge PCC Only
Output-to-Output Variation 260 260 260 ps (Note 1)
Data to Output Path
tPS Maximum Skew PCC Only
Pin (Signal) Transition Variation 280 280 280 ps (Note 1)
Data to Output Path
Note 1: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged
device. The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL), or LOW to HIGH (tOSLH), or in opposite directions both
HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
Note 2: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
4
Industrial Version
PCC DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
40§Ctoa
85§C (Note 1)
Symbol Parameter TCeb
40§CT
C
e
0
§
Ctoa
85§CUnits Conditions
Min Max Min Max
VOH Output HIGH Voltage b1085 b870 b1025 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1575 b1830 b1620 mV or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1095 b1035 mV VIN eVIH (Min) Loading with
VOLC Output LOW Voltage b1565 b1610 mV or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage b1170 b870 b1165 b870 mV Guaranteed HIGH Signal for all Inputs
VIL Input LOW Voltage b1830 b1480 b1830 b1475 mV Guaranteed LOW Signal for all Inputs
IIL Input LOW Current 0.50 0.50 mAV
IN eVIL (Min)
IIH Input HIGH Current 240 240 mAV
IN eVIH (Max)
IEE Power Supply Current Inputs Open
b119 b61 b119 b61 mA VEE eb
4.2V to b4.8V
b122 b61 b122 b61 VEE eb
4.2V to b5.7V
Note 1: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operation under ‘‘worst case’’ conditions.
PCC AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCeb
40§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
fmax Toggle Frequency 425 425 425 MHz
Figures 1, 2
tPLH Propagation Delay 1.40 2.80 1.40 2.80 1.50 2.90 ns
Figures 1, 2
tPHL CP to Output (Note 2)
tTLH Transition Time 0.40 2.50 0.45 1.90 0.45 1.90 ns
Figures 1, 2
tTHL 20% to 80%, 80% to 20%
tsSetup Time
Dn0.60 1.00 1.00
CEN (Disable Time) 0.90 0.30 0.30 ns
Figures 1, 3
CEN (Release Time) 1.40 1.00 1.00
thHold Time Dn0.30 0 0 ns
Figures 1, 4
tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns
Figures 1, 2
Note 2: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
5
Military VersionÐPreliminary
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
55§Ctoa
125§C
Symbol Parameter Min Max Units TCConditions Notes
VOH Output HIGH Voltage b1025 b870 mV 0§Cto
a
125§C
b1085 b870 mV b55§CV
IN eVIH (Max) Loading with 1, 2, 3
VOL Output LOW Voltage b1830 b1620 mV 0§Cto or VIL (Min) 50Xto b2.0V
a125§C
b1830 b1555 mV b55§C
VOHC Output HIGH Voltage b1035 mV 0§Cto
a
125§C
b1085 mV b55§CV
IN eVIH (Min) Loading with 1, 2, 3
VOLC Output LOW Voltage b1610 mV 0§Cto or VIL (Max) 50Xto b2.0V
a125§C
b1555 mV b55§C
VIH Input HIGH Voltage b1165 b870 mV b55§C to Guaranteed HIGH Signal for all Inputs 1, 2, 3, 4
a125§C
VIL Input LOW Voltage b1830 b1475 mV b55§C to Guaranteed LOW Signal for all Inputs 1, 2, 3, 4
a125§C
IIL Input LOW Current 0.50 mAb55§Cto V
EE eb
4.2V 1, 2, 3
a125§CV
IN eVIL (Min)
IIH Input HIGH Current 240 mA0§Cto
V
IN eVIH (Max)
VEE eb
5.7V 1, 2, 3
a125§C
340 mAb55§C
IEE Power Supply Current b55§Cto Inputs Open
b125 b50 mA a125§CVEE eb
4.2V to b4.8V 1, 2, 3
b130 VEE eb
4.2V to b5.7V
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides ‘‘cold start’’ specs which can be
considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at b55§C, a25§C, and a125§C, Subgroups 1, 2, 3, 7, and 8.
Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at b55§C, a25§C, and a125§C, Subgroups A1, 2, 3, 7, and 8.
Note 4: Guaranteed by applying specified input condition and testing VOH/VOL.
6
Military VersionÐPreliminary (Continued)
AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCeb
55§CT
C
ea
25§CT
C
ea
125§CUnits Conditions Notes
Min Max Min Max Min Max
fmax Toggle Frequency 400 400 400 MHz
Figures 1, 2
4
tPLH Propagation Delay 0.70 3.30 0.80 3.10 0.80 3.80 ns 1, 2, 3, 5
tPHL CP to Output
Figures 1, 2
tTLH Transition Time 0.40 2.50 0.40 2.40 0.40 2.70 ns 4
tTHL 20% to 80%, 80% to 20%
tsSetup Time
Dn0.60 0.60 0.60
CEN (Disable Time) 0.90 0.70 0.90 ns
Figures 1, 3
4
CEN (Release Time) 1.40 1.40 2.10
thHold Time Dn0.30 0.30 0.30 ns
Figures 1, 4
4
tpw(H) Pulse Width HIGH CP 2.00 2.00 2.00 ns
Figures 1, 2
4
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately after power-up. This provides ‘‘cold start’’ specs which can be considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at a25§C temperature only, Subgroup A9.
Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at a25§C, Subgroup A9, and at a125§C and b55§C, temperatures, Subgroups A10 and
A11.
Note 4: Not tested at a25§C, a125§C, and b55§C temperature (design characterization data).
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
7
Test Circuitry
TL/F/9882 6
Notes: FIGURE 1. AC, Toggle Frequency Test Circuit
VCC,V
CCA ea
2V, VEE eb
2.5V
L1 and L2 eequal length 50Ximpedance lines
RTe50Xterminator internal to scope
Decoupling 0.1 mF from GND to VCC and VEE
All unused outputs are loaded with 50Xto GND
CLeFixture and stray capacitance s3pF
Switching Waveforms
TL/F/9882 8
FIGURE 2. Propagation Delay (Clock) and Transition Times
8
Switching Waveforms (Continued)
TL/F/9882 9
FIGURE 3. Setup and Pulse Width Times
TL/F/9882 10
FIGURE 4. Data Setup and Hold Time
Note 1: tsis the minimum time before the transition of the clock that information must be present at the data input.
Note 2: this the minimum time after the transition of the clock that information must remain unchanged at the data input.
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are
defined as follows:
100353 D C QB
Device Type (Basic) Special Variations
QB eMilitary grade device with environmental
Package Code and burn-in processing
DeCeramic DIP
FeQuad Cerpak Temperature Range
QePlastic Leaded Chip Carrier (PCC) C eCommercial (0§Ctoa
85§C)
PePlastic DIP I eIndustrial (b40§Ctoa
85§C)
(PCC only)
MeMilitary (b55§Ctoa
125§C)
9
Physical Dimensions inches (millimeters)
24-Lead Ceramic Dual-In-Line Package (0.400×Wide) (D)
NS Package Number J24E
10
Physical Dimensions inches (millimeters) (Continued)
24-Lead Plastic Dual-In-Line Package (P)
NS Package Number N24E
28-Lead Plastic Chip Carrier (Q)
NS Package Number V28A
---OVERFLOWDATATHISPAGE---
11
100353 Low Power 8-Bit Register
Physical Dimensions inches (millimeters) (Continued) Lit. Ý114921
24 Lead Quad Cerpak (F)
NS Package Number W24B
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