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LM2578A/LM3578A Switching Regulator

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1FEATURES DESCRIPTION

The LM2578A is a switching regulator which can

2• Inverting and Non-Inverting Feedback Inputs easily be set up for such DC-to-DC voltage

• 1.0V Reference at Inputs conversion circuits as the buck, boost, and inverting

• Operates from Supply Voltages of 2V to 40V configurations. The LM2578A features a unique

comparator input stage which not only has separate

• Output Current up to 750 mA, Saturation Less pins for both the inverting and non-inverting inputs,

than 0.9V but also provides an internal 1.0V reference to each

• Current Limit and Thermal Shut Down input, thereby simplifying circuit design and p.c. board

• Duty Cycle up to 90% layout. The output can switch up to 750 mA and has

output pins for its collector and emitter to promote

design flexibility. An external current limit terminal

APPLICATIONS may be referenced to either the ground or the Vin

• Switching Regulators in Buck, Boost, terminal, depending upon the application. In addition,

Inverting, and Single-Ended Transformer the LM2578A has an on board oscillator, which sets

Configurations the switching frequency with a single external

capacitor from <1 Hz to 100 kHz (typical).

• Motor Speed Control

• Lamp Flasher The LM2578A is an improved version of the LM2578,

offering higher maximum ratings for the total supply

voltage and output transistor emitter and collector

voltages.

Connection Diagram

Figure 1. PDIP/SOIC Package

See Package Number D0008A or P0008E

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

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Functional Diagram

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings (1)(2)

Total Supply Voltage 50V

Collector Output to Ground −0.3V to +50V

Emitter Output to Ground (3) −1V to +50V

Power Dissipation (4) Internally limited

Output Current 750 mA

Storage Temperature −65°C to +150°C

Lead Temperature (soldering, 10 seconds) 260°C

Maximum Junction Temperature 150°C

ESD Tolerance (5) 2 kV

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not

apply when operating the device beyond its rated operating conditions.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3) For TJ≥100°C, the Emitter pin voltage should not be driven more than 0.6V below ground (see Application Information).

(4) At elevated temperatures, devices must be derated based on package thermal resistance. The device in the 8-pin DIP must be derated

at 95°C/W, junction to ambient. The device in the SOIC package must be derated at 150°C/W, junction-to-ambient.

(5) Human body model, 1.5 kΩin series with 100 pF.

Operating Ratings

Ambient Temperature Range LM2578A −40°C ≤TA≤+85°C

LM3578A 0°C ≤TA≤+70°C

Junction Temperature Range LM2578A −40°C ≤TJ≤+125°C

LM3578A 0°C ≤TJ≤+125°C

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Electrical Characteristics

These specifications apply for 2V ≤VIN ≤40V (2.2V ≤VIN ≤40V for TJ≤ −25°C), timing capacitor CT= 3900 pF, and 25% ≤

duty cycle ≤75%, unless otherwise specified. Values in standard typeface are for TJ= 25°C; values in boldface type apply

for operation over the specified operating junction temperature range. Typical(1) LM2578A/

Symbol Parameter Conditions LM3578A Units

Limit (2)

OSCILLATOR

fOSC Frequency 20 kHz

24 kHz (max)

16 kHz (min)

ΔfOSC/ΔT Frequency Drift with Temperature −0.13 %/°C

Amplitude 550 mVp-p

REFERENCE/COMPARATOR(3)

VRInput Reference I1= I2= 0 mA and 1.0 V

Voltage I1= I2= 1 mA ±1% (4) 1.050/1.070 V (max)

0.950/0.930 V (min)

ΔVR/ΔVIN Input Reference Voltage Line I1= I2= 0 mA and 0.003 %/V

Regulation I1= I2= 1 mA ±1% (4) 0.01/0.02 %/V (max)

IINV Inverting Input Current I1= I2= 0 mA, duty cycle = 25% 0.5 μA

Level Shift Accuracy Level Shift Current = 1 mA 1.0 %

10/13 % (max)

ΔVR/Δt Input Reference Voltage Long Term 100 ppm/1000h

Stability

OUTPUT

VC(sat) Collector Saturation Voltage IC= 750 mA pulsed, Emitter 0.7 V

grounded 0.90/1.2 V (max)

VE(sat) Emitter Saturation Voltage IO= 80 mA pulsed, 1.4 V

VIN = VC= 40V 1.7/2.0 V (max)

ICES Collector Leakage Current VIN = VCE = 40V, Emitter grounded, 0.1 μA

Output OFF 200/250 μA (max)

BVCEO(SUS) Collector-Emitter Sustaining Voltage ISUST = 0.2A (pulsed), VIN = 0 60 V

50 V (min)

CURRENT LIMIT

VCL Sense Voltage Shutdown Level Referred to VIN or Ground 110 mV

See (5) 80 mV (min)

160 mV (max)

ΔVCL/ΔT Sense Voltage Temperature Drift 0.3 %/°C

ICL Sense Bias Current Referred to VIN 4.0 μA

Referred to ground 0.4 μA

(1) Typical values are for TJ= 25°C and represent the most likely parametric norm.

(2) All limits specified at room temperature (standard type face) and at temperature extremes (bold type face). Room temperature limits are

100% production tested. Limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC)

methods. All limits are used to calculate AOQL.

(3) Input terminals are protected from accidental shorts to ground but if external voltages higher than the reference voltage are applied,

excessive current will flow and should be limited to less than 5 mA.

(4) I1and I2are the external sink currents at the inputs (refer to Test Circuit).

(5) Connection of a 10 kΩresistor from pin 1 to pin 4 will drive the duty cycle to its maximum, typically 90%. Applying the minimum Current

Limit Sense Voltage to pin 7 will not reduce the duty cycle to less than 50%. Applying the maximum Current Limit Sense Voltage to pin 7

is certain to reduce the duty cycle below 50%. Increasing this voltage by 15 mV may be required to reduce the duty cycle to 0%, when

the Collector output swing is 40V or greater (see Ground-Referred Current Limit Sense Voltage typical curve).

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Electrical Characteristics (continued)

These specifications apply for 2V ≤VIN ≤40V (2.2V ≤VIN ≤40V for TJ≤ −25°C), timing capacitor CT= 3900 pF, and 25% ≤

duty cycle ≤75%, unless otherwise specified. Values in standard typeface are for TJ= 25°C; values in boldface type apply

for operation over the specified operating junction temperature range. Typical(1) LM2578A/

Symbol Parameter Conditions LM3578A Units

Limit (2)

DEVICE POWER CONSUMPTION

ISSupply Current Output OFF, VE= 0V 2.0 mA

3.5/4.0 mA (max)

Output ON, IC= 750 mA pulsed, 14 mA

VE= 0V

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Typical Performance Characteristics

Oscillator Frequency Change

with Temperature Oscillator Voltage Swing

Figure 2. Figure 3.

Collector Saturation Voltage

Input Reference Voltage (Sinking Current,

Drift with Temperature Emitter Grounded)

Figure 4. Figure 5.

Emitter Saturation Voltage

(Sourcing Current, Ground Referred

Collector at Vin) Current Limit Sense Voltage

Figure 6. Figure 7.

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Typical Performance Characteristics (continued)

Current Limit Sense Voltage Current Limit Response Time

Drift with Temperature for Various Over Drives

Figure 8. Figure 9.

Current Limit Sense Voltage

vs Supply Voltage Supply Current

Figure 10. Figure 11.

Collector Current with

Supply Current Emitter Output Below Ground

Figure 12. Figure 13.

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TEST CIRCUIT*

Parameter tests can be made using the test circuit shown. Select the desired Vin, collector voltage and duty cycle

with adjustable power supplies. A digital volt meter with an input resistance greater than 100 MΩshould be used

to measure the following:

Input Reference Voltage to Ground; S1 in either position.

Level Shift Accuracy (%) = (TP3(V)/1V) × 100%; S1 at I1= I2= 1 mA

Input Current (mA) = (1V −Tp3 (V))/1 MΩ: S1 at I1= I2= 0 mA.

Oscillator parameters can be measured at Tp4 using a frequency counter or an oscilloscope.

The Current Limit Sense Voltage is measured by connecting an adjustable 0-to-1V floating power supply in

series with the current limit terminal and referring it to either the ground or the Vin terminal. Set the duty cycle to

90% and monitor test point TP5 while adjusting the floating power supply voltage until the LM2578A's duty cycle

just reaches 0%. This voltage is the Current Limit Sense Voltage.

The Supply Current should be measured with the duty cycle at 0% and S1 in the I1= I2= 0 mA position.

*LM2578A specifications are measured using automated test equipment. This circuit is provided for the

customer's convenience when checking parameters. Due to possible variations in testing conditions, the

measured values from these testing procedures may not match those of the factory.

Op amp supplies are ±15V

DVM input resistance >100 MΩ

*LM2578 max duty cycle is 90%

Definition of Terms

Input Reference Voltage: The voltage (referred to ground) that must be applied to either the inverting or non-

inverting input to cause the regulator switch to change state (ON or OFF).

Input Reference Current: The current that must be drawn from either the inverting or non-inverting input to

cause the regulator switch to change state (ON or OFF).

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Input Level Shift Accuracy: This specification determines the output voltage tolerance of a regulator whose

output control depends on drawing equal currents from the inverting and non-inverting inputs (see the Inverting

Regulator of Figure 34, and the RS-232 Line Driver Power Supply of Figure 36).

Level Shift Accuracy is tested by using two equal-value resistors to draw current from the inverting and non-

inverting input terminals, then measuring the percentage difference in the voltages across the resistors that

produces a controlled duty cycle at the switch output.

Collector Saturation Voltage: With the inverting input terminal grounded thru a 10 kΩresistor and the output

transistor's emitter connected to ground, the Collector SaturationVoltage is the collector-to-emitter voltage for a

given collector current.

Emitter Saturation Voltage: With the inverting input terminal grounded thru a 10 kΩresistor and the output

transistor's collector connected to Vin, the Emitter Saturation Voltage is the collector-to-emitter voltage for a given

emitter current.

Collector Emitter Sustaining Voltage: The collector-emitter breakdown voltage of the output transistor,

measured at a specified current.

Current Limit Sense Voltage: The voltage at the Current Limit pin, referred to either the supply or the ground

terminal, which (via logic circuitry) will cause the output transistor to turn OFF and resets cycle-by-cycle at the

oscillator frequency.

Current Limit Sense Current: The bias current for the Current Limit terminal with the applied voltage equal to

the Current Limit Sense Voltage.

Supply Current: The IC power supply current, excluding the current drawn through the output transistor, with the

oscillator operating.

Functional Description

The LM2578A is a pulse-width modulator designed for use as a switching regulator controller. It may also be

used in other applications which require controlled pulse-width voltage drive.

A control signal, usually representing output voltage, fed into the LM2578A's comparator is compared with an

internally-generated reference. The resulting error signal and the oscillator's output are fed to a logic network

which determines when the output transistor will be turned ON or OFF. The following is a brief description of the

subsections of the LM2578A.

COMPARATOR INPUT STAGE

The LM2578A's comparator input stage is unique in that both the inverting and non-inverting inputs are available

to the user, and both contain a 1.0V reference. This is accomplished as follows: A 1.0V reference is fed into a

modified voltage follower circuit (see FUNCTIONAL DIAGRAM). When both input pins are open, no current flows

through R1 and R2. Thus, both inputs to the comparator will have the potential of the 1.0V reference, VA. When

one input, for example the non-inverting input, is pulled ΔV away from VA, a current of ΔV/R1 will flow through

R1. This same current flows through R2, and the comparator sees a total voltage of 2ΔV between its inputs. The

high gain of the system, through feedback, will correct for this imbalance and return both inputs to the 1.0V level.

This unusual comparator input stage increases circuit flexibility, while minimizing the total number of external

components required for a voltage regulator system. The inverting switching regulator configuration, for example,

can be set up without having to use an external op amp for feedback polarity reversal (see TYPICAL

APPLICATIONS).

OSCILLATOR

The LM2578A provides an on-board oscillator which can be adjusted up to 100 kHz. Its frequency is set by a

single external capacitor, C1, as shown in Figure 14, and follows the equation

fOSC = 8×10−5/C1

The oscillator provides a blanking pulse to limit maximum duty cycle to 90%, and a reset pulse to the internal

circuitry.

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Figure 14. Value of Timing Capacitor vs Oscillator Frequency

OUTPUT TRANSISTOR

The output transistor is capable of delivering up to 750 mA with a saturation voltage of less than 0.9V. (see

Collector Saturation Voltage and Emitter Saturation Voltage curves).

The emitter must not be pulled more than 1V below ground (this limit is 0.6V for TJ≥100°C). Because of this

limit, an external transistor must be used to develop negative output voltages (see the Inverting Regulator Typical

Application). Other configurations may need protection against violation of this limit (see the Emitter Output

section of the Applications Information).

CURRENT LIMIT

The LM2578A's current limit may be referenced to either the ground or the Vin pins, and operates on a cycle-by-

cycle basis.

The current limit section consists of two comparators: one with its non-inverting input referenced to a voltage

110 mV below Vin, the other with its inverting input referenced 110 mV above ground (see FUNCTIONAL

DIAGRAM). The current limit is activated whenever the current limit terminal is pulled 110 mV away from either

Vin or ground.

Applications Information

CURRENT LIMIT

As mentioned in the functional description, the current limit terminal may be referenced to either the Vin or the

ground terminal. Resistor R3 converts the current to be sensed into a voltage for current limit detection.

Figure 15. Current Limit, Ground Referred

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Figure 16. Current Limit, Vin Referred

CURRENT LIMIT TRANSIENT SUPPRESSION

When noise spikes and switching transients interfere with proper current limit operation, R1 and C1 act together

as a low pass filter to control the current limit circuitry's response time.

Because the sense current of the current limit terminal varies according to where it is referenced, R1 should be

less than 2 kΩwhen referenced to ground, and less than 100Ωwhen referenced to Vin.

Figure 17. Current Limit Transient Suppressor, Ground Referred

Figure 18. Current Limit Transient Suppressor, Vin Referred

C.L. SENSE VOLTAGE MULTIPLICATION

When a larger sense resistor value is desired, the voltage divider network, consisting of R1 and R2, may be

used. This effectively multiplies the sense voltage by (1 + R1/R2). Also, R1 can be replaced by a diode to

increase current limit sense voltage to about 800 mV (diode Vf+ 110 mV).

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Figure 19. Current Limit Sense Voltage Multiplication, Ground Referred

Figure 20. Current Limit Sense Voltage Multiplication, Vin Referred

UNDER-VOLTAGE LOCKOUT

Under-voltage lockout is accomplished with few external components. When Vin becomes lower than the zener

breakdown voltage, the output transistor is turned off. This occurs because diode D1 will then become forward

biased, allowing resistor R3 to sink a greater current from the non-inverting input than is sunk by the parallel

combination of R1 and R2 at the inverting terminal. R3 should be one-fifth of the value of R1 and R2 in parallel.

Figure 21. Under-Voltage Lockout

MAXIMUM DUTY CYCLE LIMITING

The maximum duty cycle can be externally limited by adjusting the charge to discharge ratio of the oscillator

capacitor with a single external resistor. Typical values are 50 μA for the charge current, 450 μA for the

discharge current, and a voltage swing from 200 mV to 750 mV. Therefore, R1 is selected for the desired

charging and discharging slopes and C1 is readjusted to set the oscillator frequency.

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Figure 22. Maximum Duty Cycle Limiting

DUTY CYCLE ADJUSTMENT

When manual or mechanical selection of the output transistor's duty cycle is needed, the cirucit shown below

may be used. The output will turn on with the beginning of each oscillator cycle and turn off when the current

sunk by R2 and R3 from the non-inverting terminal becomes greater than the current sunk from the inverting

terminal.

With the resistor values as shown, R3 can be used to adjust the duty cycle from 0% to 90%.

When the sum of R2 and R3 is twice the value of R1, the duty cycle will be about 50%. C1 may be a large

electrolytic capacitor to lower the oscillator frequency below 1 Hz.

Figure 23. Duty Cycle Adjustment

REMOTE SHUTDOWN

The LM2578A may be remotely shutdown by sinking a greater current from the non-inverting input than from the

inverting input. This may be accomplished by selecting resistor R3 to be approximately one-half the value of R1

and R2 in parallel.

Figure 24. Shutdown Occurs when VLis High

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EMITTER OUTPUT

When the LM2578A output transistor is in the OFF state, if the Emitter output swings below the ground pin

voltage, the output transistor will turn ON because its base is clamped near ground. The Collector Current with

Emitter Output Below Ground curve shows the amount of Collector current drawn in this mode, vs temperature

and Emitter voltage. When the Collector-Emitter voltage is high, this current will cause high power dissipation in

the output transistor and should be avoided.

This situation can occur in the high-current high-voltage buck application if the Emitter output is used and the

catch diode's forward voltage drop is greater than 0.6V. A fast-recovery diode can be added in series with the

Emitter output to counter the forward voltage drop of the catch diode (see Figure 15). For better efficiency of a

high output current buck regulator, an external PNP transistor should be used as shown in Figure 29.

Figure 25. D1 Prevents Output Transistor from Improperly Turning ON due to D2's Forward Voltage

SYNCHRONIZING DEVICES

When several devices are to be operated at once, their oscillators may be synchronized by the application of an

external signal. This drive signal should be a pulse waveform with a minimum pulse width of 2 μs. and an

amplitude from 1.5V to 2.0V. The signal source must be capable of 1.) driving capacitive loads and 2.) delivering

up to 500 μA for each LM2578A.

Capacitors C1 thru CN are to be selected for a 20% slower frequency than the synchronization frequency.

Figure 26. Synchronizing Devices

Typical Applications

The LM2578A may be operated in either the continuous or the discontinuous conduction mode. The following

applications (except for the Buck-Boost Regulator) are designed for continuous conduction operation. That is, the

inductor current is not allowed to fall to zero. This mode of operation has higher efficiency and lower EMI

characteristics than the discontinuous mode.

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BUCK REGULATOR

The buck configuration is used to step an input voltage down to a lower level. Transistor Q1 in Figure 27 chops

the input DC voltage into a squarewave. This squarewave is then converted back into a DC voltage of lower

magnitude by the low pass filter consisting of L1 and C1. The duty cycle, D, of the squarewave relates the output

voltage to the input voltage by the following equation:

Vout = D × Vin = Vin × (ton)/(ton + toff).

Figure 27. Basic Buck Regulator

Figure 28 is a 15V to 5V buck regulator with an output current, Io, of 350 mA. The circuit becomes discontinuous

at 20% of Io(max), has 10 mV of output voltage ripple, an efficiency of 75%, a load regulation of 30 mV (70 mA to

350 mA) and a line regulation of 10 mV (12 ≤Vin ≤18V).

Component values are selected as follows:

R1 = (Vo−1) × R2 where R2 = 10 kΩ

R3 = V/Isw(max)

R3 = 0.15Ω

where:

V is the current limit sense voltage, 0.11V

Isw(max) is the maximum allowable current thru the output transistor.

L1 is the inductor and may be found from the inductance calculation chart (Figure 29) as follows:

Given Vin = 15V

Vo= 5V

Io(max) = 350 mA

fOSC = 50 kHz

Discontinuous at 20% of Io(max).

Note that since the circuit will become discontinuous at 20% of Io(max), the load current must not be allowed to fall

below 70 mA.

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Vin = 15V R3 = 0.15Ω

Vo= 5V C1 = 1820 pF

Vripple = 10 mV C2 = 220 μF

Io= 350 mA C3 = 20 pF

fosc = 50 kHz L1 = 470 μH

R1 = 40 kΩD1 = 1N5818

R2 = 10 kΩ

Figure 28. Buck or Step-Down Regulator

Figure 29. DC/DC Inductance Calculator

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Step 1: Calculate the maximum DC current through the inductor, IL(max). The necessary equations are indicated

at the top of the chart and show that IL(max) = Io(max) for the buck configuration. Thus, IL(max) = 350 mA.

Step 2: Calculate the inductor Volts-sec product, E-Top, according to the equations given from the chart. For the

Buck:

E-Top = (Vin −Vo) (Vo/Vin) (1000/fosc)

=(15 −5) (5/15) (1000/50)

= 66V-μs.

with the oscillator frequency, fosc, expressed in kHz.

Step 3: Using the graph with axis labeled “Discontinuous At % IOUT” and “IL(max, DC)” find the point where the

desired maximum inductor current, IL(max, DC) intercepts the desired discontinuity percentage.

In this example, the point of interest is where the 0.35A line intersects with the 20% line. This is nearly the

midpoint of the horizontal axis.

Step 4: This last step is merely the translation of the point found in Step 3 to the graph directly below it. This is

accomplished by moving straight down the page to the point which intercepts the desired E-Top. For this

example, E-Top is 66V-μs and the desired inductor value is 470 μH. Since this example was for 20%

discontinuity, the bottom chart could have been used directly, as noted in step 3 of the chart instructions.

For a full line of standard inductor values, contact Pulse Engineering (San Diego, Calif.) regarding their PE526XX

series, or A. I. E. Magnetics (Nashville, Tenn.).

A more precise inductance value may be calculated for the Buck, Boost and Inverting Regulators as follows:

BUCK

L=Vo(Vin −Vo)/(ΔILVin fosc)

BOOST

L=Vin (Vo−Vin)/(ΔILfosc Vo)

INVERT

L=Vin |Vo|/[ΔIL(Vin + |Vo|)fosc]

where ΔILis the current ripple through the inductor. ΔILis usually chosen based on the minimum load current

expected of the circuit. For the buck regulator, since the inductor current ILequals the load current IO,

ΔIL=2•IO(min)

ΔIL= 140 mA for this circuit. ΔILcan also be interpreted as

ΔIL= 2 • (Discontinuity Factor) • IL

where the Discontinuity Factor is the ratio of the minimum load current to the maximum load current. For this

example, the Discontinuity Factor is 0.2.

The remainder of the components of Figure 28 are chosen as follows:

C1 is the timing capacitor found in Figure 14.

C2 ≥Vo(Vin −Vo)/(8fosc2VinVrippleL1)

where Vripple is the peak-to-peak output voltage ripple.

C3 is necessary for continuous operation and is generally in the 10 pF to 30 pF range.

D1 should be a Schottky type diode, such as the 1N5818 or 1N5819.

BUCK WITH BOOSTED OUTPUT CURRENT

For applications requiring a large output current, an external transistor may be used as shown in Figure 30. This

circuit steps a 15V supply down to 5V with 1.5A of output current. The output ripple is 50 mV, with an efficiency

of 80%, a load regulation of 40 mV (150 mA to 1.5A), and a line regulation of 20 mV (12V ≤Vin ≤18V).

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Component values are selected as outlined for the buck regulator with a discontinuity factor of 10%, with the

addition of R4 and R5:

R4 = 10VBE1Bf/Ip

R5 = (Vin −V−VBE1 −Vsat) Bf/(IL(max, DC) + IR4)

where:

VBE1 is the VBE of transistor Q1.

Vsat is the saturation voltage of the LM2578A output transistor.

V is the current limit sense voltage.

Bfis the forced current gain of transistor Q1 (Bf= 30 for Figure 30).

IR4 = VBE1/R4

Ip= IL(max, DC) + 0.5ΔIL

Vin = 15V R4 = 200Ω

Vo= 5V R5 = 330Ω

Vripple = 50 mV C1 = 1820 pF

Io= 1.5A C2 = 330 μF

fosc = 50 kHz C3 = 20 pF

R1 = 40 kΩL1 = 220 μH

R2 = 10 kΩD1 = 1N5819

R3 = 0.05ΩQ1 = D45

Figure 30. Buck Converter with Boosted Output Current

BOOST REGULATOR

The boost regulator converts a low input voltage into a higher output voltage. The basic configuration is shown in

Figure 31. Energy is stored in the inductor while the transistor is on and then transferred with the input voltage to

the output capacitor for filtering when the transistor is off. Thus,

Vo= Vin + Vin(ton/toff).

Figure 31. Basic Boost Regulator

The circuit of Figure 32 converts a 5V supply into a 15V supply with 150 mA of output current, a load regulation

of 14 mV (30 mA to 140 mA), and a line regulation of 35 mV (4.5V ≤Vin ≤8.5V).

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Vin = 5V R4 = 200 kΩ

Vo= 15V C1 = 1820 pF

Vripple = 10 mV C2 = 470 μF

Io= 140 mA C3 = 20 pF

fosc = 50 kHz C4 = 0.0022 μF

R1 = 140 kΩL1 = 330 μH

R2 = 10 kΩD1 = 1N5818

R3 = 0.15Ω

Figure 32. Boost or Step-Up Regulator

R1 = (Vo−1) R2 where R2 = 10 kΩ.

R3 = V/(IL(max, DC) + 0.5 ΔIL)

where:

ΔIL= 2(ILOAD(min))(Vo/Vin)

ΔILis 200 mA in this example.

R4, C3 and C4 are necessary for continuous operation and are typically 220 kΩ, 20 pF, and 0.0022 μF

respectively.

C1 is the timing capacitor found in Figure 14.

C2 ≥Io(Vo−Vin)/(fosc VoVripple).

D1 is a Schottky type diode such as a 1N5818 or 1N5819.

L1 is found as described in the buck converter section, using the inductance chart for Figure 29 for the boost

configuration and 20% discontinuity.

INVERTING REGULATOR

Figure 33 shows the basic configuration for an inverting regulator. The input voltage is of a positive polarity, but

the output is negative. The output may be less than, equal to, or greater in magnitude than the input. The

relationship between the magnitude of the input voltage and the output voltage is Vo= Vin × (ton/toff).

Figure 33. Basic Inverting Regulator

Figure 34 shows an LM2578A configured as a 5V to −15V polarity inverter with an output current of 300 mA, a

load regulation of 44 mV (60 mA to 300 mA) and a line regulation of 50 mV (4.5V ≤Vin ≤8.5V).

Product Folder Links: LM2578A LM3578A

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SNVS767E –AUGUST 2000–REVISED APRIL 2013

R1 = (|Vo| +1) R2 where R2 = 10 kΩ.

R3 = V/(IL(max, DC) + 0.5 ΔIL).

R4 = 10VBE1Bf/(IL (max, DC) + 0.5 ΔIL)

where:

V, VBE1, Vsat, and Bfare defined in the Buck Converter with Boosted Output Current section.

ΔIL= 2(ILOAD(min))(Vin +|Vo|)/VIN

R5 is defined in the Buck Converter with Boosted Output Current section.

R6 serves the same purpose as R4 in the Boost Regulator circuit and is typically 220 kΩ.

C1, C3 and C4 are defined in the Boost Regulator section.

C2 ≥Io|Vo|/[fosc(|Vo| + Vin) Vripple]

L1 is found as outlined in the section on buck converters, using the inductance chart of Figure 29 for the invert

configuration and 20% discontinuity.

Vin = 5V R4 = 190Ω

Vo=−15V R5 = 82Ω

Vripple = 5 mV R6 = 220 kΩ

Io= 300 mA C1 = 1820 pF

Imin = 60 mA C2 = 1000 μF

fosc = 50 kHz C3 = 20 pF

R1 = 160 kΩC4 = 0.0022 μF

R2 = 10 kΩL1 = 150 μH

R3 = 0.01ΩD1 = 1N5818

Figure 34. Inverting Regulator

BUCK-BOOST REGULATOR

The Buck-Boost Regulator, shown in Figure 35, may step a voltage up or down, depending upon whether or not

the desired output voltage is greater or less than the input voltage. In this case, the output voltage is 12V with an

input voltage from 9V to 15V. The circuit exhibits an efficiency of 75%, with a load regulation of 60 mV (10 mA to

100 mA) and a line regulation of 52 mV.

R1 = (Vo−1) R2 where R2 = 10 kΩ

R3 = V/0. 75A

R4, C1, C3 and C4 are defined in the Boost Regulator section.

D1 and D2 are Schottky type diodes such as the 1N5818 or 1N5819.

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where:

Vdis the forward voltage drop of the diodes.

Vsat is the saturation voltage of the LM2578A output transistor.

Vsat1 is the saturation voltage of transistor Q1.

L1 ≥(Vin −Vsat −Vsat1) (ton/Ip) (1)

where:

RS-232 LINE DRIVER POWER SUPPLY

The power supply, shown in Figure 36, operates from an input voltage as low as 4.2V (5V nominal), and delivers

an output of ±12V at ±40 mA with better than 70% efficiency. The circuit provides a load regulation of ±150 mV

(from 10% to 100% of full load) and a line regulation of ±10 mV. Other notable features include a cycle-by-cycle

current limit and an output voltage ripple of less than 40 mVp-p.

A unique feature of this circuit is its use of feedback from both outputs. This dual feedback configuration results

in a sharing of the output voltage regulation by each output so that neither side becomes unbalanced as in single

feedback systems. In addition, since both sides are regulated, it is not necessary to use a linear regulator for

output regulation.

The feedback resistors, R2 and R3, may be selected as follows by assuming a value of 10 kΩfor R1;

R2 = (Vo−1V)/45.8 μA = 240 kΩ

R3 = (|Vo| +1V)/54.2 μA = 240 kΩ

Actually, the currents used to program the values for the feedback resistors may vary from 40 μA to 60 μA, as

long as their sum is equal to the 100 μA necessary to establish the 1V threshold across R1. Ideally, these

currents should be equal (50 μA each) for optimal control. However, as was done here, they may be mismatched

in order to use standard resistor values. This results in a slight mismatch of regulation between the two outputs.

The current limit resistor, R4, is selected by dividing the current limit threshold voltage by the maximum peak

current level in the output switch. For our purposes R4 = 110 mV/750 mA = 0.15Ω. A value of 0.1Ωwas used.

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SNVS767E –AUGUST 2000–REVISED APRIL 2013

9V ≤Vin ≤15V R5 = 270

Vo= 12V C1 = 1820 pF

Io= 100 mA C2 = 220 μF

Vripple = 50 mV C3 = 20 pF

fosc = 50 kHz C4 = 0.0022 μF

R1 = 110k L1 = 220 μH

R2 = 10k D1, D2 = 1N5819

R3 = 0.15 Q1 = D44

R4 = 220k

Figure 35. Buck-Boost Regulator

Vin = 5V R4 = 0.15Ω

Vo±12V C1 = 820 pF

Io= ±40 mA C2 = 10 pF

fosc = 80 kHz C3 = 220 μF

R1 = 10 kΩD1, D2, D3 = 1N5819

R2 = 240 kΩT1 = PE-64287

R3 = 240 kΩ

Figure 36. RS-232 Line Driver Power Supply

Capacitor C1 sets the oscillator frequency and is selected from Figure 14.

Capacitor C2 serves as a compensation capacitor for synchronous operation and a value of 10 to 50 pF should

be sufficient for most applications.

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A minimum value for an ideal output capacitor C3, could be calculated as C = Io× t/ΔV where Iois the load

current, t is the transistor on time (typically 0.4/fosc), and ΔV is the peak-to-peak output voltage ripple. A larger

output capacitor than this theoretical value should be used since electrolytics have poor high frequency

performance. Experience has shown that a value from 5 to 10 times the calculated value should be used.

For good efficiency, the diodes must have a low forward voltage drop and be fast switching. 1N5819 Schottky

diodes work well.

Transformer selection should be picked for an output transistor “on” time of 0.4/fosc, and a primary inductance

high enough to prevent the output transistor switch from ramping higher than the transistor's rating of 750 mA.

Pulse Engineering (San Diego, Calif.) and Renco Electronics, Inc. (Deer Park, N.Y.) can provide further

assistance in selecting the proper transformer for a specific application need. The transformer used in Figure 36

was a Pulse Engineering PE-64287.

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SNVS767E –AUGUST 2000–REVISED APRIL 2013

REVISION HISTORY

Changes from Revision D (April 2013) to Revision E Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 22

Product Folder Links: LM2578A LM3578A

PACKAGE OPTION ADDENDUM

www.ti.com 11-Jan-2021

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM2578AM NRND SOIC D 8 95 Non-RoHS

& Green Call TI Call TI -40 to 125 2578

LM2578AM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 2578

LM2578AMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 2578

LM2578AN/NOPB ACTIVE PDIP P 8 40 RoHS & Green SN Level-1-NA-UNLIM -40 to 125 LM2578AN

LM3578AM NRND SOIC D 8 95 Non-RoHS

& Green Call TI Call TI 0 to 125 3578

LM3578AM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 3578

LM3578AMX NRND SOIC D 8 2500 Non-RoHS

& Green Call TI Call TI 0 to 125 3578

LM3578AMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 3578

LM3578AN/NOPB ACTIVE PDIP P 8 40 RoHS & Green SN Level-1-NA-UNLIM 0 to 125 LM3578AN

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

PACKAGE OPTION ADDENDUM

www.ti.com 11-Jan-2021

Addendum-Page 2

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM2578AMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LM3578AMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LM3578AMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 29-Sep-2019

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM2578AMX/NOPB SOIC D 8 2500 367.0 367.0 35.0

LM3578AMX SOIC D 8 2500 367.0 367.0 35.0

LM3578AMX/NOPB SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 29-Sep-2019

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

.228-.244 TYP

[5.80-6.19]

.069 MAX

[1.75]

6X .050

[1.27]

8X .012-.020

[0.31-0.51]

.150

[3.81]

.005-.010 TYP

[0.13-0.25]

0 - 8 .004-.010

[0.11-0.25]

.010

[0.25]

.016-.050

[0.41-1.27]

4X (0 -15 )

.189-.197

[4.81-5.00]

NOTE 3

B .150-.157

[3.81-3.98]

NOTE 4

4X (0 -15 )

(.041)

[1.04]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

.010 [0.25] C A B

PIN 1 ID AREA

SEATING PLANE

.004 [0.1] C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 2.800

www.ti.com

EXAMPLE BOARD LAYOUT

.0028 MAX

[0.07]

ALL AROUND

.0028 MIN

[0.07]

ALL AROUND

(.213)

[5.4]

6X (.050 )

[1.27]

8X (.061 )

[1.55]

8X (.024)

[0.6]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

OPENING

SOLDER MASK METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SYMM

SEE

DETAILS

SYMM

www.ti.com

EXAMPLE STENCIL DESIGN

8X (.061 )

[1.55]

8X (.024)

[0.6]

6X (.050 )

[1.27] (.213)

[5.4]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

SYMM

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