26
27 23 21 20 18
THAT
4320
EC-
EC+
IN OUT
VCA OA3
IN CT OUT
RMS
V
REF
GND
17 16
15
13
11
423 6 7 89
28
1
V
CC
V
EE
14
V
PTAT
25
V/2 Buffer
CC
Figure 1. THAT4320 equivalent block diagram (QSOP-28 pin assignments shown)
FEATURES
• Pre-trimmed VCA & RMS detector
• Wide supply voltage range: 4.5V~16V
• Low supply current: 3.7mA typ. (5V)
• Four opamps
• One low-noise opamp (<5nV/rt-Hz)
• On board PTAT reference
• Wide dynamic range: 120dB as
compander
APPLICATIONS
• Companding noise reduction
• Wireless microphones
• Wireless instrument packs
• Wireless in-ear monitors
• Battery operated dynamics processors
• Compressors
• Limiters
• AGCs
• De-essers
THAT 4320
The THAT4320 is a single-chip Analog Engine®
optimized for low-voltage, low-power operation. Incor-
porating a high-performance voltage- controlled ampli-
fier (VCA), RMS-level sensor, and four opamps, the
surface mount part is aimed at battery-operated audio
applications such as wireless microphones, wireless
instruments and in-ear monitors. The 4320 operates
from a single supply voltage down to +4.5Vdc, drawing
only 3.7mA.
This IC also works at supply voltages up to 16Vdc,
making it useful in line-operated products as well. The
VCA is pre-trimmed at wafer stage to deliver low distor-
tion without further adjustment. And, one opamp is
quiet enough to be used as a microphone preamp.
The part was developed specifically for use as a
companding noise reduction system, drawing from
THAT’s long history and experience with dbx®
technology for noise reduction. However, with 22 active
pins, the part is extremely flexible and can be configured
for a wide range of applications including single and
multi-band companders, compressors, limiters, AGCs,
de-essers, etc.
What really sets the 4320 apart is the transparent
sound of its Blackmer® VCA coupled with its accurate
true-RMS level detector. The IC is useful in battery-
powered mixers, compressor/limiters, ENG devices and
other portable audio products. The part is highly
integrated and requires minimal external support
circuitry: it even contains an on-board PTAT (propor-
tional to absolute temperature) voltage reference to
generate thermally compensated control voltages for
thresholds and gain settings.
Description
Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation; Document 600045 Rev 08
Document 600045 Rev 08 Page 2 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Positive Supply Voltage (VCC) +18V
Supply Current (ICC) 30mA
Operating Temperature Range (TOP) -40 to +85 ºC
Junction Temperature (TJ) -40 to +125 ºC
Output Short-Circuit Duration 30 sec
Power Dissipation (PD) at TA=85 ºC 400mW
Input Voltage Supply Voltage
Storage Temperature Range (TST) -40 to +125 ºC
Lead Temperature Range (Soldering, 10 sec) 300 ºC
Absolute Maximum Ratings1
SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
Power Supply
Positive Supply Voltage VCC Referenced to GND +4.5 - +16 V
Negative Supply Voltage (OA1)V
EE OA1 only VCC-16 0 0 V
Resistive Divider Voltage VPIN13 When overridden by split supply VCC - 8 VCC / 2 GND + 8 V
Supply Current ICC No Signal
VCC=+5 V 3.7 6 mA
VCC=+15 V 5 10 mA
IEE VCC=+5V, VEE=-5 V 0.6 - mA
Voltage Controlled Amplifier (VCA)
Max. I/O Signal Current iIN(VCA) + iOUT(VCA) VCC = +5 V 500 µApeak
VCC = +15 V 1 mApeak
Gain at 0V Control3G00V at +IN of OA2-1.5 0 +1.5 dB
Gain-Control Constant EC+/Gain (dB) -60 dB < gain < +40 dB - 6.0 - mV/dB
Gain-Control Tempco ∆EC/∆TCHIP Ref TCHIP=27ºC - +0.33 - %/ºC
Output Offset Voltage Change4 ∆ VOFF(OUT) ROUT = 20 kΩ
0 dB gain - 1 15 mV
+15 dB gain - 3 30 mV
+30 dB gain - 10 50 mV
Output Noise eN(OUT) 0 dB gain
22Hz~22kHz, RIN=ROUT=20 kΩ- -98 -95 dBV
Total Harmonic Distortion3THD VIN= -5dBV, 1kHz, 0V at +IN of OA20.05 0.1 %
RMS Level Detector
Output Voltage at Reference iIN eO(0) iIN = 7.5 µA RMS -8 0 +8 mV
Output Error at Input Extremes eO(RMS)error iIN = 200 nA RMS 1 3 dB
iIN = 1 mA RMS 1 3 dB
Electrical Characteristics2
1. If the devices are subjected to stress above the Absolute Maximum Ratings, permanent damage may result. Sustained operation at or
near the Absolute Maximum Ratings conditions is not recommended. In particular, like all semiconductor devices, device reliability
declines as operating temperature increases.
2. Unless otherwise noted, TA=25ºC, VCC=+5V, VEE=0 V. Test circuit is as shown in Figure 2.
3. Assumes OA2 is configured for unity gain, & includes offset voltage of OA2.
4. Reference is to output offset with -80 dB VCA gain.
Document 600045 Rev 08 Page 3 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Parameter Symbol Conditions Min Typ Max Units
Scale Factor Match to VCA -20 dB < VCA gain < +20 dB
1 µA< iIN(RMS) < 100 µ A .95 1 1.05 -
Rectifier Balance ±7.5mA DCIN ±1 dB
Timing Current IT- 7.5 - µA
Filtering Time Constant τ3467 X CTIME s
Output Tempco ∆EO/∆TCHIP Ref TCHIP = 27 ºC - +0.33 - %/ºC
Load Resistance RL-250mV < VOUTRMS< +250mV, re:Vref 2 kΩ
Capacitive Load CL150 pF
Operational Amplifier OA15
Input Offset Voltage VOS - ± 1 ± 3.5 mV
Input Bias Current IB- 500 1200 nA
Input Offset Current IOS - ± 30 ± 120 nA
Input Common Mode Range VICR+ 4 4.3 - V
VICR- - 0.4 0.6 V
Equivalent Input Noise Voltage eN(IN) f = 1 kHz - 4.5 6 nV/√Hz
Equivalent Input Noise Current iN(IN) f = 1 kHz - 0.9 - pA/√Hz
Gain Bandwidth Product GBW f = 50 kHz - 13 - MHz
Slew Rate SR G = +10, CL = 100 pF 2.3 4 - V/μs
Open Loop Gain AVOL RL = 10 kΩ-95- dB
Output Short Circuit Current ISC+ Output to VCC/2, VID = +0.4 V -2.3 -6.5 -20 mA
ISC- Output to VCC/2, VID = -0.4 V 1.5 3.7 12 mA
Output Voltage Range VO+ RL = 10 kΩ to VCC/2, G = +10 VCC-0.9 VCC-0.75 - V
VO- VEE+0.75 VEE+0.95 V
Capacitive Load CL150 pF
Power Supply Rejection Ratio PSRR +5 V < VCC-VEE < +15V - 105 - dB
Operational Amplifier OA2 (Control Voltage Buffer)
Input Offset Voltage VOS - ± 1.5 ± 6 mV
Input Bias Current IB- 450 1000 nA
Input Offset Current IOS - ± 25 ± 100 nA
Input Common Mode Range VICR -1 +1 V
Equivalent Input Noise Voltage eN(IN) f = 1 kHz - 8 - nV/√Hz
Equivalent Input Noise Current iN(IN) f = 1 kHz - 0.6 - pA/√Hz
Gain Bandwidth Product GBW f = 50 kHz, CL= 100 nF, RL= 10 kΩ- 0.012/CL-Hz
Slew Rate SR G = +1 ISC/CL-V/µs
Electrical Characteristics (con’t)2
Document 600045 Rev 08 Page 4 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Parameter Symbol Conditions Min Typ Max Units
Open Loop Gain AVOL RL = 10 kΩ- 57.5 dB
20*log(.075*RI) dB
Output Short Circuit Current ISC+ Output to VCC/2, VID = +0.4 V - -4 - mA
ISC- Output to VCC/2, VID = -0.4 V - 2.7 - mA
Power Supply Rejection Ratio PSRR +5 V < VCC < +15 V - 88 - dB
Capacitive Load 6 CL22 nF
Operational Amplifier OA3 (VCA Current-to-Voltage Converter)
Input Offset Voltage VOS ± 1.5 mV
Input Bias Current IB- 200 nA
Input Offset Current IOS Only one input is accessible
Input Common Mode Range VICR Not meaningful
Equivalent Input Noise Voltage eN(IN) f = 1 kHz - 10.5 - nV/√Hz
Equivalent Input Noise Current iN(IN) f = 1 kHz - 0.3 - pA/√Hz
Gain Bandwidth Product GBW f = 50 kHz - 7.3 - MHz
Slew Rate SR CL = 100 pF - 3.2 - V/μs
Open Loop Gain AVOL RL = 10 kΩ-92- dB
Output Short Circuit Current ISC+ Output to VCC/2 -3.5 - mA
ISC- 2.5 - mA
Output Voltage Range RL = 10 kΩ to VCC/2, Rf = 20 kΩ, 0 dB VCA gain
VO+ Iin(VCA) = +100 μA 4.1 4.25 - V
VO- Iin(VCA) = -100 μA 0.75 0.9 V
Capacitive Load CL150 pF
Operational Amplifier OA4
Input Offset Voltage VOS - ± 1.5 ± 5 mV
Input Bias Current IB- 200 500 nA
Input Offset Current IOS - ± 10 ± 50 nA
Input Common Mode Range VICR+ 4 4.3 - V
VICR- - 0.4 0.6 V
Equivalent Input Noise Voltage eN(IN) f = 1 kHz - 10.5 14 nV/√Hz
Equivalent Input Noise Current iN(IN) f = 1 kHz - 0.3 - pA/√Hz
Gain Bandwidth Product GBW f = 50 kHz - 7.3 - MHz
Slew Rate SR G = +10, CL = 100 pF 2.0 3.2 - V/μs
Open Loop Gain AVOL RL = 10 kΩ-92- dB
Electrical Characteristics (con’t)2
5. OA1 is stable for closed-loop gains of 2 or greater.
6. Note - OA2 and the VCC/2 buffer require a capacitve load for stability.
Document 600045 Rev 08 Page 5 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Parameter Symbol Conditions QSOP-28 QFN-24 Units
Surface Mount Packages See page 16 for pinouts and dimensions
Thermal Resistance θJA Package soldered to board. 90 70 ºC/W
Thermal pad not soldered on QFN 8
Environmental Regulation Compliance Complies with July 21,2011 RoHS 2 Requirements
Soldering Reflow Profile JEDEC JESD22-A113-D (260 ºC)
Moisture Sensitivity Level Above-referenced JEDEC soldering profile MSL-1 MSL-1
Package Characteristics
Parameter Symbol Conditions Min Typ Max Units
Output Short Circuit Current ISC+ Output to VCC/2, VID = +0.4 V -1.3 -3.5 -12 mA
ISC- Output to VCC/2, VID = -0.4 V 1 2.5 8 mA
Output Voltage Range VO+ RL = 10 kΩ to VCC/2, G = +10 4.1 4.25 - V
VO- 0.75 0.9 V
Capacitive Load CL150 pF
Power Supply Rejection Ratio PSRR +5V < VCC < +15 V - 100 - dB
VCC/2 Reference Buffer
Reference Voltage VREF No Signal, No load on pin 13,
VCC = +5 V, RL= 3 kΩ to VCC or GND 2.4 2.5 2.6 V
VCC = +15 V - VCC/2 - V
Voltage Divider Impedance RA, RB-20- kΩ
Output Short Circuit Current IOsc- Output to VCC -3 mA
IOsc+ Output to GND 4.5 mA
Output Noise Voltage eN(OUT) 22 Hz ~ 22 kHz, CFILT= 22 μF - -120 -117 dBV
Capacitive Load 6 CL22 nF
Proportional To Absolute Temperature (PTAT) Voltage Generator
Output Voltage VPTAT RL = 10 kΩ, TCHIP = 25 ºC - VREF - 0.072 - V
VCA Gain Change Caused by VPTAT VPTAT applied to OA2, AV = +1
VCA Gain at 1 kHz -11 -12 -13 dB
Output Tempco ∆(VPTAT-VREF)/∆TCHIP Ref TCHIP = 27 ºC - +0.33 - %/ºC
Maximum Sink Current ISINK(MAX) 800 µA
Capacitive Load CL150 pF
Performance as a Compander 7 (through an encode-decode cycle)
Dynamic Range (Max signal level) - (No Signal Output Noise) 120 dB
Distortion THD f = 1 kHz 0.1 %
Frequency response -20 dB re: Max Signal 20 Hz ~ 20 kHz ± 1.5 dB
Electrical Characteristics (con’t)2
7. Compressor circuit is as shown in Figure 12, Expander circuit is as shown in Figure 13.
8. For best VCA THD performance, QFN thermal pad should not be soldered to the PCB.
Document 600045 Rev 08 Page 6 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
R1
3k01
C1
22n
MY C4
100n
CM
C7
10u
C8
22u
C9
22p CM
CL4
150p
CM
NP0
RL4
10k0
R5
100k
R10
1k00 R15
9k09
C15
22p
CM
NP0
R16
9k09
R11
1k00 R6
100k
3
2
6
U1A
OP-07B
R22
5k 0.1%
R25
5k 0.1%
C17
10n MY
R43
3k32 C18
1 u
C13
150p
R2
10k0
R24
5k 0.1%
RMS AC IN
R44
20k0
C19
470n
MY
VCA AC IN
C10
22p CM
NP0
R46
20k0
R47
15k0
OA3 OUT
V
PTAT
V OUT
REF
R56
976
R50
15k0 OA2
AC/DC IN
R3
10k0
R7
100k
C20
78n
My
CL2
22n
MY
R12
1k00
R17
9k09 R4
10k0
C22
22p CM
OA2 OUT C27
22u
OA4 AC/DC IN
C11
22p CM NP0
R8
100k
R13
1k00 R18
9k09
C12
22p
CM
NP0
R19
9k09
R14
1k00 R9
100k
OA1 AC/DC IN
CL1
150p
CM
NP0
RL1
10k0
C5
100n
CM
K11A
K15A
85
K14A
K12A
84
5
K17A
84
5
K18A
84
5
K16A
8
4
5
K13A
K2A
K1A
85
K8A
K7A
K10A
8
4
5
K9A
8
4
5
K5A
85
K4A
K3A
K6A
C14
150p
CM
NP0
R57
6k82
C16
22p
V
PTAT
CL6
150p
20
In
23
VCA
OA3
V
REF
OA2
+
2
-
3
4
Ec+
DUTA
4320
+
27
-
26 25
OA1
DUTB
4320
Out
8In 6
RMS
DUTC
4320
OA4
+
18
-
17 16
DUT-2D
4320
V
PTAT
9
V
REF
11
Filt
13
Gnd
14
V
CC 15
Gnd
1
DUTE
4320
OA4 OUTPUT
OA1 OUTPUT
OA1 V
EE
RL6
20k0 RMS OUT
V OUT
REF
DUT
V
CC
DUT V
CC
DUT V
CC
4
8
5
5
8
8
5
5
8
28
5
8
8
5
NP0
CT
7
V OUT
REF
81
58
5
8
21
+
-
5
8
(C )
TIME
(C )
FILT
Figure 2. 4320 Test Circuit Schematic (QSOP-28 pin assignments shown)
Figure 3. VCA THD vs. Level at 0 dB gain (BW=22kHz)
Figure 5. VCA THD vs. Level at -12 dB gain (BW=22kHz)
Figure 4. VCA THD vs. Level at +12 dB gain (BW=22kHz)
Figure 6. VCA THD vs. Frequency (BW=80kHz)
REPRESENTATIVE DAT
A
The THAT 4320 Dynamics Processor combines
THAT Corporation’s proven Voltage-Controlled Ampli-
fier (VCA) and RMS-Level Detector designs with four
general-purpose opamps to produce an Analog Engine
useful in a variety of dynamics processor applications.
The part is integrated using a proprietary, fully comple-
mentary, dielectric-isolation process. This process
produces very high-quality bipolar transistors (both
NPNs and PNPs) with unusually low collector-substrate
capacitances. The 4320 takes advantage of these devices
to deliver wide bandwidth and excellent audio perform-
ance while consuming very low current and operating
over a wide range of power supply voltages.
For details of the theory of operation of the VCA and
RMS Detector building blocks, the interested reader is
referred to THAT Corporation’s data sheets on the
2180-Series VCAs and the 2252 RMS Level Detector.
Theory of the interconnection of exponentially-controlled
VCAs and log-responding level detectors is covered in
Document 600045 Rev 08 Page 7 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Figure 7. VCA Gain vs. Control Voltage Figure 8. VCA Noise vs. Gain (BW=22kHz)
Figure 9. VCA Offset vs. Gain Figure 10. RMS Output vs. Level
Figure 11. RMS Frequency Response vs. Level
T
heory of Operation
THAT Corporation’s desi
g
n note DN01, The Mathema
t
-
ics of Log-Based Dynamic Processors.
The VCA — in Brief
The VCA in THAT 4320 is based on THAT Corpora-
tion’s highly successful complementary log-antilog gain
cell topology -- The Blackmer® VCA -- as used in THAT
2180-Series IC VCAs. VCA symmetry is trimmed during
wafer probe for minimum distortion. No external adjust-
ment is allowed. See Figures 3 ~ 6, page 6 for the repre-
sentative THD data.
Input signals are currents in the VCA’s IN pin. This
pin is a virtual ground with dc level approximately equal
to VREF, so in normal operation an input voltage is
converted to input current via an appropriately sized
resistor (R44 in Figure 2, Page 6). Because the currents
associated with dc offsets present at the input pin and
any dc offset in preceding stages will be modulated by
gain changes (thereby becoming audible as thumps), the
input pin is normally ac-coupled (C19 in Figure 2).
The VCA output signal is also a current, inverted
with respect to the input current. In normal operation,
the output current is converted to a voltage via inverter
OA3, where the ratio of the conversion is determined by
the feedback resistor (R46 or R47, Figure 2) connected
between OA3‘s output and its inverting input. The signal
path through the VCA and OA3 is noninverting.
The gain of the VCA is controlled by the voltage
applied between EC+ and EC-. Note that EC- is an internal
node connected to the VREF generator. Gain (in decibels)
is proportional to (EC+ – EC-). See Figure 7 [page 7]. The
constant of proportionality is 6.0 mV/dB for the voltage
at EC+ (relative to VREF).
The VCA’s noise performance varies with gain in a
predictable way, but due to the way internal bias
currents vary with gain, noise at the output is not strictly
the product of a static input noise times the voltage gain
commanded. Figure 8 [page 7] plots noise (in dBV —
referenced to 1 V — in a 22 kHz bandwidth) at the
output of OA3 vs. VCA gain commands over a range of
-100 dB to +30 dB gain. At large attenuation, the noise
floor of ~-109 dBV is limited by the input noise of OA3
and its feedback resistor. At 0 dB gain, the noise floor is
~-98 dBV as specified. In the vicinity of 0 dB gain, the
noise increases more slowly than the gain: approxi-
mately 5 dB noise increase for every 10 dB gain
increase. Finally, as gain approaches 30 dB, output
noise begins to increase directly with gain.
While the 4320’s VCA circuitry is very similar to that
of the THAT 2180 Series VCAs, there are several impor-
tant differences, as follows.
1) Supply current for the VCA depends on VCC. A
t
+5 V VCC, approximately 500 μA is available for the sum
of input and output signal currents. This increases to
about 1 mA at +15 V VCC. (Compare this to ~1.8 mA for
a 2180 Series VCA when biased as recommended. This
is appropriate given the lower supply voltage for the
4320.)
2) The signal current output of the VCA is inter-
nally connected to the inverting input of on-chip
opamp OA3. In order to provide external feedback
around this opamp, this node is brought out to a pin.
3) Only the EC+ node is available for gain control. A
SYM control port (similar to that on the 2180 VCA)
exists, but is driven from an internally trimmed current
generator. The negative control port (EC-) is internally
connected to VREF.
4) The control-voltage constant is approximately
6.0 mV/dB, due primarily to the lower internal operating
temperature of the 4320 compared to that of the 2180
Series (and the 4301).
5) The OTA used for the VCA’s internal opamp in
the 4320 uses less emitter degeneration resistance in its
output than that of the 2180 VCA. This requires that
the source impedance at the VCA’s input (which is a
summing junction) must be under 5 kΩ at frequencies
over 1 MHz. In Figure 2, C
16 and R57 accomplish this.
See the applications section for an alternative on how to
address this issue.
The RMS Detector — in Brief
The 4320’s detector computes RMS level by rectify-
ing input current signals, converting the rectified current
to a logarithmic voltage, and applying that voltage to a
log-domain filter. The output signal is a dc voltage
proportional to the decibel-level of the RMS value of the
input signal current. Some ac component (at twice the
input frequency) remains superimposed on the dc
output. The ac signal is attenuated by a log-domain
filter, which constitutes a single-pole rolloff with cutoff
determined by an external capacitor and a programma-
ble dc current.
As in the VCA, input signals are currents to the
RMS IN pin. This input is a virtual ground with dc level
equal to VREF, so a resistor (R24 in Figure 2) is normally
used to convert input voltages to the desired current.
The level detector is capable of accurately resolving
signals well below 10 mV (with a 5 kΩ input resistor).
However, if the detector is to accurately track such
low-level signals, ac coupling is normally required (C27
in Figure 2). Note also that small, low-voltage electro-
lytic capacitors used for this purpose may create signifi-
cant leakage if they support half the supply voltage, as is
the case when the source is dc-referenced to ground. To
Document 600045 Rev 08 Page 8 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
ensure
g
ood detector trackin
g
to low levels, a tantalum
capacitor or high-voltage electrolytic may be required for
input coupling.
The log-domain filter cutoff frequency is usually
placed well below the frequency range of interest. For an
audio-band detector, a typical value would be 5 Hz, or a
32 ms time constant (τ). The filter’s time constant is
determined by an external capacitor CTIME attached to
the CT pin, and an internal current source (IT) connected
to CT. The current source is internally fixed at 7.5 μA.
The resulting time constant in seconds is approximately
equal to 3467 * CTIME. Note that, as a result of the
mathematics of RMS detection, the attack and release
time constants are fixed in their relationship to each
other.
The RMS detector is capable of driving large spikes
of current into CTIME, particularly when the audio signal
input to the RMS detector increases suddenly. This
current is drawn from VCC at pin 15 (QFN pin 16), fed
through CTIME at pin 7 (QFN pin 10), and returns to the
power supply through the ground end of CTIME. If not
handled properly through layout and bypassing, these
currents can mix with the audio with unpredictable and
undesirable results. As noted in the Applications
section, local bypassing from the VCC pin to the ground
end of CTIME is strongly recommended in order to keep
these currents out of the ground structure of the device.
The dc output of the detector is scaled with the same
constant of proportionality as the VCA gain control: 6.0
mV/dB. See figure 10 [page 7]. The detector’s 0 dB refer-
ence (iin0), the input current which causes the detector’s
output to equal VREF), is trimmed during wafer probe to
approximately equal 7.5 μA. The RMS detector output
stage is capable of sinking or sourcing 125 μA. It is also
capable of driving up to 150 pF of capacitance.
Frequency response of the detector extends across
the audio band for a wide range of input signal levels.
Note, however, that it does fall off at high frequencies at
low signal levels. See figure 11 (page 7).
Differences between the 4320’s RMS Level Detector
circuitry and that of the THAT 2252 RMS Detector
include the following.
1) The rectifier in the 4320 RMS Detector is inter-
nally balanced by design, and cannot be balanced via an
external control. The 4320 will typically balance positive
and negative halves of the input signal within 10 %, but
in extreme cases the mismatch may reach +40, -30 %
(±3 dB). However, even such extreme-sounding
mismatches will not significantly increase ripple-
induced distortion in dynamics processors over that
caused by signal ripple alone.
2) The time constant of the 4320’s RMS detector is
determined by the combination of an external capacitor
(connected to the CT pin) and an internal current source.
The internal current source is set to about 7.5 μA. A
resistor is not normally connected directly to the CT pin
on the 4320.
3) The 0 dB reference point, or level match, is also
set to approximately 7.5 μA. However, as in the 2252,
the level match will be affected by any additional
currents drawn from the CT pin.
The Opamps — in Brief
The four opamps in the 4320 have been optimized
independently to suit each one’s intended application.
While they all use PNP input stages, they differ in
bandwidth, noise level, and compensation scheme
depending on their expected uses. Therefore, to get the
most out of the 4320, it is useful to know the major
differences among these opamps.
OA1 - Low Source Impedance Pre-amp
OA1, with typical equivalent input noise of
4.5 nV/√Hz, is the quietest opamp on the 4320. This
opamp is intended for signal conditioning such as
preamplification from low-impedance sources. (At
source impedances of >5.6 kΩ, the input current noise
contribution will surpass the voltage contribution.)
OA1 is stable for closed-loop gains of 2 or greater. Its
output typically swings to within 0.75 V of VCC or VEE,
allowing it to support a 1.2 VRMS sine wave from a single
+5 V supply (4.75 VRMS with a +15 V supply). Its typical
slew rate is ~ 4 V/μs, allowing the part to support
maximum level sine waves at up to 360 kHz on a +5 V
supply (94 kHz on a +15 V supply). OA1‘s output is
capable of driving up to 150 pF, so it is possible to
directly bypass RF to ground via a small capacitor at
OA1‘s output, as is often desired in wireless transmitter
applications.
OA1‘s most unusual feature9 is that it’s negative
power supply connection is brought out separately to
VEE at pin 28 (QFN pin 3) to provide additional
headroom in certain applications. While VEE is normally
connected to the power supply ground (and pins 1 and
14 (QFN pin 4 and 15), which are the ground connec-
tions for the rest of the chip), it can be connected to a
separate negative supply. OA1‘s positive supply connec-
tion is internally connected to VCC at pin 15 (QFN pin
16). Therefore, OA1 sees as its supply voltage the differ-
ence between VCC and VEE. Note that this difference must
not exceed 16 V.
To gain an advantage from the separate VEE connec-
tion for this opamp, the design must provide a negative
Document 600045 Rev 08 Page 9 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
9. THAT has applied for patent coverage on this novel approach.
supply below
g
round to this pin. By doin
g
, so, OA1can
gain additional voltage swing over that available to the
rest of the IC. Because OA1 is commonly used as a
pre-amp before a noise reduction compressor based on
the rest of the chip, headroom is most critical at this
point. (The VCA will reduce the audio signal’s dynamic
range to a more manageable level for subsequent
stages.) The rest of the chip can run from +5 V and
ground to maintain low power dissipation, while only
OA1 is run from, say, a ±5 V supply to gain additional
headroom.
To see how this works in practice, suppose VCC is
+5 V. If VEE is set to 0 V (ground), the maximum swing
at OA1‘s output is typically 3.5 V (typically, OA1 reaches
within ~0.75 V of its supply rails), If, instead, VEE is set
to -5 V, the maximum swing at OA1‘s output increases to
8.5 V — for a 7.7 dB increase in dynamic range!
OA2 - Control Voltage Buffer
OA2 is intended as a control voltage buffer, and is
the least general purpose of the four opamps. It is exter-
nally compensated, and requires at least 22 nF at its
output to remain stable. This was a deliberate design
choice based on several factors including the relatively
limited bandwidth and voltage swing required for the
VCA control port and the importance of low noise (and
low RF content) at this node. Additionally, the capacitive
high-frequency output impedance guarantees stability in
the VCA.
Because it is intended to handle only the VCA
control port signal (consisting primarily of dc with
added low frequency content), OA2 is optimized for dc at
the expense of ac performance. This opamp has limited
input compliance (±1 V common mode range), is
relatively slow (120 kHz gain-bandwidth product with a
typical 100 nF capacitive load), has low open-loop gain
(57 dB with the typical 10 kΩ resistive load), and has
approximately a 10 Ω output impedance. These charac-
teristics, while limiting in an opamp intended for
handling audio signals, are ideal for the control voltage
buffer. In particular, compensating the opamp at its
output takes advantage of an often-required RF-bypass
capacitor to minimize noise pickup at the sensitive VCA
control port.
OA3 - VCA Current-to-Voltage Converter
OA3 is intended to translate the VCA’s output
currents into voltage signals. It is a unity-gain stable,
7.3 MHz opamp with moderately low input noise of
10.5 nv/√Hz. This noise floor complements that of the
VCA.
Like OA1, because it handles audio signals directly,
OA3 is optimized for audio performance. It’s output
typically swings to within 0.75 V of VCC or ground,
allowin
g
it to support a 1.2 VRMS sine wave from a sin
g
le
+5 V supply (4.75 VRMS with a +15 V supply). It’s typical
slew rate is ~3.2 V/μs, allowing the part to support
maximum level sine waves at up to 290 kHz on a +5 V
supply (75 kHz on a +15 V supply).
As with the other opamps, OA3‘s output is capable of
driving up to 150 pF, so it is possible to directly bypass
RF to ground via a small capacitor at OA3‘s output. It’s
output section is capable of supplying at least 1 mA,
making it possible to use this opamp directly as the
output stage in lightly loaded applications. Note,
however, that OA3‘s output is not designed to withstand
an indefinite short-circuit to a power supply or ground
rail, and a resistor should be included in series with
such outputs to ensure stability with capacitive loads
larger than 150 pF.
OA4 - General Purpose OpAmp
OA4 is intended for either signal or control voltage
applications. It is a unity-gain stable, 7.3 MHz opamp
with moderately low input noise voltage of 10.5 nV/√Hz,
and moderately low input noise current of 0.3 pA/√Hz.
Because of it’s lower current noise, OA4 is a better
choice for an audio pre-amp than OA1 in cases where
the source impedance feeding it is high.
All other characteristics of OA4 are similar to those
of OA3.
VCC/2 Reference Buffer
For single-supply applications, the 4320 requires a
center-tap to provide a synthetic “ground” reference for
its circuitry. The 4320 contains a built-in resistive
divider (at pins 13/14/15), followed by a buffer, to
provide a low-impedance source at approximately half
VCC. Note that the center tap of the resistive divider is
brought out to filter the voltage, thereby minimizing
noise in the divider. A large electrolytic capacitor
(typically 22 μF or greater) is used for this purpose.
The output of the buffer is available at pin 11. This
is “VREF”. The buffer is capable of delivering ~3 mA at its
output. Like OA2, it is compensated by capacitance at its
output, working against an internal output impedance of
approximately 10 Ω; at least 22 nF should be used to
ensure stability, reduce high-frequency output imped-
ance, and attenuate high-frequency noise.
VREF may be used to supply a “ground” reference
voltage to other sections of circuits beyond the 4320
itself. However, in any such uses, the designer should
take care to minimize currents, especially signal
currents, that flow through the VREF line. Any signal
currents should return to the real circuit ground (GND);
VREF should be connected only to relatively high imped-
ance loads (e.g., the positive input of opamps). Where
Document 600045 Rev 08 Page 10 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
si
g
nificant currents (si
g
nal or otherwise) must be deli
v
-
ered at the VREF dc level, an opamp should be used to
buffer the VREF line itself.
Another approach to power supply arrangements is
to operate the 4320 from symmetrical split supplies
(e.g., ±5 V and ground). In such cases, the center-tap of
the resistive divider at pin 13 (QFN pin 14) should be
grounded. This will force VREF to very nearly ground
(within the offset of the VCC/2 buffer).
A final note on the subject of power supply connec-
tions is that both of the 4320’s two GND, pins 1 and 14
(QFN pins 4 and 15), must be tied together for proper
operation of the device. While these pins are tied
together internally on the chip, due to the large size of
the die inside the part, the resistance and inductance of
the internal connection is not as low as an external PCB
trace can provide. The 4320 may not meet all its speci-
fications unless a short PCB connection is made
between these two pins.
PTAT Voltage Generator
The VCA control port and the RMS-level detector
output both share a fundamental temperature drift
proportional to absolute temperature. Room tempera-
ture is approximately 300 ºK (or 27 ºC), so near room
temperature the drift amounts to +0.33 %/ºC. The drift
is expressed in percent per degree Celsius because the
magnitude of the change with temperature depends on
the gain control command or detected level being
presented. There is no temperature drift at 0 dB gain, or
at the RMS’ reference level. But, away from either of
these 0 dB points, the scale factor of these parameters
varies by 0.33 % for each degree Celsius of temperature
change.
The PTAT voltage generator produces an output that
varies directly with absolute temperature. At 25 ºC, it’s
output is 72 mV. One end of the generator is connected
to VREF, the other (negative end) is buffered and brought
out at VPTAT at pin 9 (QFN pin 12). While one application
for the voltage on this pin might be to read the tempera-
ture of the IC, it has many important practical uses in
audio applications based on the 4320. Basically, it
provides a voltage that can be used, after appropriate
scaling, to supply any gain controls or offsets used to
condition the RMS detector output and/or the VCA gain
control signals.
An example may help make this clear. Suppose a
designer wants to provide a potentiometer to control
signal gain through the VCA. If the desired gain range is
0 to +20 dB, the VCA control port must be driven from
0 mV (for 0 dB gain) to +120 mV (for +20 dB gain), but
only at room temperature. (At room temperature, the
gain control constant is 6.0 mV/dB.) If the temperature
increases by 10 ºC, the voltage for 0 dB gain remains the
same, but that for 20 dB
g
ain increases by 3.3 %, to
124 mV. If the same 120 mV gain command is applied
(because it comes from a source that does not vary with
temperature), the gain will be 19.35 dB, not 20 dB.
If the supply that feeds the gain-control pot derives
from a stable voltage source, the commanded gain will
drift with temperature. Alternatively, if the supply can
be made to vary with temperature just as the control
port’s sensitivity drifts, the two can compensate each
other and the result will be stable. That is the purpose
of the 4320’s PTAT voltage generator: to supply a voltage
that drifts exactly as the VCA and the RMS detector
drifts. The PTAT voltage can be used, with appropriate
scaling, to reference all gain controls, gain offsets, and
threshold setting amplifiers throughout the level-
processing side chain. And, because the PTAT generator
is integrated on the same IC as its VCA and RMS detec-
tor, temperature tracking between these three compo-
nents is excellent.
The No Connection Pins
Some pins on the THAT4320 are labeled "No
Connection" (N/C). These pins are not internally
connected to the 4320 die, so it is acceptable to leave
these pins unconnected or to connect these pins to some
external circuit nodes. In fact, the placement of the N/C
pins was chosen partly to facilitate passive guarding to
certain pins which are sensitive to low-level leakage
currents (e.g., the RMS and VCA inputs).
Because the dc potential at the most sensitive circuit
nodes is very close to VREF, THAT Corporation recom-
mends that all the N/C pins be connected to VREF
wherever possible. However, layout constraints may
preclude such a connection. In this case, either leave the
pins open, or choose a slow moving (dc) signal that is
close in dc potential to VREF, such as VPTAT. Tying the N/C
pins to VCC or GND -- not recommended -- will guard
against AC signals, but runs the risk of generating
unanticipated dc leakage currents which can spoil the
performance of the 4320's VCA and RMS detector.
Noise Reduction (Compander) Configurations
A primary use of the 4320 is for noise reduction
systems, particularly within battery-operated devices. In
these applications, one 4320 is configured for use as a
compressor to condition audio signals before feeding
them into a noisy channel. A second 4320, configured
as an expander, is located at the receiver end of the
noisy channel. The compressor increases gain in the
presence of low-level audio signals, and reduces its gain
in the presence of high-level audio signals. The
expander works in opposite, complementary fashion to
restore the original signal levels present at the input of
the compressor.
Document 600045 Rev 08 Page 11 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Durin
g
low-level audio passa
g
es, the compressor
increases signal levels, bringing them up above the noise
floor of the noisy channel. At the receiving end, the
expander reduces the signal back to it’s original level, in
the process attenuating the channel noise.
During high-level audio passages, the compressor
decreases signal levels, reducing them to fit within the
headroom limits of the noisy channel. The expander
increases the signal back to its original level. While the
channel noise may be increased in this action, a well-
designed compander will mask the noise floor with the
signal itself.
The 4320 was designed to facilitate the design of a
wide variety of companding noise reduction systems.
The RMS detector responds accurately over a wide
ran
g
e of levels; the VCA responds accurately to a wide
range of gain commands; the detector output and the
VCA control input are fully configurable; and the part
contains enough opamps to provide many options in
signal conditioning. All these features mean that the
4320 will support a wide range of compander designs
(and more), including simple 2:1 wide range (level-
independent) systems, level-dependent systems with
thresholds and varying compression slopes, systems
including noise gating and/or limiting, and systems with
varying degrees of pre-emphasis and filtering in both the
signal and detector paths. Furthermore, much of this
can be accomplished by extensively conditioning the
control voltage sidechain rather than the audio signal
itself. The audio signal can pass through as little as one
VCA and one opamp, and still support multiple ratios,
thresholds, and time constants.
Document 600045 Rev 08 Page 12 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Figure 12. THAT4320 2:1 Encoder Circuit (QSOP-28 pin assignments shown)
R2
4k99
R5
9k09
R13
2k49
R4
20k0
C5
22p NPO
R1
10k0
C3
10u
C10
10u
R9
4k99
C11
100n
R8
4k99
C8
3n3
NPO 2.5%
C12
100n
C7
22u
C4
22u
R6
2k05
C13
100n
C9
10n
R3
1k10
C6
100n
20
In
23
VCA
OA3
V
REF
OA2
+
2
-
3
4
Ec+
U1A
4320
+
27
-
26 25
OA1
U1B
4320
Out
8In 6
RMS
U1C
4320
OA4
+
18
-
17 16
U1D
4320
V
PTAT
9
V
REF
11
Filt
13
Gnd
14
V
CC
15
Gnd 1
U1E
4320
FILT
C1
1n
NPO
2.5%
20 kHz Butterworth LPF
6dB Static Gain
6dB Static Gain
R7
10k0
D2
D1
V
CC
V
PTAT
C2
470n
In
Decoder Out
Un-used and available
for low noise pre-amp
or other circuits
Optional Clipper/Overload Protection
10 dB / 50 s pre-emph asis
μ
~
21
7CT
V
REF
V
PTAT
28
V
REF
V
REF
(C )
TIME
V
CC
= +5 V
60 Hz HPF
R10
2k26
C14
10n
The 4320 includes so many useful building blocks
and operates from such a wide range of supply voltages
that it is suitable for a wide variety of dynamics process-
ing applications. Chief among these are wireless
companding systems. For this datasheet, we show the
part in a simple 2:1 companding noise reduction system
that performs as well or better than any analog
companding solution on the market today. Many other
configurations of the 4320 are possible, but are not
shown here. THAT intends to publish additional circuits
in forthcoming applications notes. Please check with
THAT’s applications engineering department to see if
your application has been covered yet, and for personal-
ized assistance with specific designs.
The encoder
Figure 12 shows a simple 2:1 encoder or feedback
compressor. The encoder in a wireless companding
system is located in the transmitter and generally
operates from a battery supply.
To optimize signal levels within the voltage limita-
tions of the battery supply, the encoder VCA gain is
offset by 6 dB via the ratio of R4 to R1. Additionally,
another 6 dB of static gain is injected at the control port
opamp, via VPTAT and R7. (A 36 mV dc offset is required
to produce 6 dB of static gain. Since VPTAT ~ -72 mV, a
gain of -1/2 will create the required 36 mV. Because the
PTAT generator voltage tracks in temperature with the
VCA gain control constant, this gain will be stable over
temperature.)
This encoder includes a high-frequency
pre-emphasis network at the input of the VCA (R3/C9)
that ultimately provides 20 dB of gain at 20 kHz. Its
lower corner frequency is at approximately 1.5 kHz (f1);
the upper corner is near 15 kHz (f2).
Companding noise reduction encoders often include
a clipper somewhere in the signal path to prevent
overmodulation of the RF channel. The optional anti-
parallelled diodes D1 and D2, can perform that function
in this circuit, and should be placed ahead of the
20 kHz Butterworth low-pass filter composed of OA4
and its surrounding components. This placement helps
reduce “spectral splatter” that results from momentary
clipping. What clipping takes place is limited in duration
to transients only, since the encoder will eventually
reduce its gain to below the clip point.
The output of the low-pass filter is the output of the
encoder. This is where the input to the RMS detector is
derived. The input circuit for the RMS detector includes
another pre-emphasis network which provides a
maximum of 10 dB of pre-emphasis (R10/C14), rising at
approximately 2.9 kHz (f3), and stopping at around
6.5 kHz (f4). These frequencies were chosen such that
f1%f2=f3%f4
This effectively centers the rising sections of both the
RMS and VCA pre-emphasis curves. This network feeds
the input of the RMS detector, which is a virtual ground
referenced to VREF.
As described in the Theory of Operation section
“The RMS Detector - In Brief” (on page 9), the RMS
detector is capable of driving large spikes of current into
the averaging capacitor CTIME. To prevent these currents
from upsetting circuit grounds, it is necessary to bypass
VCC to a point very near the grounded end of the CTIME
with a capacitor (C4 in Figure 12) equal to or greater
than the value of CTIME. The grounded ends of these two
capacitors should be connected together before being
tied to the rest of the ground system. Doing so will
ensure that the current spikes flow within the local loop
consisting of the two capacitors, and stay out of the
ground system. This requirement applies to the decoder
and other applications of the THAT4320 as well.
The output of the RMS detector is zero volts when
the RMS input current is equal to the timing current
(internally set to ~7.5 μA). A low-frequency voltage level
of -26 dBu was chosen as the desired zero dB reference
since this, in conjunction with the applied static gain,
makes optimal use of the available gain in the VCA.
Then, the RMS detector’s low-frequency input resistance
can be calculated as:
R2 =0.775 %10 −26
20
7.5 A{4.99 k
From the desired 10 dB pre-emphasis, the value for
R10 can then be calculated to be 2.26 kΩ. C14 is calcu-
lated based on the desired pre-emphasis starting
frequency.
In THAT Corporation’s design note DN03, A Signal
Limiter for Power Amplifiers, the compression ratio for
a feedback compressor was derived using the analytical
technique described in DN01A, The Mathematics of Log
Based Dynamics Processors. This technique is referred
to as ‘working in the log domain’. Using these methods,
it can be shown that the compression ratio (C.R.) of a
feedback compressor is
C.R. = 1 + A,
where A is the absolute value of the gain of the side
chain.
The RMS detector’s output is connected to the VCA
gain control port (EC+) through OA2, configured for an
Document 600045 Rev 08 Page 13 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Applications
invertin
g
g
ain of one. This fixes the compression ratio a
t
2:1. Note that the negative sign in the side chain gain
makes this circuit a compressor.
The decoder
Figure 13 shows the THAT4320 configured as a 2:1
expander, an arrangement intended to complement the
encoder in Figure 12. This circuit is optimized for
low-voltage operation, as might be the case for a decoder
in an in-ear monitoring system which will run from
battery power.
The pre-emphasis network from the VCA input in
Figure 12 is now in the feedback loop of OA3; This
provides de-emphasis. The VCA is set up with -12 dB of
static gain to keep output signal levels low for battery
operation. Because the VCA is not stable unless it sees a
high frequency source impedance of 5 kΩ or less, R5
and C9provide the necessary compensation to maintain
stability.
OA1 is used to implement another 20 kHz Butter-
worth low-pass filter. This ensures that noise picked up
in the transmission channel will not cause mistracking
between the detectors in the encoder and decoder. The
output of this filter feeds the RMS detector input, which
in turn has the same pre-emphasis network as in the
encoder RMS detector.
Using the same log based mathematics described
earlier, the expansion ratio of a feedforward expander
can be shown to be
E.R. = 1 + A
OA2 is configured as a gain-of-one follower. This
reverses the polarity of the control signal relative to the
encoder, and makes this circuit a 2:1 expander.
Document 600045 Rev 08 Page 14 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
Figure 13. THAT4320 2:1 Decoder Circuit (QSOP-28 pin assignments shown)
R2
4k99
R1
9k09
R7
40k2
C5
22p NPO
R8
10k0
C3
2u2
C10
10u
C1
3n3 NPO C14
100n
C4
22u
C12
22u
R6
2k05
C13
100n
C11
10n
R4
1k10
C7
100n
20In
23
VCA
OA3
V
REF
OA2
+
2
-
3
4
Ec+
U1A
4320
+
27
-
26 25
OA1
U1B
4320
Out 8
In
6
RMS
U1C
4320
OA4
+
18
-
17 16
U1D
4320
V
PTAT
9
V
REF
11
Filt
13
Gnd
14
V
CC
15
Gnd 1
U1E
4320
C8
1n
20 kHz Butterworth LPF
-12dB Static Gain
C6
1u R3
100k C2
470n
C9
47p
R5
4k99
V
CC
Encoder Out
Out
Un-used
60 Hz HPF
20 dB
/
~ 100 s de-emphasis
μ
21
+
-
CT
7
V
REF
V
REF
V
REF
V
PTAT
28
R8
2k26
C14
10n
General Dynamics Processor Configurations
The same distinguishing features that make the
4320 so applicable to companding noise reduction
systems also qualify it for application to dynamics
processors of all types. This is even more so when the
application must run from battery power. The 4320 is
versatile enough to be used as the heart of a
compressor, expander, noise gate, AGC, de-esser,
frequency-sensitive compressor, and many other
dynamics processors. It is beyond the scope of this data
sheet to provide specific advice about any of these
functional classes. We refer the interested reader to
THAT’s applications notebooks volumes 1 and 2, which
contain many circuits based on THAT’s other VCAs and
RMS level detectors, but are largely applicable to the
4320 with only minor variations. Of course, look for
more applications information aimed specifically at the
4320 in the future.
Where to go from here
The design of compander systems and dynamics
processors is a very intricate art: witness the prolifera-
tion of first analog, then digital companding systems,
and the many different dynamics processors available in
the market today. In the applications section of this
data sheet, we offer a single example of a compander as
a starting point only. THAT Corporation’s applications
engineering department is ready to assist customers
with suggestions for tailoring and extending these basic
circuits to meet specific needs.
Document 600045 Rev 08 Page 15 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Email: info@thatcorp.com; Web: www.thatcorp.com
Copyright © 2015, THAT Corporation
4320N24-U24 pin QFN (5x5) 4320Q28-U28 pin QSOP Order NumberPackage
Table 1. Ordering information
Ordering Information
For sales:
Tel: +1 (508) 634-9922
Fax: +1 (508)634-6698
E-mail: sales@thatcorp.com
Revision History
5, 7Corrected Package Characteristics table and Figure 11.07/22/15293308
3, 4, 9Clarified the minimum gain for stability of OA103/18/14285607
—Added QFN-24 package. Corrected equation.02/23/10237706
—
Fixed errors in specification table and Figure 4.04/06/09225805
PageChangesDateECORevision
Document 600045 Rev 08 Page 16 of 16 THAT4320 Pre-trimmed Low-voltage Low-power
Analog Engine® Dynamics Processor IC
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; US
A
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Table 2. QSOP-28 pin assignments
28OA1 VEE
27OA1 +IN 26OA1 -IN 25OA1 OUT 24No Connection 23VCA IN 22No Connection 21VCA OUT 20OA3 OUT 19No Connection 18OA4 +IN 17OA4 -IN 16OA4 OUT 15VCC
14GND 13FILTER 12No Connection 11VREF
10No Connection 9VPTAT
8RMS OUT 7CAP 6RMS IN 5No Connection 4OA2 OUT 3OA2 -IN 2OA2 +IN 1GND Pin NumberPin Name
A
D
1
B
C
E
I
J
0-8º
G
H
ITEM MILLIMETERS INCHES
A9.80 - 9.98 0.386 - 0.393
B3.81 - 3.99 0.150 - 0.157
C5.79 - 6.20 0.228 - 0.244
D0.20 - 0.30 0.008 - 0.012
E0.635 BSC 0.025 BSC
G1.35 - 1.75 0.0532 - 0.0688
H0.10 - 0.25 0.004 - 0.010
I0.40 - 1.27 0.016 - 0.050
J0.19 - 0.25 0.0075 - 0.0098
Figure 14. QSOP-28 package drawing
Package Information
THERMAL PAD (25)GND* 24OA1 OUT 23VCA IN 22VCA OUT 21OA3 OUT 20No Connection 19OA4 +IN 18OA4 -IN 17OA4 OUT 16VCC
15GND 14FILTER 13VREF
12VPTAT
11RMS OUT 10CAP 9RMS IN 8No Connection 7OA2 OUT 6OA2 -IN 5OA2 +IN 4GND 3OA1 VEE
2OA1 +IN 1OA1 -IN Pin NumberPin Name
Table 3. QFN-24 (5x5) pin assignments
A
B
C
D
F
H
I
JK
Exposed
Thermal Pad
EG
0°
ITEM MILLIMETERS INCHES
A5.00 ± 0.10 0.197 ± 0.004
B5.00 ± 0.10 0.197 ± 0.004
C 0.90 ± 0.05 0.035 ± 0.002
D0.25 ± 0.05 0.010 ± 0.002
E0.65 ± 0.05 0.026 ± 0.002
F0.40 ± 0.05 0.016 ± 0.002
G0.00 ~ 0.05 0.000 ~ 0.020
H0.20 ± 0.05 0.008 ± 0.002
I3.40 ± 0.05 0.134 ± 0.002
J3.40 ± 0.05 0.134 ± 0.002
KC' 0.4 x 45° C‘ 0.016 x 45°
1
6
7
12
13 18
19
24
BOTTOM VIEW
Figure 15. QFN-24 (5x5) package drawing
* For best VCA THD performance the QFN’s thermal pad should
not be soldered to the PCB.
