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07/10/06
IRF7904PbF
HEXFET® Power MOSFET
Benefits
lVery Low RDS(on) at 4.5V VGS
lLow Gate Charge
lFully Characterized Avalanche Voltage
and Current
l20V VGS Max. Gate Rating
lImproved Body Diode Reverse Recovery
l100% Tested for RG
lLead-Free
Applications
lDual SO-8 MOSFET for POL
Converters in Notebook Computers, Servers,
Graphics Cards, Game Consoles
and Set-Top Box
VDSS ID
30V Q1 16.2m
:
@VGS = 10V 7.6A
Q2 10.8m
:
@VGS = 10V 11A
RDS(on) max
Absolute Maxim um Ra t in gs
Parameter Q1 Max. Q2 Max. Units
VDS Drain-to-Source Voltage V
VGS Gate-to-Source Voltage
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 7.6 11
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 6.1 8.9 A
IDM Pulsed Drain Current
c
61 89
PD @TA = 25°C Power Dissipation 1.4 2.0 W
PD @TA = 70°C Power Dissipation 0.9 1.3
Linear Derating Factor 0.011 0.016 W/°C
TJ Operating Junction and °C
TSTG Storage Temperature Range
Therm al R esistance
Parameter Q1 Max. Q2 Max. Units
RθJL Junction-t o-Dr ain Lead
g
20 20 °C/W
RθJA Junction-to-Ambient
fg
90 62.5
± 20
30
-55 to + 150
SO-8
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PD - 96919B
IRF7904PbF
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Static @ TJ = 25°C (unless otherw ise specif ied)
Parameter Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage Q1&Q2 30 ––– ––– V
∆ΒV
DSS
/∆T
J
Breakdown Voltage Temp. Coefficient Q1 ––– 0.024 ––– V/°C
Q2 ––– 0.024 –––
Q1 ––– 11.4 16.2
R
DS(on)
Static Drain-to-Source On-Resistance
–––
14.5
20.5
mΩ
Q2 ––– 8.6 10.8
––– 10 13
V
GS(th)
Gate Threshold Voltage Q1&Q2 1.35 ––– 2.25 V
∆V
GS(th)
/∆T
J
Gate Thresho ld Voltage Coefficient Q1 ––– -5.0 ––– mV/°C
–––
-5.0
–––
I
DSS
Drain-to-Source Leakage Current Q1&Q2 ––– ––– 1.0 µA
Q1&Q2 ––– ––– 150
I
GSS
Gate-to-Source Forward Leakage Q1&Q2 ––– ––– 100 nA
Gate-to-Source Reverse Leakage Q1&Q2 ––– ––– -100
gfs Forward Transconductance Q1 17 ––– ––– S
23
–––
–––
Q
g
Total Gate Charge Q1 ––– 7.5 11
Q2 ––– 14 21
Q
gs1
Pre-Vth Gate-to-Source Charge Q1 ––– 2.2 ––– Q1
Q2 ––– 3.7 ––– V
DS
= 15V
Q
gs2
Post-Vth Gate-to-Source Charge
–––
0.6
–––
nC
V
GS
= 4.5V, I
D
= 6.1A
Q2 ––– 1.1 –––
Q
gd
Gate-to-Drain Charge Q1 ––– 2.5 ––– Q2
Q2 ––– 4.8 ––– V
DS
= 15V
Q
Gate Charge Overdrive Q1 ––– 2.2 ––– V
GS
= 4.5V, I
D
= 8.8A
Q2 ––– 4.4 –––
Q
sw
Switch Charge (Q
gs2
+ Q
gd
) Q1 ––– 3.1 –––
Q2 ––– 5.9 –––
Q
oss
Output Charge Q1 ––– 4.5 ––– nC
Q2 ––– 9.1 –––
R
G
Gate Resistance
–––
3.2 4.8 Ω
Q2 ––– 2.9 4.4
t
d(on)
Turn-On Delay Time Q1 ––– 6.9 –––
Q2 ––– 7.8 –––
t
r
Rise Time Q1 ––– 7.3 ––– I
D
= 6.1A
Q2 ––– 10 ––– ns
t
d(off)
Turn-Off Delay Time
–––
10
–––
Q2 ––– 15 –––
t
f
Fall Time Q1 ––– 3.2 ––– I
D
= 8.8A
Q2 ––– 4.6 –––
C
iss
Input Capacitance Q1 ––– 910 –––
Q2 ––– 1780 –––
C
oss
Output Capacitance Q1 ––– 190 ––– pF
Q2 ––– 390 –––
C
rss
Reverse Transfer Capacitance Q1 ––– 94 –––
Q2 ––– 180 –––
Avalanche Characteristics Param e ter Q1 Max. Q2 Max. Units
E
AS
Single Pulse Avalanche Energy
d
140 250 mJ
I
AR
Avalanche Current
c
6.1 8.8 A
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current
–––
–––
1.8
A
(Body Diode) Q2 ––– ––– 2.5
I
SM
Pulsed Source Current Q1 ––– ––– 61 A
(Body Diode)
c
Q2 ––– ––– 88
V
SD
Diode Forward Voltage Q1 ––– ––– 1.0 V
–––
–––
1.0
t
rr
Reverse Recovery Time Q1 ––– 11 17 ns
Q2 ––– 16 24
Q
rr
Reverse Recovery Charge Q1 ––– 2.6 3.9 nC
Q2 ––– 6.9 10
VGS = 4.5V, ID = 6.1A
e
VGS = 4.5V, ID = 8.8A
e
VDS = 15V, ID = 8.8A
VDD = 15V, VGS = 4.5V
VGS = 10V, ID = 11A
e
Q1: VDS = VGS, ID = 25µA
VDS = 15V, ID = 6.1A
VDS = 24V, VGS = 0V, TJ = 125°C
VDD = 15V, VGS = 4.5V
–––
VDS = 15V
Clamped Inductive Load
VGS = 0V
ƒ = 1.0MHz
Typ.
–––
Q1 TJ = 25°C, IF = 6.1A,
VDD = 15V, di/dt = 100A/µs
e
TJ = 25°C, IS = 6.1A, VGS = 0V
e
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 8.8A, VGS = 0V
e
Q2 TJ = 25°C, IF = 8.8A,
VDD = 15V, di/dt = 100A/µs
e
MOSFET symbol
Q2: VDS = VGS, ID = 50µA
VDS = 16V, VGS = 0V
Q1
VGS = 20V
VGS = -20V
VDS = 24V, VGS = 0V
Conditions
Q2
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 7.6A
e
IRF7904PbF
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Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Q1 - Control FET Q2 - Synchronous FET
Typical Characteristics
Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics
Fig 5. Typical Transfer Characteristics Fig 6. Typical Transfer Characteristics
1.0 2.0 3.0 4.0 5.0
VGS, Gate-to-Sour ce Volt age (V)
0.1
1.0
10.0
100.0
ID, Drain-to-Source Current
(Α)
VDS = 15V
≤ 60µs PULS E WI DTH
TJ = 25°C
TJ = 150°C
1.0 2.0 3.0 4.0 5.0
VGS, Gate-to-Sour ce Volt age (V)
0.1
1.0
10.0
100.0
ID, Drain-to-Source Current
(Α)
VDS = 15V
≤ 60µs PULS E WI DTH
TJ = 25°C
TJ = 150°C
0.1 110 100
VDS, Drain-t o-Source Voltage (V)
0.1
1
10
100
ID, Drain-to-Source Current (A)
≤ 60µs PULS E WI DTH
Tj = 25°C
2.5V
VGS
TOP 10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM 2.5V
0.1 110 100
VDS, Drain-t o-Source Voltage (V)
1
10
100
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 150°C
2.5V
VGS
TOP 10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM 2.5V
0.1 110 100
VDS, Drain-t o-Source Voltage (V)
0.1
1
10
100
ID, Drain-to-Source Current (A)
≤ 60µs PULS E WI DTH
Tj = 25°C
2.5V
VGS
TOP 10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM 2.5V
0.1 110 100
VDS, Drain-t o-Source Voltage (V)
1
10
100
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 150°C
2.5V
VGS
TOP 10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
BOTTOM 2.5V
IRF7904PbF
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Q1 - Control FET Q2 - Synchronous FET
Typical Characteristics
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage
Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage Fig 10. Typical Gate Charge vs. Gate-to-Source
Voltage
Fig 11. Maximum Safe Operating Area Fig 12. Maximum Safe Operating Area
110 100
VDS, Drain-t o-Source Volt age (V)
10
100
1000
10000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + C gd
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V , f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = C gd
Coss = Cds + Cgd
0 5 10 15 20
QG Total Gate Charge ( nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 6.1A
0 5 10 15 20 25 30 35
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 8.8A
0.01 0.10 1.00 10.00 100.00
VDS , D rain-toSource Voltage (V)
0.01
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TA = 25°C
Tj = 150°C
Single P ulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
100msec
0.01 0.10 1.00 10.00 100.00
VDS , Drain-toSource Volt age (V)
0.01
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TA = 25° C
Tj = 150°C
Single P ulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
100msec
IRF7904PbF
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Fig 17. Typical On-Resistance vs.Gate Voltage
Q1 - Control FET Q2 - Synchronous FET
Typical Characteristics
Fig 13. Normalized On-Resistance vs. Temperature Fig 14. Normalized On-Resistance vs. Temperature
Fig 15. Typical Source-Drain Diode Forward Voltage Fig 16. Typical Source-Drain Diode Forward Voltage
Fig 18. Typical On-Resistance vs.Gate Voltage
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Juncti on Temperature (° C)
0.5
1.0
1.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 7.6A
VGS = 10V
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD, Source-t o-Drain Vol tage (V)
0.1
1.0
10.0
100.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
2.0 4.0 6.0 8.0 10.0
VGS, Gate-to-Sour ce Volt age (V)
10
15
20
25
30
35
40
RDS(on), Drain-to -Source On Resistance (
mΩ)
TJ = 25°C
TJ = 125°C
ID = 7.6A
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temper ature (°C)
0.5
1.0
1.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 11A
VGS = 10V
2.0 4.0 6.0 8.0 10.0
VGS, Gate-to- Source Voltage ( V)
5
10
15
20
25
RDS(on), Drain-to -Source On Resistance (
mΩ)
TJ = 25°C
TJ = 125°C
ID = 11A
0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2
VSD, Source-t o-Drain Vol tage (V)
0.1
1.0
10.0
100.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
IRF7904PbF
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Q1 - Control FET Q2 - Synchronous FET
Typical Characteristics
Fig 19. Maximum Drain Current vs. Ambient Temp. Fig 20. Maximum Drain Current vs. Ambient Temp.
Fig 21. Threshold Voltage vs. Temperature Fig 22. Threshold Voltage vs. Temperature
Fig 23. Maximum Avalanche Energy vs. Drain Current Fig 24. Maximum Avalanche Energy vs. Drain Current
25 50 75 100 125 150
TJ , Ambient Temperature (°C)
0
2
4
6
8
ID , Drain Current (A)
-75 -50 -25 025 50 75 100 125 150
TJ , Temperat ure ( °C )
1.0
1.4
1.8
2.2
2.6
VGS(th) Gate threshold Voltage (V)
ID = 250µA
25 50 75 100 125 150
Starting TJ, Junction Temperature ( °C)
0
100
200
300
400
500
600
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 0.34A
0.48A
BOTTOM 6. 1A
25 50 75 100 125 150
TJ , Ambient Temperat ure (°C)
0
2
4
6
8
10
12
ID , Drain Current (A)
-75 -50 -25 025 50 75 100 125 150
TJ , Temperat ure ( °C )
1.0
1.4
1.8
2.2
VGS(th) Gate threshold Voltage (V)
ID = 250µA
25 50 75 100 125 150
Starting TJ, Juncti on Temperature (° C)
0
200
400
600
800
1000
1200
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 0.57A
0.77A
BOTTOM 8.8A
IRF7904PbF
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Fig 25. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q1)
Fig 26. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q2)
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
100
Thermal Response ( Z
thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthj a + Tc
Ri (°C/W) τi (sec)
10.908 0.02108
34.35 1.1482
17.15 39.7
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τ
C
Ci= i/Ri
Ci= τi/Ri
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
100
Thermal Response ( Z
thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthj a + Tc
Ri (°C/W) τi (sec)
17.122 0.018925
53.325 0.74555
19.551 39.2
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τ
C
Ci= i/Ri
Ci= τi/Ri
Fig 27. Layout Diagram
IRF7904PbF
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Fig 30a. Switching Time Test Circuit Fig 30b. Switching Time Waveforms
VGS
VDS
9
0%
10%
td(on) td(off)
trtf
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
Fig 29b. Unclamped Inductive Waveforms
Fig 29a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 31a. Gate Charge Test Circuit Fig 31b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 28. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. V
D
S
I
D
I
G
-3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
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SO-8 Part Marking
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SO-8 Package Outline
Dimensions are shown in milimeters (inches)
IRF7904PbF
10 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2006
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CO NTROLLING DIMENSION : MILLIMETER.
2. O U TLIN E C O NFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TE RM I NAL NUMBE R 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
N
OTES:
1
. CONTROLLING DIMENSION : MILLIMETER.
2
. ALL DIMENSIONS ARE SHOWN IN MILLI METERS(INCHES).
3
. OUTLINE CONFORMS T O EIA-481 & E IA-541.
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, Q1: L = 7.7mH
RG = 25Ω, IAS = 6.1A; Q2: L = 6.5mH
RG = 25Ω, IAS = 8.8A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
Rθ is measured at TJ approximately 90°C.