LTC3530
1
3530f
Wide Input Voltage
Synchronous Buck-Boost
DC/DC Converter
The LTC®3530 is a wide VIN range, highly effi cient, fi xed
frequency, buck-boost DC/DC converter that operates
from input voltages above, below or equal to the output
voltage. The topology incorporated in the IC provides a
continuous transfer function through all operating modes,
making the product ideal for single lithium-ion, two-cell
alkaline or NiMH applications where the output voltage is
within the battery voltage range.
The LTC3530 is pin compatible with the LTC3440 buck-
boost DC/DC converter but adds programmable automatic
Burst Mode operation and extends the VIN/VOUT range to
1.8V. Switching frequencies up to 2MHz are programmed
with an external resistor. Automatic Burst Mode operation
allows the user to program the load current threshold for
Burst Mode operation using a single resistor from the
BURST pin to GND.
Other features include 1µA shutdown, short circuit pro-
tection, programmable soft-start control, current limit
and thermal shutdown. The LTC3530 is available in a
thermally enhanced 10-lead (3mm × 3mm) DFN or MSOP
package.
■ MP3 Players
■ Handheld Instruments
■ Digital Cameras
■ Smart Phones
■ Portable GPS Units
■ Miniature Hard Disk Drive Power
■ Regulated Output with Input Voltages Above, Below
or Equal to the Output
■ 1.8V to 5.5V Input and 1.8V to 5.25V Output Range
■ 250mA Continuous Output Current from 1.8V VIN
■ 600mA Continuous/1A Peak Output Current from
Li-Ion
■ Single Inductor
■ Synchronous Rectifi cation: Up to 96% Effi ciency
■ Programmable Automatic Burst Mode® Operation
■ Output Disconnect in Shutdown
■ Pin Compatible with the LTC3440
■ Programmable Frequency from 300kHz to 2MHz
■ <1µA Shutdown Current
■ Small Thermally Enhanced 10-Lead (3mm × 3mm)
DFN and 10-Lead MS Packages
Effi ciency
APPLICATIO S
U
FEATURES DESCRIPTIO
U
TYPICAL APPLICATIO
U
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
*Patent Pending
SW1
VIN
SHDN/SS
RT
SW2
VOUT
FB
VC
BURST
LTC3530
10µF
1.8V TO 5.5V 340k
22µF
VOUT
3.3V AT
250mA
200k
0.01µF
30.1k
330pF
3530 TA01a
4.7µH
33.2k
100k
GND
ONOFF
OUTPUT CURENT (mA)
30
EFFICIENCY (%)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
3350 TA01b
0
1
VIN = 2V
VIN = 4.2V
VIN = 3.6V
Burst Mode OPERATION
LTC3530
2
3530f
TOP VIEW
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
10
9
6
7
8
4
5
3
2
1VC
FB
SHDN/SS
VIN
VOUT
RT
BURST
SW1
SW2
GND
11
TJMAX = 125°C, θJA = 43°C/W, θJC = 4.3°C/W
EXPOSED PAD IS GND (PIN 11) MUST BE SOLDERED TO PCB
1
2
3
4
5
RT
BURST
SW1
SW2
GND
10
9
8
7
6
VC
FB
SHDN/SS
VIN
VOUT
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 53°C/W, θJC = 4.3°C/W
ORDER PART NUMBER DD PART MARKING ORDER PART NUMBER MS PART MARKING
LTC3530EDD LCBH LTC3530EMS LTCBJ
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
VIN, VOUT Voltage ......................................... –0.3V to 6V
SW1, SW2 Voltage
DC ............................................................ –0.3V to 6V
Pulsed < 100ns ........................................ –0.3V to 7V
(Note 1)
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Operating Range ●1.8 5.5 V
Output Voltage Adjust Range ●1.8 5.25 V
Feedback Voltage ●1.191 1.215 1.239 V
Feedback Input Current VFB = 1.215V 1 50 nA
Quiescent Current, Burst Mode Operation VFB = 1.215V, BURST = 0V (Note 3) 40 60 µA
Quiescent Current, Shutdown
⎯
S
⎯
H
⎯
D
⎯
N = 0V, Not Including Switch Leakage 0.1 1 µA
Quiescent Current, Active VC = 0V, BURST = 3V (Note 3) 700 1200 µA
Input Current Limit ●12 A
VC, RT, FB,
⎯
S
⎯
H
⎯
D
⎯
N/SS, BURST Voltage .......... –0.3V to 6V
Operating Temperature (Note 2) .............. –40°C to 85°C
Maximum Junction Temperature (Note 4) ............ 125°C
Storage Temperature Range ................... –65°C to 150°C
LTC3530
3
3530f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3530E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlations
with statistical process controls.
Note 3: Current measurements are performed when the outputs are not
switching.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
NMOS Switch Leakage Switches B and C 0.1 5 µA
PMOS Switch Leakage Switches A and D 0.1 10 µA
NMOS Switch On Resistance Switches B and C 0.21 Ω
PMOS Switch On Resistance Switches A and D 0.24 Ω
Maximum Duty Cycle Boost (% Switch C On)
Buck (% Switch A On)
●
●
80
100
90 %
%
Minimum Duty Cycle ●0%
Frequency ●0.7 1 1.3 MHz
Error Amp AVOL 90 dB
Error Amp Source Current 300 µA
Error Amp Sink Current 300 µA
Burst Threshold 1V
Burst Input Current VBURST = 5.5V 2 µA
SHDN/SS Threshold When IC is Enabled
When EA is at Maximum Boost Duty Cycle
●0.4 0.85
1.6
1.4 V
V
SHDN/SS Input Current VSHDN = 5.5V 0.01 1 µA
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VIN (V)
2.5
VIN QUIESCENT CURRENT (mA)
4.0 5.0
3530 G01
3.0 3.5 4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0 5.5
2.0 MHz
1.5 MHz
1.0 MHz
0.5 MHz
NO SWITCHING
VIN (V)
2.5
VIN QUIESCENT CURRENT (µA)
3.0 3.5 4.0 4.5
3530 G02
5.0
50
45
40
35
30
25
20
15
10
5
0
5.5
VIN (V)
2.5
2.0
2.5
3.0
4.0 5.0
3530 G03
1.5
1.0
3.0 3.5 4.5 5.5
0.5
0.0
INPUT CURRENT (A)
3.5
Quiescent Current vs VIN
(Fixed Frequency Mode) Burst Mode Quiescent Current
TA = 25°C, unless otherwise specifi ed.
Peak Current Clamp vs VIN
LTC3530
4
3530f
RBURST (kΩ)
125
0
LOAD CURRENT (mA)
10
30
40
50
225
90
3530 G04
20
175 325275 425375 500475
60
70
80
ENTER Burst Mode
OPERATION
LEAVE Burst Mode
OPERATION
TEMPERATURE (°C)
–45
MINIMUM START VOLTAGE (V)
1.78
1.80
1.82
75
3530 G05
1.76
1.74
–5 35
–25 95
15 55 115
1.72
1.70
1.84
TEMPERATURE (°C)
–55
CHANGE FROM 25°C
5%
4%
3%
2%
1%
0%
–1%
–2%
–3%
–4%
–5% –15 25 45 125
3530 G06
–35 5 65 85 105
VIN = VOUT = 3.3V
TEMPERATURE (°C)
–45
1.05
FREQUENCY (MHz)
1.07
1.11
1.13
1.15
1.25
1.19
–5 35 55
3530 G07
1.09
1.21
1.23
1.17
–25 15 75 95 115
TEMPERATURE (°C)
–45
FEEDBACK VOLTAGE (V)
1.215
1.220
1.225
15 55 115
3530 G08
1.210
1.205
1.200
–25 –5 35 75 95 50ns/DIV 3530 G09
SW1
2V/DIV
SW2
2V/DIV
VIN = 2.9V
VOUT = 3.3V AT 500mA
50ns/DIV 3530 G10
SW1
2V/DIV
SW2
2V/DIV
VIN = 3.3V
VOUT = 3.3V AT 500mA
50ns/DIV 3530 G11
SW1
2V/DIV
SW2
2V/DIV
VIN = 4.2V
VOUT = 3.3V AT 500mA
1µs/DIV 3530 G12
VOUT = 3.3V
20mV/DIV
AC COUPLED
COUT = 22µF, X5R CERAMIC
VIN = 4.2V
VIN = 3.3V
VIN = 2.7V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Automatic Burst Mode Threshold
vs RBURST
Minimum Start Voltage
vs Temperature
Average Input Current Limit
vs Temperature
Frequency Change vs Temperature Feedback Voltage vs Temperature
Switch Pins Before Entering
Boost Mode
TA = 25°C, unless otherwise specifi ed.
Switch Pins in Buck-Boost Mode
Switch Pins Entering
Buck-Boost Mode
LTC3530 Output Ripple
500mA Load
LTC3530
5
3530f
Load Transient Response in Fixed
Frequency Mode, No Load to 300mA
Load Transient Response in
Auto Burst Mode Operation,
No Load to 500mA Typical Burst Mode Waveforms
Transition from Burst Mode
Operation to Fixed Frequency Mode Maximum Output Current vs VIN
TYPICAL PERFOR A CE CHARACTERISTICS
UW
100µs/DIV 3530 G13
VIN = 3.6V
VOUT = 3.3V
COUT = 22µF, X5R CERAMIC
LOAD
0.25A/DIV
VOUT
100mV/DIV
100µs/DIV 3530 G14
VIN = 3.6V
VOUT = 3.3V
COUT = 47µF, X5R CERAMIC + 100µF
LOW ESR TANTALUM
LOAD
0.25A/DIV
VOUT
100mV/DIV
22µs/DIV 3530 G15
COUT = 22µF, X5R CERAMIC
INDUCTOR
CURRENT
0.25A/DIV
VOUT
50mV/DIV
200µs/DIV 3530 G16
COUT = 22µF, X5R CERAMIC
INDUCTOR
CURRENT
0.5A/DIV
BURST
2V/DIV
VOUT
200mV/DIV
TA = 25°C, unless otherwise specifi ed.
VIN (V)
IOUT
1.5
200
CURRENT (mA)
400
800
1000
1200
3.5 5.5
2000
3530 G17
600
2.5 4.5
1400
1600
1800
250mA AT 1.8V
PI FU CTIO S
UUU
RT (Pin 1): Programs the Frequency of the Internal Oscil-
lator. Connect a resister from RT to ground.
f(kHz) = 33,170/RT (kΩ)
BURST (Pin 2): Used to Set the Automatic Burst Mode
Threshold. Connect a resistor and capacitor in parallel
from this pin to ground. See the Applications Information
section for component value selection. For manual control,
ground the pin to force Burst Mode operation, connect to
VIN to force fi xed frequency PWM mode.
SW1 (Pin 3): Switch Pin Where the Internal Switches A and
B are Connected. Connect inductor from SW1 to SW2. An
optional Schottky diode can be connnected from SW1 to
ground for a moderate effi ciency improvement. Minimize
trace length to keep EMI down.
SW2 (Pin 4): Switch Pin Where the Internal Switches C
and D are Connected. For applications with output voltages
over 4.3V, a Schottky diode is required from SW2 to VOUT
to ensure the SW pin does not exhibit excessive voltage.
LTC3530
6
3530f
–
+
–
+
–
+
–
+
–
+
7
PWM
LOGIC
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
GND
OSC
SW A
SW1
VIN
SW2
SW D
ANTI-RING
ERROR
AMP
1.215V
REVERSE
AMP
SW B SW C
5
3 4
VOUT
6
FB
9
BURST
2
VC
10
8
SHDN/SS
1
RT
3530 BD
PWM
COMPARATORS
THERMAL
SHUTDOWN
SHUTDOWN
SOFT-START SHUTDOWN
1.215V
VREF
AUTOMATIC
BURST MODE
CONTROL
Gm = 1/60k
2A
VREF
SLEEP
L1
CIN COUT
CBURST
CP1
RSS
CSS
RT
R2
R1
RBURST
BLOCK DIAGRA
W
PI FU CTIO S
UUU
GND (Pin 5): Ground for the IC.
VOUT (Pin 6): Output of the Synchronous Rectifi er. A fi lter
capacitor is placed from VOUT to GND. A ceramic bypass
capacitor is recommended as close to the VOUT and GND
pins as possible.
VIN (Pin 7): Input Supply Voltage. Internal VCC for the IC.
A 10µF ceramic capacitor is recommended as close to the
VIN and GND pins as possible.
SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.
Applied voltage <0.4V shuts down the IC. Tie to >1.4V to
enable the IC and >1.6V to ensure the error amp is not
clamped from soft-start. An R-C from the shutdown com-
mand signal to this pin will provide a soft-start function
by limiting the rise time of VC.
FB (Pin 9): Feedback Pin. Connect resistor divider tap here.
The output voltage can be adjusted from 1.8V to 5.25V.
The feedback reference is typically 1.215V.
VV
R
R
OUT =+
⎛
⎝
⎜⎞
⎠
⎟
1 215 1 1
2
.•
VC (Pin10): Error Amp Output. An R-C network is con-
nected from this pin to FB for loop compensation. Refer
to “Closing the Feedback Loop” section for component
selection guidelines. During Burst Mode operation, VC is
internally clamped.
Exposed Pad (Pin 11, DD Package Only): Ground. This
pin must be soldered to the PCB and electrically connected
to ground.
LTC3530
7
3530f
OPERATIO
U
The LTC3530 provides high effi ciency, low noise power
for a wide variety of handheld electronic devices. The
LTC proprietary topology allows input voltages above,
below or equal to the output voltage by properly phasing
the output switches. The error amp output voltage on VC
determines the output duty cycle of the switches. Since
VC is a fi ltered signal, it provides rejection of frequencies
from well below the switching frequency. The low RDS(ON),
low gate charge synchronous switches provide high fre-
quency pulse width modulation control at high effi ciency.
High effi ciency is achieved at light loads when Burst Mode
operation is entered and the LTC3530’s quiescent current
drops to a low 40µA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is programmed by an external
resistor from RT to ground, according to the following
equation:
fR
kHz Tk
() ()
,
=Ω
33 170
Error Amp
The error amplifi er is a voltage mode amplifi er. The loop
compensation components are confi gured around the
amplifi er (from FB to VC) to obtain stability of the converter.
For improved bandwidth, an additional R-C feed-forward
network can be placed across the upper feedback divider
resistor. The voltage on
⎯
S
⎯
H
⎯
D
⎯
N/SS clamps the error amp
output, VC, to provide a soft-start function.
Internal Current Limit
There are two different current limit circuits in the LTC3530.
Each has internally fi xed thresholds which vary inversely
with VIN.
The fi rst circuit is a high speed peak current limit compara-
tor that will shut off switch A once the current exceeds
2.5A typical. The delay to output of this comparator is
typically 50ns.
A second amplifi er will source current out of FB to drop
the output voltage once the peak input current exceeds
2A typical. This method provides a closed loop means of
clamping the input current. During conditions where VOUT
is near ground, such as during a short-circuit or during
startup, this threshold is cut to 670mA (typ), providing a
foldback feature. For this current limit feature to be most
effective, the Thevenin resistance from FB to ground should
be greater than 100kΩ.
Reverse Current Limit
During fi xed frequency operation, the LTC3530 operates
in forced continuous conduction mode. The reverse cur-
rent limit amplifi er monitors the inductor current from
the output through switch D. Once the negative inductor
current exceeds 640mA typical, the LTC3530 will shut
off switch D.
Four-Switch Control
Figure 1 shows a simplifi ed diagram of how the four in-
ternal switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LTC3530 as a function of the internal control voltage, VCI.
3
SW1
4
SW2
PMOS A
NMOS B
7
VIN
PMOS D
NMOS C
3530 F01
6
VOUT
85%
DMAX
BOOST
DMIN
BOOST
DMAX
BUCK
DUTY
CYCLE
0%
V4 (≈1.5V)
V3 (≈1.15V)
BOOST REGION
BUCK REGION
BUCK/BOOST REGION
V2 (≈1V)
V1 (≈0.7V)
3530 F02
A ON, B OFF
PWM CD SWITCHES
D ON, C OFF
PWM AB SWITCHES
FOUR SWITCH PWM
INTERNAL
CONTROL
VOLTAGE, VCI
Figure 1. Simplifi ed Diagram of Output Switches Figure 2. Switch Control vs Internal Control Voltage, VCI
LTC3530
8
3530f
Depending on the control voltage, the IC will operate in
either buck, buck/boost or boost mode. The VCI voltage
is a level shifted voltage from the output of the error amp
(VC). The four power switches are properly phased so the
transfer between operating modes is continuous, smooth
and transparent to the user. When VIN approaches VOUT
the buck/boost region is reached where the conduction
time of the four switch region is typically 150ns. Referring
to Figures 1 and 2, the various regions of operation will
now be described.
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during
this mode. When the internal control voltage, VCI, is above
voltage V1, output A begins to switch. During the off-time of
switch A, synchronous switch B turns on for the remainder
of the time. Switches A and B will alternate similar to a
typical synchronous buck regulator. As the control volt-
age increases, the duty cycle of switch A increases until
the maximum duty cycle of the converter in buck mode
reaches DMAX_BUCK, given by:
D
MAX_BUCK = 100 – D4SW %
where D4SW = duty cycle % of the four switch range.
D4SW = (150ns • f) • 100 %
where f = operating frequency, Hz.
Beyond this point the “four switch,” or buck/boost region
is reached.
Buck/Boost or Four Switch (VIN ≈ VOUT)
When the internal control voltage, VCI, is above voltage
V2, switch pair AD remain on for duty cycle DMAX_BUCK,
and the switch pair AC begins to phase in. As switch pair
AC phases in, switch pair BD phases out accordingly.
When the VCI voltage reaches the edge of the buck/boost
range, at voltage V3, the AC switch pair completely phase
out the BD pair, and the boost phase begins at duty cycle
D4SW. The input voltage, VIN, where the four switch region
begins is given by:
VV
ns f
IN OUT
=1 150–( • )
The point at which the four switch region ends is given
by:
V
IN = VOUT(1 – D) = VOUT(1 – 150ns • f) V
Boost Region (VIN < VOUT)
Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is above
voltage V3, switch pair CD will alternately switch to provide
a boosted output voltage. This operation is typical of a
synchronous boost regulator. The maximum duty cycle
of the converter is limited to 90% typical and is reached
when VCI is above V4.
BURST MODE OPERATION
Burst mode reduces the LTC3530’s quiescent current
consumption at light loads and improves overall conver-
sion effi ciency, increasing battery life. During Burst Mode
operation the LTC3530 delivers energy to the output until
it is regulated and then goes into sleep mode where the
outputs are off and quiescent current drops to 40µA (typ).
In this mode the output ripple has a variable frequency
component that depends upon load current, and will
typically be about 2% peak-to-peak. Burst Mode opera-
tion ripple can be reduced slightly by using more output
capacitance (47µF or greater). Another method of reducing
Burst Mode operation ripple is to place a small feed-forward
capacitor across the upper resistor in the VOUT feedback
divider network (as in Type III compensation).
During the period where the device is delivering energy to
the output, the peak switch current will be equal to 450mA
typical and the inductor current will terminate at zero
current for each cycle. In this mode the typical maximum
average output current is given by:
ImA VV
I
MAX BURST BUCK OUT IN
MAX BURST B
()
()
;≅<
450
2
OOOST IN
OUT OUT IN
mA V
VVV≅⎛
⎝
⎜⎞
⎠
⎟>
450
2•;
I
MAX(BURST) Buck-Boost ≈ 350mA; VOUT ≈ VIN.
Since the input and output are connected together for
most of the cycle.
OPERATIO
U
LTC3530
9
3530f
The effi ciency below 1mA becomes dominated primarily
by the quiescent current. The Burst Mode operation ef-
fi ciency is given by:
EFFICIENCY I
AI
LOAD
LOAD
≅µ+
η•
40
where η is typically 90% during Burst Mode operation.
Automatic Burst Mode Operation Control
Burst Mode operation can be automatic or manually con-
trolled with a single pin. In automatic mode, the IC will
enter Burst Mode operation at light load and return to fi xed
frequency operation at heavier loads. The load current at
which the mode transition occurs is programmed using a
single external resistor from BURST to ground, according
to the following equations:
Enter Burst Mode: I 8.8
R
Leave Bu
BURST BURST
=
rrst Mode: I 11.2
R
BURST
BURST
=
where RBURST is in kΩ and IBURST is the load transition
current in Amps. Do not use values of RBURST greater
than 500kΩ.
For automatic operation, a fi lter capacitor must also be
connected from BURST to ground. The equation for the
minimum capacitor value is:
CCV
BURST MIN OUT OUT
()
•
,
≥60 000
where CBURST(MIN) and COUT are in µF
In the event that a load transient causes FB to drop by more
than 4% from the regulation value while in Burst Mode
operation, the IC will immediately switch to fi xed frequency
mode and an internal pull-up will be momentarily applied
to BURST, rapidly charging CBURST. This prevents the IC
from immediately re-entering Burst Mode operation once
the output achieves regulation.
Manual Burst Mode Operation
For manual control of Burst Mode operation, the RC
network connected to BURST can be eliminated. To force
fi xed frequency mode, BURST should be connected to
VIN. To force Burst Mode operation, BURST should be
grounded. When commanding Burst Mode operation
manually, the circuit connected to BURST should be able
to sink up to 2mA.
For optimum transient response with large dynamic loads,
the operating mode should be controlled manually by the
host. By commanding fi xed frequency operation prior to
a sudden increase in load, output voltage droop can be
minimized. Note that if the load current applied during
forced Burst Mode operation (BURST pin is grounded)
exceeds the current that can be supplied, the output voltage
will start to droop and the IC will automatically come out
of Burst Mode operation and enter fi xed frequency mode,
raising VOUT. Once regulation is achieved, the IC will then
enter Burst Mode operation once again, and the cycle will
repeat, resulting in about 4% output ripple.
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
not used and VC is disconnected from the error amplifi er.
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to fi xed frequency mode of operation, even
at the same load current. To prevent this, the LTC3530
incorporates an active clamp circuit that holds the voltage
on VC at an optimal voltage during Burst Mode operation.
This minimizes any output transient when returning to
fi xed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended to
broad band the control loop and roll off past the two pole
response of the output LC fi lter. See Closing the Feedback
Loop under Applications Information.
OPERATIO
U
LTC3530
10
3530f
Soft-Start
The soft-start function is combined with shutdown.
When the
⎯
S
⎯
H
⎯
D
⎯
N/SS pin is brought above 1V typical, the
IC is enabled but the EA duty cycle is clamped from VC.
A detailed diagram of this function is shown in Figure 3.
The components RSS and CSS provide a slow ramping
voltage on
⎯
S
⎯
H
⎯
D
⎯
N/SS to provide a soft-start function. To
ensure that VC is not being clamped,
⎯
S
⎯
H
⎯
D
⎯
N/SS must be
raised above 1.6V.
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3530 allows the
use of small surface mount inductors. The inductor ripple
current is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
LVVV
fIV H
L
BOOST
IN MIN OUT IN MIN
L OUT
>∆
() ()
•( – )
••
BBUCK
OUT IN MAX OUT
LINMAX
VV V
fIV H>∆
•( – )
••
()
()
where f = operating frequency, Hz
∆IL = maximum allowable inductor ripple current, A
VIN(MIN) = minimum input voltage, V
VIN(MAX) = maximum input voltage, V
VOUT = output voltage, V
IOUT(MAX) = maximum output load current
For high effi ciency, choose a ferrite inductor with a high
frequency core material to reduce core loses. The induc-
tor should have low ESR (equivalent series resistance) to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. Molded chokes or chip
inductors usually do not have enough core to support the
peak inductor currents in the 1A to 2A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
Output Capacitor Selection
The bulk value of the output fi lter capacitor is set to reduce
the ripple due to charge into the capacitor each cycle. The
steady state ripple due to charge is given by:
% Ripple_Boost =
IVV
CV f
OUT MAX OUT IN MIN
OUT OUT
() ()
•( – )•
•• %
100
2
% Ripple_Buck =
1
8
100
2
LCf
VV
V
IN MAX OUT
IN MAX
(–)•
%
()
()
where COUT = output fi lter capacitor in Farads and
f = switching frequency in Hz.
OPERATIO
U
VIN
VC
VCI
SHDN/SS
3530 F05
Figure 3.
Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEB SITE
Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com
CoEv Magnetics (800) 227-7040 (650) 361-2508 www.circuitprotection.com/magnetics.asp
Murata (814) 237-1431
(800) 831-9172
(814) 238-0409 www.murata.com
Sumida USA: (847) 956-0666
Japan: 81(3) 3607-5111
USA: (847) 956-0702
Japan: 81(3) 3607-5144
www.sumida.com
TDK (847) 803-6100 (847) 803-6296 www.component.tdk.com
TOKO (847) 297-0070 (847) 699-7864 www.tokoam.com
LTC3530
11
3530f
The output capacitance is usually many times larger than
the minimum value in order to handle the transient response
requirements of the converter. For a rule of thumb, the ratio
of the operating frequency to the unity-gain bandwidth of
the converter is the amount the output capacitance will
have to increase from the above calculations in order to
maintain the desired transient response.
The other component of ripple is due to the ESR (equiva-
lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden or
TDK ceramic capacitors, AVX TPS series tantalum capaci-
tors or Sanyo POSCAP are recommended. See Table 2 for
contact information.
Input Capacitor Selection
Since VIN is the supply voltage for the IC, as well as the
input to the power stage of the converter, it is recommended
to place at least a 10µF, low ESR ceramic bypass capaci-
tor close to the VIN and GND pins. It is also important to
minimize any stray resistance from the converter to the
battery or other power source.
Optional Schottky Diodes
Schottky diodes across the synchronous switches B and
D are not required (VOUT < 4.3V), but provide a lower
drop during the break-before-make time (typically 15ns)
improving effi ciency. Use a surface mount Schottky diode
such as an MBRM120T3 or equivalent. Do not use ordi-
nary rectifi er diodes, since the slow recovery times will
compromise effi ciency. For applications with an output
voltage above 4.3V, a Schottky diode is required from
SW2 to VOUT.
Output Voltage < 1.8V
The LTC3530 can operate as a buck converter with output
voltages as low as 0.4V. Synchronous switch D is powered
from VOUT and the RDS(ON) will increase at low output volt-
ages, therefore a Schottky diode is required from SW2 to
VOUT to provide the conduction path to the output. Note
that Burst Mode operation is inhibited at output voltages
below 1V typical. Note also that if VOUT is less than 1V,
the current limit will be 670mA (typ).
Output Voltage > 4.3V
A Schottky diode from SW2 to VOUT is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between SW1 and
GND. A Schottky diode from SW1 to VIN should also be
added as close to the pins as possible. For the higher input
voltages, VIN bypassing becomes more critical; therefore,
a ceramic bypass capacitor as close to the VIN and GND
pins as possible is also required.
Operating Frequency Selection
Higher operating frequencies allow the use of a smaller
inductor and smaller input and output fi lter capacitors,
thus reducing board area and component height. How-
ever, higher operating frequencies also increase the IC’s
total quiescent current due to the gate charge of the four
switches, as given by:
Buck: Iq = (0.6 • VIN • f) mA
Boost: Iq = [0.8 • (VIN + VOUT) • f] mA
Buck/Boost: Iq = [f • (1.4 • VIN + 0.4 • VOUT)] mA
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEB SITE
AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com
Murata (814) 237-1431, (800) 831-9172 (814) 238-0409 www.murata.com
Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com
TDK (847) 803-6100 (847) 803-6296 www.component.tdk.com
APPLICATIONS INFORMATION
LTC3530
12
3530f
where f = switching frequency in MHz. Therefore frequency
selection is a compromise between the optimal effi ciency
and the smallest solution size.
Closing the Feedback Loop
The LTC3530 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck/boost), but is usually no greater than
15. The output fi lter exhibits a double pole response, as
given by:
fLC Hz
FILTER POLE
OUT
—•• •
=1
2π
(in buck mode)
fV
VLC
Hz
FILTER POLE IN
OUT OUT
—••••
=2π
(in boost mode)
where L is in henries and COUT is in farads.
The output fi lter zero is given by:
fRC
Hz
FILTER ZERO ESR OUT
—•• •
=1
2π
where RESR is the equivalent series resistance of the
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
fV
ILV
Hz
RHPZ IN
OUT OUT
=2
2• • • •π
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated
to stabilize the loop, but at a cost of reduced bandwidth
and slower transient response. To ensure proper phase
margin using Type I compensation, the loop must be
crossed over a decade before the LC double pole. The
unity-gain frequency of the error amplifi er with the Type
I compensation is given by:
fRC
Hz
UG P
=1
21
1
•• •π(referring to Figure 4).
Most applications demand an improved transient response
to allow a smaller output fi lter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output fi lter. Referring to Figure 5, the location of the
poles and zeros are given by:
feRCP
Hz
which is extremely c
POLE1 3
1
232 11
≅•• • •
(
π
ll o s e t o D C
fRC
Hz
fR
ZERO ZP
ZERO
)
•• •
••
11
2
1
2
1
2
=
=
π
π11
1
2
1
22
•
•• •
CHz
fRC
Hz
Z
POLE ZP
=π
where resistance is in ohms and capacitance is in
farads.
1.215V
R1
R2
3530 F03
FB
12
VCCP1
VOUT
11
–
+
ERROR
AMP
1.215V R1
R2
3530 F04
FB
12
VCCP1
CZ1
RZ
VOUT
11
CP2
–
+
ERROR
AMP
Figure 4. Error Amplifi er with Type I Compensation Figure 5. Error Amplifi er with Type III Compensation
APPLICATIONS INFORMATION
LTC3530
13
3530f
SW1
VIN
SHDN/SS
RT
SW2
VOUT
FB
VC
BURST
LTC3530
CIN
10µF
CSS
0.01µF
CIN: TAIYO YUDEN JMK212BJ106MG
COUT: TAIYO YUDEN JMK325BJ226MM
L1: TDK RLF7030T-3R3M4R
2.7V TO 4.2V
Li-Ion
RZ
15k
R1
340k
RFF
4.7k
L1
3.3µH
COUT
22µF
CZ1
100pF
VOUT
3.3V
500mA
R2
200k
CP1
470pF
3530 TA02
RT
33.2k
BURST FIXED FREQ
RSS
1M
GND
SW1
VIN
SHDN/SS
RT
SW2
VOUT
FB
VC
BURST
LTC3530
CIN: TAIYO YUDEN JMK212BJ106MG
COUT: TAIYO YUDEN JMK325BJ226MM
L1: TDK RLF7030T-4R7M3R4
RZ
15k
R1
340k
RBURST
200k
RFF
4.7k
CBURST
0.01µF
CZ1
100pF
VOUT
3.3V
500mA
R2
200k
CP1
470pF
3530 TA03
RSS
1M
L1
4.7µH
COUT
22µF
GND
+
IN1
IN2
VNTC
NTC
WALL
SHDN
SUSP
HPWR
OUT
Li-Ion
CELL
10µF
1Ω
10µF
TIMER PROG
LTC4055
CLPROG GND
BAT
CHRG
ACPR
0.1µF 97.6k 97.6k
SUSPEND USB POWER
500mA/100mA SELECT
5V (NOM)
FROM USB
CABLE VBUS
RT
33.2k
CSS
0.01µF
1MHz Li-Ion to 3.3V at 500mA Converter with Manual Mode Control
1MHz Li-Ion to 3.3V/600mA Converter with USB Power Input Option,
Li Battery Charger and Power Path Management.
TYPICAL APPLICATIONS
LTC3530
14
3530f
LED CURRENT (A)
0.1
EFFICIENCY (%)
0.5
3530 TA04b
80
84
88
92
96
82
86
90
94
98
100 VIN = 3.6V
1MHz
High Effi ciency Li-Ion Powered Constant Current Lumiled Driver
SW1
VIN
SD/SS
RT
SW2
VOUT
FB
VC
BURST
LTC3530
VIN
2.2V TO
4.2V
LHXL-PW01
COUT
4.7µF
CP1
1nF
3530 TA04a
L1
3.3µH
CBURST
470pF
CIN
10µF
OFF ON
R2 = R1/1.5
ILED
=
C
IN
= TAIYO YUDEN JMK212BJ106MG
C
OUT
= TAIYO YUDEN JMK325BJ475MM
D1 = BAT54
12,810 (R1+R2+R3+R4)
R1, R3
R3
95.3k
R2
100k
R1
301k
RT
44.2k
R4
100k
ILED = 500mA
GND
D1
Lumiled Driver Effi ciency vs LED Current
TYPICAL APPLICATIONS
LTC3530
15
3530f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3.00 ±0.10
(4 SIDES)
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD10) DFN 1103
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)
2.15 ±0.05
0.50
BSC
0.675 ±0.05
3.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
MSOP (MS) 0603
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.50
(.0197)
BSC
12345
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1695)
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
PACKAGE DESCRIPTION
LTC3530
16
3530f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 1006 • PRINTED IN USA
PART NUMBER DESCRIPTION COMMENTS
LT3400/LT3400B 600mA (ISW), 1.2MHz Synchronous Step-Up DC/DC Converter VIN: 0.85V to 5V, VOUT(MAX) = 5V,
IQ = 19µA/300µA, ISD < 1µA, ThinSOT Package
LT3401/LT3402 1A/2A (ISW), 3MHz Synchronous Step-Up DC/DC Converter VIN: 0.5V to 5V, VOUT(MAX) = 5V, IQ = 38mA,
ISD < 1µA, MS Package
LT3406/LT3406B 600mA (IOUT), 1.5MHz Synchronous Step-Up DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA,
ISD ≤ 1µA, ThinSOT Package
LT3407 600mA (IOUT), 1.5MHz Dual Synchronous Step-Up DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA,
ISD ≤ 1µA, MS Package
LT3411 1.25A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,
ISD ≤ 1µA, MS Package
LT3412 2.5A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,
ISD ≤ 1µA, TSSOP16E Package
LT3421 3A (ISW), 3MHz Synchronous Step-Up DC/DC Converter VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA,
ISD < 1µA, QFN Package
LT3425 5A (ISW), 8MHz Multiphase Synchronous Step-Up DC/DC Converter VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA,
ISD < 1µA, QFN Package
LT3429 600mA (ISW), 500kHz Synchronous Step-Up DC/DC Converter VIN: 0.5V to 4.4V, VOUT(MAX) = 5V, IQ = 20µA,
ISD < 1µA, QFN Package
LT3440 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25µA,
ISD < 1µA, MS, DFN Package
LT3441 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25µA,
ISD < 1µA, DFN Package
LT3442/LTC3443 1.2A (IOUT), Synchronous Buck-Boost DC/DC Converters,
LTC3442 (1MHz), LTC3443 (600kHz)
VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 28µA,
ISD < 1µA, MS Package
LT3444 500mA (IOUT), 1.5MHz Synchronous Buck-Boost DC/DC Converter with
Wide VOUT Range
VIN: 2.7V to 5.5V, VOUT = 0.5V to 5.25V, 3mm x 3mm
DFN Package, Ideal for WCDMA PA Bias
LT3532 500mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = ISD < 1µA,
DFN Package
ThinSOT is a trademark of Linear Technology Corporation.
RELATED PARTS
SW1
VIN
SHDN/SS
BURST
RT
SW2
VOUT
FB
VC
GND
3
7
8
2
1
4
6
9
10
5
LTC3530
L1
10µH
R1
619k
R2
200k
3530 TA05
RT
33.2k
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-100
*0 = Burst Mode OPERATION
1 = FIXED FREQUENCY
** LOCATE COMPONENTS AS
CLOSE TO IC AS POSSIBLE
C1
10µF
C3
0.1µF
R4 1M
USB
4.35V TO
5.25V
2Ω
*
SD
C4
1.5nF
15k
fOSC = 1MHz
C2**
22µF
VOUT
5VIN – 435mA MAX
4.35VIN – 350mA MAX
D1**1nF
D2**
USB to 5V Converter with Output Disconnect
TYPICAL APPLICATION
