1
FEATURES DESCRIPTION
APPLICATIONS
OPA454
V-
V+
Status
Flag
Enable/DisableCommon
(E/DCom)
Enable/Disable(E/D)
+IN
-IN
VO
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
High-Voltage (100V), High-Current (50mA)OPERATIONAL AMPLIFIERS, G = 1 Stable
2
WIDE POWER-SUPPLY RANGE:
The OPA454 is a low-cost operational amplifier with± 5V (10V) to ± 50V (100V)
high voltage (100V) and relatively high current drive(50mA). It is unity-gain stable and has aHIGH OUTPUT LOAD DRIVE: I
O
> ± 50mA
gain-bandwidth product of 2.5MHz.WIDE OUTPUT VOLTAGE SWING: 1V to Rails
The OPA454 is internally protected againstINDEPENDENT OUTPUT DISABLE OR
over-temperature conditions and current overloads. ItSHUTDOWN
is fully specified to perform over a wide power-supplyWIDE TEMPERATURE RANGE: 40 ° C to +85 ° C
range of ± 5V to ± 50V or on a single supply of 10V toSO-8 PACKAGE
100V. The status flag is an open-drain output thatallows it to be easily referenced to standardlow-voltage logic circuitry. This high-voltage op ampprovides excellent accuracy, wide output swing, andTEST EQUIPMENT
is free from phase inversion problems that are oftenAVALANCHE PHOTODIODE:
found in similar amplifiers.High-V Current Sense
The output can be independently disabled using thePIEZOELECTRIC CELLS
Enable/Disable Pin that has its own common returnTRANSDUCER DRIVERS
pin to allow easy interface to low-voltage logicSERVO DRIVERS
circuitry. This disable is accomplished withoutAUDIO AMPLIFIERS
disturbing the input signal path, not only saving powerbut also protecting the load.HIGH-VOLTAGE COMPLIANCE CURRENTSOURCES
Featured in a small exposed metal pad package, theGENERAL HIGH-VOLTAGE
OPA454 is easy to heatsink over the extendedREGULATORS/POWER
industrial temperature range, 40 ° C to +85 ° C.
Table 1. OPA454 RELATED PRODUCTS
PRODUCT DESCRIPTION
OPA445
(1)
80V, 15mAOPA452 80V, 50mAOPA547 60V, 750mAOPA548 60V, 3AOPA549 60V, 9AOPA551 60V, 200mAOPA567 5V, 2AOPA569 5V, 2.4A
(1) The OPA445 is pin-compatible with the OPA454, except inapplications using the offset trim, and NC pins other thanopen.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
PIN ASSIGNMENT
1
2
3
4
8
7
6
5
E/D(Enable/Disable)
V+
OUT
StatusFlag
E/DCom(Enable/DisableCommon)
-IN
+IN
V-
PowerPAD
HeatSink
(Locatedon
bottomside)
(1)
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
OPA454 SO-8 DDA OPA454
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .
OPA454 UNIT
Supply Voltage V
S
= (V+) (V ) 120 VSignal Input Terminals, Voltage
(2)
(V ) 0.3 to (V+) + 0.3 VSignal Input Terminals, Current
(2)
± 10 mAE/D to E/D Com Voltage +5.5 VOutput Short-Circuit
(3)
I
SC
ContinuousOperating Temperature T
J
55 to +125 ° CStorage Temperature 55 to +125 ° CJunction Temperature T
J
+150 ° CHuman Body Model (HBM) 4000 VESD Rating: Charged Device Model (CDM) 500 VMachine Model (MM) 150 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods maydegrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyondthose specified is not implied.(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails shouldbe current limited to 10mA or less.(3) Short-circuit to ground.
DDA PACKAGE
SO-8 PowerPAD
(TOP VIEW)
(1) PowerPAD is internally connected to V . Soldering the PowerPAD to the printed circuit board (PCB) is alwaysrequired, even with applications that have low power dissipation.
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ELECTRICAL CHARACTERISTICS: V
S
= ± 50V
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Boldface limits apply over the specified temperature range, T
A
= 40 ° C to +85 ° C.At T
P
(1)
= +25 ° C, R
L
= 4.8k to mid-supply, V
CM
= V
OUT
= mid-supply, unless otherwise noted.
OPA454
PARAMETER CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Input Offset Voltage V
OS
I
O
= 0 ± 0.2 ± 4 mV
vs Temperature
(2)
dV
OS
/dT ± 1.6 ± 10 µV/ ° C
vs Power Supply PSRR V
S
= ± 4V to ± 60V, V
CM
= 0V 25 100 µV/V
INPUT BIAS CURRENT
Input Bias Current I
B
± 1.4 ± 100 pA
vs Temperature See Typical Characteristics
Input Offset Current I
OS
± 0.2 ± 100 pA
NOISE
Input Voltage Noise Density, f = 10Hz e
n
300 nV/ Hz
Input Voltage Noise Density, f = 10kHz 35 nV/ Hz
f = 0.01Hz to 10Hz 15 µV
PP
Current Noise Density, f = 1kHz i
n
40 fA/ Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range V
CM
Linear Operation (V ) + 2.5 See Note
(3)
(V+) 2.5 V
Common-Mode Rejection CMRR V
S
= ± 50V, 25V V
CM
+25V 100 146 dB
V
S
= ± 50V, 45V V
CM
+45V 100 147 dB
Over Temperature V
S
= ± 50V, 25V V
CM
+25V 80 88 dB
Over Temperature V
S
= ± 50V, 45V V
CM
+45V 72 82 dB
INPUT IMPEDANCE
Differential || pF10
13
|| 10
Common-Mode || pF10
13
|| 9
OPEN-LOOP GAIN
Open-Loop Voltage Gain
(4)
A
OL
(V ) + 1V < V
O
< (V+) 1V,
100 130 dBR
L
= 49k , I
O
= ± 1mA
(V ) + 1V < V
O
< (V+) 1V,
112 dBR
L
= 49k , I
O
= ± 1mA
(V ) + 1V < V
O
< (V+) 2V,
100 115 dBR
L
= 4.8k , I
O
= ± 10mA
(V ) + 1V < V
O
< (V+) 2V,
106 dBR
L
= 4.8k , I
O
= ± 10mA
(V ) + 2V < V
O
< (V+) 3V,
80 102 dBR
L
= 1880 , I
O
= ± 25mA
(V ) + 2V < V
O
< (V+) 3V,
84 dBR
L
= 1880 , I
O
= ± 25mA
(1) T
P
is the temperature of the leadframe die pad (exposed thermal pad) of the PowerPAD package.(2) See typical characteristic curve, Offset Voltage Drift Production Distribution (Figure 14 ).(3) Typical range is (V ) + 1.5V to (V+) 1.5V.(4) Measured using low-frequency ( < 10Hz) ± 49V square wave. See typical characteristic curve, Current Limit vs Temperature (Figure 24 ).
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OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
ELECTRICAL CHARACTERISTICS: V
S
= ± 50V (continued)Boldface limits apply over the specified temperature range, T
A
= 40 ° C to +85 ° C.At T
P
= +25 ° C, R
L
= 4.8k to mid-supply, V
CM
= V
OUT
= mid-supply, unless otherwise noted.
OPA454
PARAMETER CONDITIONS MIN TYP MAX UNIT
FREQUENCY RESPONSE
(5)
Gain-Bandwidth Product GBW Small-Signal 2.5 MHz
Slew Rate SR G = ± 1, V
O
= 80V Step, R
L
= 3.27k 13 V/ µs
Full-Power Bandwidth
(6)
35 kHz
Settling Time: ± 0.1%
(7)
G = ± 1, V
O
= 20V Step 3 µs
Settling Time: ± 0.01%
(7)
G = ± 5 or ± 10, V
O
= 80V Step 10 µs
V
S
= +40.6V/ 39.6V, G = ± 1,Total Harmonic Distortion + Noise
(8)
THD+N 0.0008 %f = 1kHz, V
O
= 77.2V
PP
OUTPUT
Voltage Output Swing From Rail
(9)
V
O
R
L
= 49k , A
OL
100dB, I
O
= 1mA (V ) + 1 (V+) 1 V
R
L
= 4.8k , A
OL
100dB, I
O
= 10mA (V ) + 1 (V+) 2 V
R
L
= 1880 , A
OL
80dB, I
O
= 26mA (V ) + 2 (V+) 3 V
Continuous Current Output, dc Depends on Circuit Conditions See Figure 6
Maximum Peak Current Output, Current
I
O
+120/ 150 mALimit
(10)
Over Temperature +140/ 170 mA
Capacitive Load Drive
(5)
C
LOAD
200 pF
Open-Loop Output Impedance R
O
See Figure 5
Output Disabled
Output Capacitance 18 pF
Feedthrough Capacitance
(11)
150 fF
STATUS FLAG PIN (Referenced to E/D Com)
(12)
Status Flag Delay Enable Disable 6 µs
Disable Enable 4 µs
Over-Current Delay
(13)
15 µs
Over-Current Recovery Delay
(13)
10 µs
Junction Temperature T
J
Alarm (status flag high) +150 ° C
Return to Normal Operation (status flag low) +130 ° C
Output Voltage
(5)
Normal Operation E/D Com + 2 V
R
L
= 100 During Thermal Overdrive,
(V+) 2.5 VAlarm
(5) See Typical Characteristic curves.(6) See typical characteristic curve, Maximum Output Voltage vs Frequency (Figure 12 ).(7) See the Applications Information section, Settling Time .(8) Supplies reduced to allow closer swing to rails due to test equipment limitations. See typical characteristic curve Total HarmonicDistortion + Noise vs Temperature (Figure 30 and Figure 31 ) for additional power levels.(9) See typical characteristic curve, Output Voltage Swing vs Output Current (Figure 11 ).(10) Measured using low-frequency ( < 10Hz) ± 49V square wave. See typical characteristic curve, Current Limit vs Temperature (Figure 24 ).(11) Measured using Figure 1 .(12) 100k pull-up resistor to (V+). E/D common to (V ). Status flag indicates an over temperature or over-current condition.(13) See Typical Characteristic curves for current limit behavior.
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RL
50kW
100VPP
10kHz
+50V
E/DCom
E/D
-50V
VOUT
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS: V
S
= ± 50V (continued)Boldface limits apply over the specified temperature range, T
A
= 40 ° C to +85 ° C.At T
P
= +25 ° C, R
L
= 4.8k to mid-supply, V
CM
= V
OUT
= mid-supply, unless otherwise noted.
OPA454
PARAMETER CONDITIONS MIN TYP MAX UNIT
E/D (ENABLE/DISABLE) PIN
E/D Pin, Referenced to E/D Com Pin
(14) (15)
High (output enabled) V
SD
Pin Open or Forced High E/D Com + 2.5 E/D Com + 5 V
E/D Com +Low (output disabled) V
SD
Pin Forced Low E/D Com V0.65
Output Disable Time 4 µs
Output Enable Time 3 µs
E/D COM PIN
Voltage Range (V ) (V+) 5 V
POWER SUPPLY
Specified Range V
S
± 50 V
Operating Voltage Range ± 5 ± 50 V
Quiescent Current I
Q
I
O
= 0 3.2 4 mA
Quiescent Current in Shutdown Mode I
O
= 0, V
E/D
= 0.65V 150 210 µA
TEMPERATURE RANGE
Specified Range T
A
40 +85 ° C
Operating Range T
A
55 +125 ° C
Thermal Resistance, Junction-to-Case
(16)
SO-8 PowerPAD
(17)
θ
JC
10 ° C/W
Thermal Resistance, Junction-to-Ambient θ
JA
SO-8 PowerPAD
(17)
24/52 ° C/W
(14) See typical characteristic curve, I
ENABLE
vs V
ENABLE
(Figure 46 ).(15) High enables the outputs.(16) T
P
is the temperature of the leadframe die pad (exposed thermal pad) of the PowerPAD package.(17) Lower value is for land area of 1-inch × 1-inch, 2-oz copper. Upper value is for exposed-pad sized area of 1-oz copper.
xxx
xxx
Figure 1. Feedthrough Capacitance Circuit
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
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TYPICAL CHARACTERISTICS
0.1 1 10 100 1k 10k 100k 1M 10M
Frequency(Hz)
180
160
140
120
100
80
60
40
20
0
-20
Open-LoopGain,Phase(dB, )°
RLOAD =4.87kW
C =50pF
V =0V
LOAD
CM
Phase
Gain
-75 0-50 -25 50 75 100 125
ExposedThermalPad Temperature( C)°
70
65
60
55
50
45
40
PhaseMargin( )°
25
C =200pF
L
C =30pF
L
C =100pF
L
V =0V
CM
VCM =-45V
V =+45V
CM
-75 0-50 -25 50 75 100 125
ExposedThermalPadTemperature( C)°
3.8
3.6
3.4
3.2
3.0
2.2
2.0
Bandwidth(MHz)
25
C =30pF.100pF,and200pF
L
V =45V
CM
V = 45V-
CM
V =0V
CM
2.8
2.6
2.4
1 1k10 100 100k 1M 10M
Frequency(Hz)
1M
100k
10k
1k
100
1
Open-LoopOutputImpedance( )W
10k
10
0 5 10 15 20 25
PeakI (mA)
L
140
130
120
110
100
90
80
70
60
A (dB)
OL
VS=±50V
VS=±15V
VS=±4V
-75 -50 -25 0 25 50 75 100 125
ExposedThermalPad Temperature( C)°
140
130
120
110
100
90
80
70
60
50
A (dB)
OL
R =48kW
LOAD
V = 49V(dc)±
OUT
I = 1mA±
OUT
R =1.88kW
L
VOUT =+47V, -48V(dc)
I = 25mA±
OUT
R =900W
L
V , 47V(dc)-
OUT =+45V
I =50mAto 52mA
OUT -
R =4.8kW
L
OUT
OUT
V =+48V, 49V(dc)
I =+9.9mAto 10mA
-
-
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
OPEN-LOOP GAIN AND PHASEvs FREQUENCY PHASE MARGIN vs TEMPERATURE
Figure 2. Figure 3.
UNITY-GAIN BANDWIDTH OPEN-LOOP OUTPUT IMPEDANCEvs TEMPERATURE vs FREQUENCY
Figure 4. Figure 5.
OPEN-LOOP GAIN vs PEAK-LOAD CURRENT OPEN-LOOP GAIN vs TEMPERATURE
Figure 6. Figure 7.
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-75 -50 -25 0 25 50 75 100 125
ExposedThermalPadTemperature( C)°
120
100
80
60
40
20
0
PSRRandCMRR(dB)
1kHz,CMRR
10kHz,CMRR
100kHz,CMRR
1.3MHz,CMRR
V =+45V
CM
VCM =-45V
PSRR
1 10 100 1k 10k 100k 1M 10M
Frequency(Hz)
140
120
100
80
60
40
20
0
CMRR(dB)
VCM =-45V
V =+45V
CM
1 10 100 1k 10k 100k 1M
Frequency(Hz)
140
120
100
80
60
40
20
0
PSRR(dB)
0 15050 100 200 300
Frequency(kHz)
120
100
80
60
40
20
0
OutputVoltage(V )
PP
250
V = 49V
R =4.8k
I = 10mA
OUT
L
OUT
±
W
±
OffsetVoltage( V)m
Population
-4000 -3000 -2000 40003000200010000-1000
Average=111 V
StandardDeviation=142 V
m
m
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
POWER-SUPPLY AND COMMON-MODECOMMON-MODE REJECTION RATIO vs FREQUENCY REJECTION RATIO vs TEMPERATURE
Figure 8. Figure 9.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENTPOWER-SUPPLY REJECTION RATIO vs FREQUENCY (Measured When Status Flag Transitions From Low to High)
Figure 10. Figure 11.
DDA PACKAGE OFFSET VOLTAGEMAXIMUM OUTPUT VOLTAGE vs FREQUENCY PRODUCTION DISTRIBUTION
Figure 12. Figure 13.
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OffsetVoltageDrift( V/ C)m °
Population
0
Average=1.57 V/ C
StandardDeviation=0.84 V/ C
m °
m °
10987654321
-2.0
0
-0.8
0.4
-0.4
0.8
OutputVoltageShift( V/ C)m °
Population
-1.2
-1.6
1.2
1.6
2.0
Average=0.34 V/ C
StandardDeviation=0.44 V/ C
m °
m °
100s/div
200
150
100
50
0
-50
-100
-150
-200
OffsetVoltage( V)
m
V = 50V±
S
PowerPADAttached
9in 12in0.062´
LayerMetalPCBFR10
-1000
0
-400
200
-200
400
OffsetVoltageShift( V)m
Population
-600
-800
600
800
1000
Average=48 V/ C
Standard
Deviation=28 V/ C
m °
m °
0 3010 20 40 60 70 80 90 100 110 120
TotalSupplyVoltage(V)
3.25
3.20
3.15
3.10
3.05
3.00
2.95
2.90
I(mA)
Q
50
2.5
3.4
3.0
3.5
3.1
3.6
3.2
3.7
3.3
3.8
3.9
QuiescentCurrent(mA)
Population
2.9
2.8
2.7
2.6
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
OFFSET VOLTAGEDRIFT PRODUCTION DISTRIBUTION SOLDER-ATTACHED, V
OS
TC SHIFT
Figure 14. Figure 15.
OFFSET VOLTAGE WARMUPDDA PACKAGE, SOLDER-ATTACHED, V
OS
SHIFT (60 Devices)
Figure 16. Figure 17.
QUIESCENT CURRENT PRODUCTION DISTRIBUTION QUIESCENT CURRENT vs SUPPLY VOLTAGE
Figure 18. Figure 19.
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-75 0-50 -25 25 75 100 125
ExposedThermalPadTemperature( C)°
4.0
3.8
3.6
3.4
3.2
3.0
2.0
I(mA)
Q
50
2.8
2.6
2.4
2.2
-75 0-50 -25 25 75 100 125
ExposedThermalPadTemperature( C)°
200
180
160
140
120
100
ShutdownCurrent( A)m
50
5TypicalUnitsShown
-75 -50 -25 0 25 50 75 100 125
ExposedThermalPadTemperature( C)°
100
10
1
0.1
I (pA)
B
-50 -40 -30 -20 -10 0 10 20 30 40 50
V (V)
CM
20
15
10
5
0
-5
-10
-15
-20
I (pA)
B
Common-ModeVoltageRange
-75 -50 -25 0 25 50 75 100 125
ExposedThermalPadTemperature( C)°
200
180
160
140
120
100
I (mA)
LIMIT
Sourcing
Sinking
-75 -50 -25 0 25 50 75 100 125
ExposedThermalPadTemperature( C)°
8
7
6
5
4
3
2
1
0
V toV-
FLAG
R =20k ,I =5mAW
P P
R =50kW
P P
,I =2mA
R =100kW
P P
,I =100 Am
R =200kW
P,I =50 Am
P
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE SHUTDOWN CURRENT vs TEMPERATURE
Figure 20. Figure 21.
INPUT BIAS CURRENT vs TEMPERATURE INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
Figure 22. Figure 23.
STATUS FLAG VOLTAGE vs TEMPERATURECURRENT LIMIT vs TEMPERATURE (E/D Com Connected to V )
(1)
Figure 24. Figure 25.
(1) See Figure 57 in the Applications Information section.
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-50 -25 0 25 75 100 125
ExposedThermalPadTemperature( C)°
Dissipation(W)
50
2.0
1.5
1.0
0.5
0
T (+125 Cmax)=T°+[(|V | |V |)I- ´ q ]
J OA S O JA
q=+52 C/W,SO-8PowerPAD°
JA
(1in 0.5in´[25.4mmx12.7mm]
Heat-Spreader,1ozCopper)
T =+25 C+(1.93W° ´ 52 C/W)=+125 C° °
J
SO-8PowerPAD:
T =+125 C
J(max)°
-75 0-50 -25 25 125
ExposedThermalPadTemperature( C)°
16
15
14
13
12
11
10
9
8
SlewRate(V/ s)m
50 75 100
G=+1
V = 45V
S±
V =80VStep
IN
R =4.8kW
LOAD
20s/div
5 V/divm
10 10k100 1k 100k
Frequency(Hz)
1000
100
10
1
VoltageNoise(nV/ )
ÖHz
10 10k100 1k 100k
Frequency(Hz)
0.040
0.035
0.030
0.025
0.020
0.015
0.010
THD+N(%)
G=+10
R =4.75kW
I
V =38.6V
PK
V =
S-55,+55
V =
S-49,+50
10 10k100 1k 100k
Frequency(Hz)
0.0030
0.0025
0.0020
0.0015
0.0010
0.0005
0
THD+N(%)
V =+40.6,
39.6
S
-
V =+41.6, 40.6-
S
G=+1
R =4.75k
IW
V =38.6V
PK
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
MAXIMUM POWER DISSIPATIONvs TEMPERATURE WITH MINIMUM ATTACH AREA SLEW RATE vs TEMPERATURE
Figure 26. Figure 27.
INPUT VOLTAGE NOISE SPECTRAL DENSITY 0.01Hz TO 10Hz INPUT VOLTAGE NOISE
Figure 28. Figure 29.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs TEMPERATURE vs TEMPERATURE
Figure 30. Figure 31.
10 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
Time(1ms/div)
500mV/div
VIN
VOUT
G=+1
T =+60 C
C°
CLOAD =50pF
VCM =+30V
RF=10kW
Time(1ms/div)
500mV/div
VIN
VOUT
G=+1
T =+105 C
C°
CLOAD =50pF
VCM =+30V
RF=10kW
Time(2.5 s/div)m
V (200mV/div)
V (400mV/div)
IN
OUT
VIN
VOUT
G=+2
T =+100 C
C°
C =100pF
LOAD
V =+40V
CM
R =10kW
F
Time(500ns/div)
50mV
G=+1
C =100pF
LOAD
V =0V
CM
R =0W
F
T =+125 C
C°
T =+25 C
C°
T = 55- °
CC
1ms/div
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
V (V)
OUT
G=+2
G=+1
R =10kW
F
C =100pF,125 C°
LOAD
V =+40V
CM
0 300100 200 400 500
C (pF)
LOAD
180
160
140
120
100
80
60
40
20
0
Peaking(%)
R =0
FW
R =10k
FW
T =+125 C°
C
T =
C+85 C°
T =
C+25 C°
T =
C- °55 C
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE
Figure 32. Figure 33.
LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE
Figure 34. Figure 35.
GAIN PEAKING vs C
LOADSTEP RESPONSE (G = +1, V
CM
= 0V)
(2)
Figure 36. Figure 37.
(2) See Application section, Unity-Gain Noninverting Configuration .
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
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0 300100 200 400 500
C (pF)
LOAD
30
25
20
15
10
5
0
-5
Peaking(%)
C =0pF
F
C =2.5pF
F
C =5pF
F
T =
C+85 C°
T =
C+25 C°
T =
C- °55 C
T =+125 C°
C
10k 100k 1M 10M
Frequency(Hz)
10
8
6
4
2
0
-2
-4
-6
Gain(dB)
R =10k ,CW
F F =50pF
R =0W
F
C =100pF
L
C =
L50pF
C =2
L00pF
T =+25 C°
A
Time(1 s/div)m
20
15
10
5
0
-5
-10
-15
-20
V (V)
IN
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
VoltageatV andV (V)
1 2
VIN
V (Noninverting)
2
V (Inverting)
1
10k 100k 1M 10M
Frequency(Hz)
10
8
6
4
2
0
-2
-4
-6
Gain(dB)
C =0pF
F
C =2.5pF
F
C =5pF
F
T =+25 C°
A
C =50pF
L
C =500pF
L
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
GAIN PEAKING vs C
LOAD(G = +2, R
F
= 10k , V
CM
= 0V) GAIN OF +1 vs FREQUENCY
(3)
Figure 38. Figure 39.
SETTLING TIME, POSITIVE STEPGAIN OF +2 vs FREQUENCY
(4)
(20V Step, Gain = 1, R
F
= 10k )
(5) (6)
Figure 40. Figure 41.
(3) See Application section Unity-Gain Noninverting Configuration .(4) See Application section Unity-Gain Noninverting Configuration .(5) See the Settling Time section.(6) The grid for voltage at V
1
and V
2
is scaled 20mV or 0.1% per division.
12 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
Time(1 s/div)m
20
15
10
5
0
-5
-10
-15
-20
V (V)
IN
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
VoltageatV andV (V)
1 2
VIN
V (Noninverting)
2
V (Inverting)
1
Time(1 s/div)m
OUT
StatusFlag
Enable
20V/div
50V/div
5V/div
Time(1 s/div)m
OUT
StatusFlag
Enable
20V/div
50V/div
5V/div
Time(1 s/div)m
OUT
StatusFlag
Enable
20V/div
50V/div
5V/div
0 3 41 2 5
V (V)
ENABLE
10
0
-10
-20
-30
I ( A)m
ENABLE
-40°C
+25 C°
+85 C°
-75 0-50 -25 25 75 100 125
Temperature( C)°
1.00
0.95
0.90
0.85
0.80
0.75
0.70
Threshold(V)
50
OPA454
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....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
SETTLING TIME, NEGATIVE STEP(20V Step, Gain = 1, R
F
= 10k )
(7) (8)
ENABLE RESPONSE TIME
Figure 42. Figure 43.
DISABLE RESPONSE TIME ENABLE RESPONSE
Figure 44. Figure 45.
I
ENABLE
vs V
ENABLE
ENABLE/DISABLE THRESHOLD vs TEMPERATURE
Figure 46. Figure 47.
(7) See the Settling Time section.(8) The grid for voltage at V
1
and V
2
is scaled 20mV or 0.1% per division.
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
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10 s/divm
60
50
40
30
20
10
0
-10
200
150
100
50
0
-50
-100
-150
V (V)
FLAG
I (mA)
OUT
VFLAG
IOUT
R =100kW
P
10 s/divm
60
50
40
30
20
10
0
-10
150
100
50
0
-50
-100
-150
-200
V (V)
FLAG
I (mA)
OUT
VFLAG
IOUT
R =100kW
P
10 s/divm
60
50
40
30
20
10
0
-10
150
100
50
0
-50
-100
-150
-200
V (V)
FLAG
I (mA)
OUT
VFLAG
IOUT
R =100kW
P
10 s/divm
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-0.2
V (V)
OUT
+125 C°
+85 C°
+25 C°
- °55 C
-50V
+50V
2Hz
2msPulse
Mercury
Wetted
Relay
0.988VPP
0.01Hz
+
-
OPA454
10 s/divm
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
V (V)
OUT
+125°C
+85°C
+25°C
- °55 C
-50V
+50V
2Hz
2msPulse
Mercury
Wetted
Relay
0.988VPP
0.01Hz
+
-
OPA454
10 s/divm
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
V(V)
OUT
+125°C
+85°C
+25°C
- °55 C
-50V
+50V
2Hz
2msPulse
Mercury
Wetted
Relay
0.988VPP
0.01Hz
+
-
OPA454
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
I
LIMIT
SHOWING FLAG DELAY I
LIMIT
SHOWING FLAG DELAY(T
P
= +125 ° C)
(9)
(T
P
= +25 ° C)
(10)
Figure 48. Figure 49.
I
LIMIT
SHOWING FLAG DELAY
APPLY LOAD(T
P
= 55 ° C)
(11)
(25mA Sink Response)
Figure 50. Figure 51.
REMOVE LOAD APPLY LOAD(25mA Sink Response) (25mA Source Response)
Figure 52. Figure 53.
(9) The OPA454 was connected to sufficient heatsinking to prevent thermal shutdown.(10) The OPA454 was connected to sufficient heatsinking to prevent thermal shutdown.(11) The OPA454 was connected to sufficient heatsinking to prevent thermal shutdown.
14 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
20ms/div
0
20V/div
Flag
VOUT
V+RL=1.8kW
V-
DelayinV isdueto-
testequipment.
Powersuppliesmaybe
appliedinanysequence.
10 s/divm
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-0.2
V(V)
OUT
+125 C°
+85 C°
+25 C°
- °55 C
-50V
+50V
2Hz
2msPulse
Mercury
Wetted
Relay
0.988VPP
0.01Hz
+
-
OPA454
20ms/div
0
20V/div
Flag
VOUT
V+ RL=1.8kW
V-
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS (continued)At T
P
= +25 ° C, V
S
= ± 50V, and R
L
= 4.8k connected to GND, unless otherwise noted.
REMOVE LOAD(25mA Source Response) POWER ON
Figure 54. Figure 55.
POWER OFF
Figure 56.
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): OPA454
APPLICATIONS INFORMATION
POWER SUPPLIES
INPUT PROTECTION
RL
R2
R1
OPA454
V-
V+
V+
VIN
G=1+ R2
R1
0.1 Fm
0.1 Fm
VOUT
Status
Flag
E/DCom
R(1)
P
IP
VOUT
E/D
V+
V-
V-
-IN
+IN
LOWERING OFFSET VOLTAGE AND DRIFT
R ,1st
2
39.1kW
R ,1st
1
10kW
OPA735
V+
1stStage,+5V
V-
1stStage, 5V-
R ,2nd
2
84.5kW
R ,2nd
1
10kW
OPA454
V+
2ndStage,+50V
V-
2ndStage, 50V-
A ,1stStage
1
A ,2ndStage
2
V 2ndStage
OUT
V 1stStage
OUT
RLOAD
10kW
LowOffset,5 V,Drift,m
0.05 V/ C,Self-ZeroingOpAmpm °
Gain1st=4.9V/V
High-VoltageOpAmp
Gain2nd=9.45V/V
V = 1V±
INPUT PP
V 1stStage 4.9V,Max
OUT ±
V 2ndStage 46V(92V ),Max
OUT PP
±
V = 1V
G±
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
Figure 57 shows the OPA454 connected as a basicnoninverting amplifier. The OPA454 can be used in The OPA454 may be operated from power suppliesvirtually any ± 5V to ± 50V op amp configuration. It is up to ± 50V or a total of 100V with excellentespecially useful for supply voltages greater than performance. Most behavior remains unchanged36V. throughout the full operating voltage range.Parameters that vary significantly with operatingPower-supply terminals should be bypassed with
voltage are shown in the Typical Characteristics .0.1 µF (or greater) capacitors, located near thepower-supply pins. Be sure that the capacitors are Some applications do not require equal positive andappropriately rated for the power-supply voltage negative output voltage swing. Power-supply voltagesused. do not need to be equal. The OPA454 can operatewith as little as 10V between the supplies and with upto 100V between the supplies. For example, thepositive supply could be set to 90V with the negativesupply at 10V, or vice-versa (as long as the total isless than or equal to 100V).
The OPA454 has increased protection againstdamage caused by excessive voltage between opamp input pins or input pin voltages that exceed thepower supplies; external series resistance is notneeded for protection. Internal series JFETs limitinput overload current to a non-destructive 4mA, evenwith an input differential voltage as large as 120V.Additionally, the OPA454 has dielectric isolationbetween devices and the substrate. Therefore, theamplifier is free from the limitations of junction(1) Pull-up resistor with at least 10 µA (choose
isolation common to many IC fabrication processes.R
P
= 1M with V+ = 50V for I
P
= 50 µA).
Figure 57. Basic Noninverting AmplifierConfiguration
The OPA454 can be used with an OPA735 zero-driftseries op amp to create a high-voltage op amp circuitthat has very low input offset temperature drift. Thiscircuit is shown in Figure 58 .
Figure 58. Two-Stage, High-Voltage Op Amp Circuit With Very Low Input Offset Temperature Drift
16 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
INCREASING OUTPUT CURRENT
R1R2
OPA454
OPA454
SLAVE
MASTER
VIN
R(1)
10W
S
R(1)
10W
S
RL
A1
A2
UNITY-GAIN NONINVERTING
R1R2
OPA454
PNP
TIP30C,MJL21193,
MJE15004,MJL1302A
NPN
TIP29C,MJL21194,
MJE15003,MJL3281
VIN
+50V
-50V
V(3)
O OUT L L
=V I R-
R(1)
20W
3
R
0.2W
5
R
0.2W
4
RL
CF
-IN
+IN
V+
V-
VOUT
(2)
IL
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
The OPA454 drives an output current of a fewmilliamps to greater than 50mA while maintaininggood op amp performance. See Figure 7 foropen-loop gain versus temperature at various outputcurrent levels.
In applications where the 25mA output current is notsufficient to drive the required load, the output currentcan be increased by connecting two or moreOPA454s in parallel, as Figure 59 shows. AmplifierA1 is the master amplifier and may be configured invirtually any op amp circuit. Amplifier A2, the slave, isconfigured as a unity-gain buffer. Alternatively,external output transistors can be used to boostoutput current. The circuit in Figure 60 is capable ofsupplying output currents up to 1A, with the
(1) R
S
resistors minimize the circulating current that always flowstransistors shown.
between the two devices because of V
OS
errors.
Figure 59. Parallel Amplifiers Increase OutputCurrent CapabilityCONFIGURATION
When in the noninverting unity-gain configuration, theOPA454 has more gain peaking with increasingpositive common-mode voltage and increasingtemperature. It has less gain peaking with morenegative common-mode voltage. As with all op amps,gain peaking increases with increasing capacitiveload. A resistor and small capacitor placed in thefeedback path can reduce gain peaking and increasestability.
(1) Provides current limit for OPA454 and allows the amplifier to drive the load when the output is between +0.7V and 0.7V.(2) Op amp V
OUT
swings from +47V to 48V.(3) V
O
swings from +44.1V to 45.1V at I
L
= 1A.
Figure 60. External Output Transistors Boost Output Current Greater Than 1A
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): OPA454
INPUT RANGE
0 6020 40 100
Time( s)m
-46.0
-46.5
-47.0
-47.5
-48.0
-48.5
-50.5
Voltage(V)
80
-49.0
V-
V
f=1kHz
IN
V
R =50k
OUT
SW
T =+25 C°
A
V
R =0
OUT
SW
-49.5
-50.0
0 6020 40 100
Time( s)m
50.5
50.0
49.5
49.0
48.5
48.0
47.0
Voltage(V)
80
47.5
V+
V
f=1kHz
IN V
R =50k
OUT
SW
T =+25 C°
A
V
R =0
OUT
SW
R
10kW
F
R
4.8kW
L
RSOPA454
V+=+50V
V = 50V- -
VIN
VOUT
OUTPUT RANGE
0 6020 40 100
Time( s)m
-46.0
-46.5
-47.0
-47.5
-48.0
-48.5
-50.5
Voltage(V)
80
-49.0
V-
V
f=1kHz
IN
V
R =50k
OUT
SW
T =+25 C°
A
V
R =0
OUT
SW
-49.5
-50.0
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
The OPA454 is specified to give linear operation withinput swing to within 2.5V of either supply. Generally,a gain of +1 is the most demanding configuration.Figure 61 and Figure 62 show output behavior as theinput swings to within 0V of the rail, using the circuitshown in Figure 64 .Figure 63 shows the behaviorwith an input signal that swings beyond the specifiedinput range to within 1V of the rail, also using thecircuit in Figure 64 . Notice that the beginning of thephase reversal effect may be reduced by insertingseries resistance (R
S
) in the connection to thepositive input. Note that V
OUT
does not swing all theway to the opposite rail.
Figure 63. Output Voltage With Input VoltageDown To (V ) + 1V
Figure 61. Output Voltage With Input Voltage Up
Figure 64. Input Range Test CircuitTo V+
The OPA454 is specified to swing to within 1V ofeither supply rail with a 49k load while maintainingexcellent linearity. Swing to the rail decreases withincreasing output current. The OPA454 can swing towithin 2V of the negative rail and 3V of the positiverail with a 1.88k load. The typical characteristiccurve, Output Voltage Swing vs Output Current(Figure 11 ), shows this behavior in detail.
Figure 62. Output Voltage With Input VoltageDown To V
18 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
OPEN-LOOP GAIN LINEARITY SETTLING TIME
-50 0-40 -30 -20 -10 10 30 40 50
OutputVoltage(V)
|(V )(V-)|
IN+ IN-
20
A isaFunctionofV andI
OL OUT LOAD
T =+25 C
P°
RL=1880W,1mV/div
89dB
106dB
74dB
RL=900W,2mV/div
R =4.87kW m
L,200 V/div
R7R8
R
10kW
5R
10kW
6
R3
R
10kW
4
R1
R
10kW
2
InvertingResponse
MeasuredHere,V1
CombinationofBoth
Invertingand
NoninvertingResponses,V2
VIN
-IN
+IN
VOUT
OPA454 OPA454
VOUT
-IN
+IN
A1A2
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Figure 65 shows the nonlinear relationship of A
OL
and The circuit in Figure 66 is used to measure theoutput voltage. As Figure 65 shows, open-loop gain is settling time response. The left half of the circuit is alower with positive output voltage levels compared to standard, false-summing junction test circuit used fornegative voltage levels. Specifications in the settling time and open-loop gain measurement. R
1Electrical Characteristics table are based upon the and R
2
provide the gain and allow for measurementaverage gain measured at both output extremes. without connecting a scope probe directly to thesumming junction, which can disturb proper op ampfunction by causing oscillation.
The right half of the circuit looks at the combination ofboth inverting and noninverting responses. R
5
and R
6remove the large step response. The remainingvoltage at V
2
shows the small-signal settling time thatis centered on zero. This test circuit can be used forincoming inspection, real-time measurement, or indesigning compensation circuits in systemapplications.
Table 2. Settling Time Measurement CircuitConfiguration Using Different Gain Settings forFigure 66
GAIN
COMPONENT 1 5 10Figure 65. Differential Input Voltage (+IN to IN)
R
1
() 10k 2k 1kversus Output Voltage
R
3
() 10k 2k 1kR
7
() 10k 4k 9kR
8
()1k 1kV
IN
(V
PP
) 20 16 8
Figure 66. Settling Time Test Measurement Circuit
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): OPA454
ENABLE AND E/D Com
THERMAL PROTECTION
OPA454
-IN
+IN
V-
V+
E/DCom
E/D
VOUT
DVDD
(DigitalSupply)
5VLogic
RP
V+
(PositiveOpAmpSupply)
V
(NegativeOpAmpSupply)
-
IP
CURRENT LIMIT
0 800200 400 1000
(ms)
40
20
0
-120
V(V)
OUT
-20
-40
-60
-80
-100
140
120
100
-20
V (V)
FLAG
80
60
40
20
0
600
VOUT
VFLAG
100kW10kW
E/DCom
-50V
+50V
VFLAG
Flag
VOUT
RP
1MW
625W
+2.5V
10HzSquareWave
VOUT
V+
-IN
+IN
V-
OPA454
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
avoided to maximize reliability. It is always best toprovide proper heat-sinking (either by a physical plateor by airflow) to remain considerably below theIf left disconnected, E/D Com is pulled near V
thermal shutdown threshold. For longest operational(negative supply) by an internal 10 µA current source.
life of the device, keep the junction temperatureWhen left floating, ENABLE is held approximately 2V
below +125 ° C.above E/D Com by an internal 1 µA source. Eventhough active operation of the OPA454 results whenthe ENABLE and E/D Com pins are not connected, amoderately fast, negative-going signal capacitively Figure 68 shows the thermal shutdown behavior of acoupled to the ENABLE pin can overpower the 1 µA socketed OPA454 that internally dissipates 1W.pull-up current and cause device shutdown. This Unsoldered and in a socket, θ
JA
of the DDA packagebehavior can appear as an oscillation and is is typically +128 ° C/W. With the socket at +25 ° C, theencountered first near extreme cold temperatures. If output stage temperature rises to the shutdownthe enable function is not used, a conservative temperature of +150 ° C, which triggers automaticapproach is to connect ENABLE through a 30pF thermal shutdown of the device. The device remainscapacitor to a low impedance source. Another in thermal shutdown (output is in a high-impedancealternative is the connection of an external current state) until it cools to +130 ° C where it again issource from V+ (positive supply) sufficient to hold the powered. This thermal protection hysteresis featureenable level above the shutdown threshold. Figure 67 typically prevents the amplifier from leaving the safeshows a circuit that connects ENABLE and E/D Com. operating area, even with a direct short from theChoosing R
P
to be 1M with a +50V positive power output to ground or either supply. The rail-to-railsupply voltage results in I
P
= 50 µA. supply voltage at which catastrophic breakdownoccurs is typically 135V at +25 ° C. However, theabsolute maximum specification is 120V, and theOPA454 should not be allowed to exceed 120V underany condition. Failure as a result of breakdown,caused by spiking currents into inductive loads(particularly with elevated supply voltage), is notprevented by the thermal protection architecture.
Figure 67. ENABLE and E/D Com
Figure 24 and Figure 48 to Figure 50 show thecurrent limit behavior of the OPA454. Current limitingis accomplished by internally limiting the drive to theoutput transistors. The output can supply the limitedcurrent continuously, unless the die temperature risesto +150 ° C, which initiates thermal shutdown. Withadequate heat-sinking, and use of the lowest possiblesupply voltage, the OPA454 can remain in currentlimit continuously without entering thermal shutdown.Although qualification studies have shown minimalparametric shifts induced by 1000 hours of thermalshutdown cycling, this mode of operation should be
Figure 68. Thermal Shutdown
20 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
POWER DISSIPATION HEATSINKING
T =T +P q
J A D JA
(1)
0 0.5 1.0 1.5 2.0 2.5 3.0
CopperArea(inches ),2oz
2
ThermalResistance, q °
JA ( C/W)
60
50
40
30
20
10
0
OPA454
R
100kW
1
ComplianceVoltageRange=+47V, 48V-
+50V
R
10kW
2
R3
100kW
R
9.9kW
4
-50V
R
100W
5
ILRL
I =[(V -V )/R ](R /R )
=(V V )/1k- W
L 5 2 1
2 1
2 1
V2
V1
-IN
+IN
V-
V+
VOUT
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Power dissipation depends on power supply, signal, Power dissipated in the OPA454 causes the junctionand load conditions. For dc signals, power dissipation temperature to rise. For reliable operation, junctionis equal to the product of the output current times the temperature should be limited to +125 ° C, maximum.voltage across the conducting output transistor, Maintaining a lower junction temperature alwaysP
D
= I
L
(V
S
V
O
). Power dissipation can be results in higher reliability. Some applications requireminimized by using the lowest possible power-supply a heatsink to assure that the maximum operatingvoltage necessary to assure the required output junction temperature is not exceeded. Junctionvoltage swing. temperature can be determined according toEquation 1 :For resistive loads, the maximum power dissipationoccurs at a dc output voltage of one-half thepower-supply voltage. Dissipation with ac signals is
Package thermal resistance, θ
JA
, is affected bylower because the root-mean square (RMS) value
mounting techniques and environments. Poor airdetermines heating. Application Bulletin SBOA022
circulation and use of sockets can significantlyexplains how to calculate or measure dissipation with
increase thermal resistance to the ambientunusual loads or signals. For constant current source
environment. Many op amps placed closely togethercircuits, maximum power dissipation occurs at the
also increase the surrounding temperature. Bestminimum output voltage, as Figure 69 shows.
thermal performance is achieved by soldering the opamp onto a circuit board with wide printed circuitThe OPA454 can supply output currents of 25mA and
traces to allow greater conduction through the oplarger. Supplying this amount of current presents no
amp leads. Increasing circuit board copper area toproblem for some op amps operating from ± 15V
approximately 0.5in
2
decreases thermal resistance;supplies. However, with high supply voltages, internal
however, minimal improvement occurs beyond 0.5in
2
,power dissipation of the op amp can be quite high.
as shown in Figure 70 .Operation from a single power supply (or unbalancedpower supplies) can produce even greater power
For additional information on determining heatsinkdissipation because a large voltage is impressed
requirements, consult Application Bulletin SBOA021across the conducting output transistor. Applications
(available for download at www.ti.com ).with high power dissipation may require a heatsink, orheat spreader.
Figure 70. Thermal Resistance versus CircuitBoard Copper Area
NOTE: R
1
= R
3
and R
2
= R
4
+ R
5
.
Figure 69. Precision Voltage-to-Current Converterwith Differential Inputs
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): OPA454
THERMALLY-ENHANCED PowerPAD
MoldCompound(Plastic)
LeadframeDiePad
ExposedatBaseofthePackage
(CopperAlloy)
Leadframe(CopperAlloy)
IC(Silicon) DieAttach(Epoxy)
a)SO-8PowerPADcross-sectionview.
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
plated-through holes (vias) provide a low thermalPACKAGE resistance heat flow path to the back side of the PCB.This architecture enhances the OPA454 powerThe OPA454 comes in an SO-8 PowerPAD version
dissipation capability significantly, eliminates the usethat provides an extremely low thermal resistance
of bulky heatsinks and slugs traditionally used in(θ
JC
) path between the die and the exterior of the
thermal packages, and allows the OPA454 to bepackage. This package features an exposed thermal
easily mounted using standard PCB assemblypad. This thermal pad has direct thermal contact with
techniques. NOTE: Because the SO-8 PowerPAD isthe die; thus, excellent thermal performance is
pin-compatible with standard SO-8 packages, theachieved by providing a good thermal path away from
OPA454 is a drop-in replacement for operationalthe thermal pad.
amplifiers in existing sockets. Soldering thePowerPAD to the PCB is always required, even withThe OPA454 SO-8 PowerPAD is a standard-size
applications that have low power dissipation.SO-8 package constructed using a downset
Soldering the device to the PCB provides theleadframe upon which the die is mounted, as
necessary thermal and mechanical connectionFigure 71 shows. This arrangement results in the
between the leadframe die pad and the PCB.lead frame being exposed as a thermal pad on theunderside of the package. The thermal pad on thebottom of the IC can then be soldered directly to thePCB, using the PCB as a heatsink. In addition,
Figure 71. Cross-Section View of a PowerPAD Package
22 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
PowerPAD LAYOUT GUIDELINES
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
area to be soldered; thus, wicking is not aproblem.The PowerPAD package allows for both assembly
6. Connect all holes to the internal power plane ofand thermal management in one manufacturing
the correct voltage potential (V ).operation. During the surface-mount solder operation(when the leads are being soldered), the thermal pad 7. When connecting these holes to the plane, do notmust be soldered to a copper area underneath the use the typical web or spoke via connectionpackage. Through the use of thermal paths within this methodology. Web connections have a highcopper area, heat can be conducted away from the thermal resistance connection that is useful forpackage into either a ground plane or other slowing the heat transfer during solderingheat-dissipating device. Soldering the PowerPAD to operations, making the soldering of vias that havethe PCB is always required, even with applications plane connections easier. In this application,that have low power dissipation. Follow these steps however, low thermal resistance is desired for theto attach the device to the PCB: most efficient heat transfer. Therefore, the holesunder the OPA454 PowerPAD package should1. The PowerPAD must be connected to the most
make the connections to the internal plane with anegative supply voltage on the device, V .
complete connection around the entire2. Prepare the PCB with a top-side etch pattern.
circumference of the plated-through hole.There should be etching for the leads as well as
8. The top-side solder mask should leave theetch for the thermal pad.
terminals of the package and the thermal pad3. Use of thermal vias improves heat dissipation,
area exposed. The bottom-side solder maskbut are not required. The thermal pad can
should cover the holes of the thermal pad area.connect to the PCB using an area equal to the
This masking prevents solder from being pulledpad size with no vias, but externally connected to
away from the thermal pad area during the reflowV .
process.4. Place recommended holes in the area of the
9. Apply solder paste to the exposed thermal padthermal pad. Recommended thermal land size
area and all of the IC terminals.and thermal via patterns for the SO-8 DDA
10. With these preparatory steps in place, thepackage are shown in the thermal land pattern
PowerPAD IC is simply placed in position and runmechanical drawing appended at the end of this
through the solder reflow operation as anydocument. These holes should be 13 mils
standard surface-mount component. This(.013in, or 0.3302mm) in diameter. Keep them
preparation results in a properly installed part.small, so that solder wicking through the holes isnot a problem during reflow. The minimum
For detailed information on the PowerPAD package,recommended number of holes for the SO-8
including thermal modeling considerations and repairPowerPAD package is five.
procedures, see technical brief SLMA002 PowerPAD5. Additional vias may be placed anywhere along Thermally-Enhanced Package, available for downloadthe thermal plane outside of the thermal pad at www.ti.com .area. These vias help dissipate the heatgenerated by the OPA454 IC. These additionalvias may be larger than the 13 mil diameter viasdirectly under the thermal pad. They can belarger because they are not in the thermal pad
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): OPA454
TYPICAL APPLICATIONS
OPA454
0-2mA
+95V
45.3kW
-5V
V =0Vto+91V
OUT
0.1 Fm
0.1 Fm
ProtectsDAC
DuringSlewing
DAC8811
or
DAC7811
-IN
+IN
V-
V+
RL
+50V
UpTo
195V
Piezo(1)
Crystal
-50V
MASTER
R
9kW
2
R
1kW
1
V
±4V
IN
OPA454
+50V
-50V
SLAVE
R
10kW
4
R
10kW
3
OPA454
-IN
+IN
-IN
+IN
VOUT VOUT
V+ V+
V-V-
A1A2
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
Figure 72 and Figure 73 illustrate the OPA454 in a programmable voltage source and a bridge circuit,respectively.
Figure 72. Programmable Voltage Source
(1) For transducers with large capacitance, stabilization may become an issue. Be certain that the Master amplifier is stable before stabilizingthe Slave amplifier.
Figure 73. Bridge Circuit Doubles Voltage for Exciting Piezo Crystals
24 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
R2
R1
VSIG
OPA454
V+
V-
R4R5
R2
OPA454
V-
V+ R6R7
OPA454
V+
V-
VOUT
VOUT 2 1 2 1
=(1+2R /R )(V V )-
V1
V2
VCM
A1
A2
A3
(1)
R2
R1
OPA454
V+
V-
R4R5
RSHUNT
R2
OPA454
V-
V+ R6R7
OPA454
V+
V-
VOUT
VSUPPLY
Plus
Minus
or Load
V =(1+2R /R
OUT 2 1 2 1
)(V V )-
V1
V2
A1
(1)
A2
(1)
A3
(2)
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Figure 74 uses three OPA454s to create ahigh-voltage instrumentation amplifier. V
CM
± V
SIGmust be between (V ) + 2.5V and (V+) 2.5V. Themaximum supply voltage equals ± 50V or 100V total.
Figure 75 uses three OPA454s to measure current ina high-side shunt application. V
SUPPLY
must begreater than V
CM
. V
CM
must be between (V ) + 2.5Vand (V+) 2.5V. Adhering to these restrictions keepsV
1
and V
2
within the voltage range required for linearoperation of the OPA454. For example, if V+ = 50Vand V = 50V, then V
1
= +47.5V (maximum) andV
2
= 47.5V (minimum). The maximum supplyvoltage equals ± 50V, or 100V total.
See Figure 76 and Figure 79 for example circuits thatuse the OPA454 in an output voltage boostconfigurations in three and six op amp output stages,respectively.
(1) The linear input range is limited by the output swing on theinput amplifiers, A
1
and A
2
.
Figure 74. High-Voltage Instrumentation Amplifier
(1) To increase the linear input voltage range, configure A
1
and A
2
as unity-gain followers.(2) The linear input range is limited by the output swing on the input amplifiers, A
1
and A
2
.
Figure 75. High-Voltage Instrumentation Amplifier for Measuring High-Side Shunt
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): OPA454
10kW
OPA454
+100V
+100V
10kW
OPA454
190kW
V+
V-
10kW
OPA454
-100V
-100V
100kW
RLOAD
3.75kW
100kW
100kW
100kW
a)Noninverting,G=+20V/V
10kW
OPA454
+100V
+100V
10kW
OPA454
200kW
V+
V-
10kW
OPA454
-100V
-100V
100kW
R
3.75k
LOAD
W
100kW
100kW
100kW
b)Inverting,G= 20V/V-
VOUT
V+
V-
V =+97V, 98V
(195V )
-
LOAD
PP
V =+97V, 98V
(195V )
-
LOAD
PP
V+
V-
VOUT
V01
V02
V04
V05
V+
V-
V+
V-
A1
A2
A3
A4
A5
A6
VIN
VIN
Time(10 s/div)m
100
80
60
0
-20
-40
-100
V(V)
OUT
6
4
2
0
-2
-4
-6
V (V)
IN
VIN
VOUT
40
20
-60
-80
Time(20 s/div)m
0
Voltage(V)
V01
V02
VLOAD
100
-100
75
25
50
-75
-25
-50
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
Figure 76. Output Voltage Boost With +97V, 98V (195V
PP
) Across Load Connected to Ground (3 Op AmpOutput Stage, see Figure 77 and Figure 78 )
Figure 78. 3.75k Load to GroundFigure 77. 195V
PP
On 3.75k Load to Ground
G = +20, 3 OPA454s, 100V Supplies20kHz, Uses 3 OPA454s, 100V Supplies
(Note SR of 18V/ µs, which is slightly higher thanthe specified 13V/ µs due to tracking of thepower-supply voltage)
26 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
RLOAD
7.5kW
10kW
OPA454
A1
+120V
+100V
10kW
OPA454
A2
190kW10kW
OPA454 A3
-100V
-100V
10kW
OPA454 A4
+120V
10kW
OPA454 A5
200kW10kW
OPA454
A6
-100V
100kW
100kW
100kW
100kW
-100V
100kW
100kW
+100V
100kW
100kW
(+97V, 98V)-( +97V)-98V,
VIN
VLOAD
PP
( 195V,390V )±
V+
V+
V+
V-
V-
V-V-
V+
V-
V-
V+
V+
Time(10 s/div)m
200
150
100
50
0
-50
-100
-150
-200
V(V)
OUT
6
4
2
0
-2
-4
-6
V (V)
IN
VIN VOUT
Time(20 s/div)m
0
V (V)
OUT
VLOAD
200
-200
150
100
50
-50
-100
-150
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Figure 79. Output Voltage Boost With ± 195V (390V
PP
) Across Bridge-Tied Load (6 Op Amps, seeFigure 80 and Figure 81 )
Figure 81. 7.5k LoadFigure 80. 390V
PP
Across 7.5k Load
G = +20, 6 OPA454s, 100V Supplies20kHz, Uses 6 OPA454s, 100V Supplies
(Note SR of 34V/ µs, which is significantly higherthan the specified 13V/ µs due to tracking of thepower-supply voltage)
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Link(s): OPA454
V =V -V
OUT 2 1
V1
V2
R
25kW
3R
25kW
4
R
25kW
2
R
25kW
1
OPA454
HIGH-COMPLIANCE VOLTAGE CURRENT
5ms/div
14
12
10
8
6
4
2
0
-2
V(1V/div)
OUT
V (V)
LED
0V
-2V
6V
VOUT
VLED
OPA454
V1
V2
Load IO
I =(V -
O 2 1
V )/R
R
OPA454
25kW25kW
25kW25kW
A1
A2
OPA454
SBOS391A DECEMBER 2007 REVISED DECEMBER 2008 .......................................................................................................................................
www.ti.com
A red light emitting diode (LED) was used to generateFigure 84 .
Gain of the avalanche photodiode (APD) is adjustedby changing the voltage across the APD. Gain startsto increase when reverse voltage is increased beyond130V for this APD diode. Figure 85 shows thisstructure.
Figure 82. High-Voltage Difference Amplifier
SOURCES
This section describes four different applicationsutilizing high compliance voltage current sources withdifferential inputs. Figure 69 and Figure 83 illustratethe different applications.
Figure 84. Avalanche Photodiode Circuit
Figure 83. Differential Input Voltage-to-Current
Converter for Low I
OUT
28 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA454
R
1kW
2R
100kW
4
OPA454
+
R
1kW
3
OPA454
OPA454
+100V
OPA454 +100V
APD
R5
100kW
LM4041D
Adjustedfor2.0V
R9
4.9kW
R8
198kW
RSENSE
100W
V1
100W
R10
3.1kW
VOUT
V =100 R´
OUT SENSE D
I´
R
10kW
7R
90kW
1
GainAdjustVoltage
2.5Vto9.5V
-200V
AdvancedPhotonix,Inc.
SD036-70-62-531
Digi-Key
SD036-70-62-531
VLED
LED
V+
V-
A1
+100V
V+
V-
A2
+100V
V+
V-
A3
+100V
V+
V-
A4
ExampleCircuitForReverseBiasingAPD
(130Vto280V,max)
OPA454
www.ti.com
....................................................................................................................................... SBOS391A DECEMBER 2007 REVISED DECEMBER 2008
Figure 85. APD Gain Adjustment Using the OPA454, High-Voltage Op Amp
Copyright © 2007 2008, Texas Instruments Incorporated Submit Documentation Feedback 29
Product Folder Link(s): OPA454
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA454AIDDA ACTIVE SO
Power
PAD
DDA 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA454AIDDAG4 ACTIVE SO
Power
PAD
DDA 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA454AIDDAR ACTIVE SO
Power
PAD
DDA 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA454AIDDARG4 ACTIVE SO
Power
PAD
DDA 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 3-Dec-2008
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA454AIDDAR SO
Power
PAD
DDA 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA454AIDDAR SO PowerPAD DDA 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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