HN58C256A Series HN58C257A Series 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58C257A) REJ03C0148-0600Z Rev. 6.00 Oct. 26. 2006 Description Renesas Technology's HN58C256A and HN58C257A are electrically erasable and programmable ROMs organized as 32768-word x 8-bit. They have realized high speed low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster. Features * Single 5 V supply: 5 V 10% * Access time: 85 ns/100 ns (max) * Power dissipation Active: 20 mW/MHz, (typ) Standby: 110 W (max) * On-chip latches: address, data, CE, OE, WE * Automatic byte write: 10 ms max * Automatic page write (64 bytes): 10 ms max * Ready/Busy (only the HN58C257A series) * Data polling and Toggle bit * Data protection circuit on power on/off * Conforms to JEDEC byte-wide standard * Reliable CMOS with MNOS cell technology * 105 erase/write cycles (in page mode) * 10 years data retention * Software data protection * Write protection by RES pin (only the HN58C257A series) * Industrial versions (Temperatur range: -20 to 85C and - 40 to 85C) are also available. * There are also lead free products. Rev.6.00, Oct. 26.2006, page 1 of 24 HN58C256A Series, HN58C257A Series Ordering Information Type No. Access time Package HN58C256AP-85 HN58C256AP-10 85 ns 100 ns 600 mil 28-pin plastic DIP PRDP0028AB-A (DP-28) HN58C256AFP-85 HN58C256AFP-10 85 ns 100 ns 400 mil 28-pin plastic SOP PRSP0028DC-A (FP-28D) HN58C256AT-85 HN58C256AT-10 85 ns 100 ns 28-pin plastic TSOP PTSA0028ZB-A (TFP-28DB) HN58C257AT-85 HN58C257AT-10 85 ns 100 ns 32-pin plastic TSOP PTSA0032KD-A (TFP-32DA) HN58C256AP-85E HN58C256AP-10E 85 ns 100 ns 600 mil 28-pin plastic DIP PRDP0028AB-A (DP-28V) Lead free HN58C256AFP-85E HN58C256AFP-10E 85 ns 100 ns 400 mil 28-pin plastic SOP PRSP0028DC-A (FP-28DV) Lead free HN58C256AT-85E HN58C256AT-10E 85 ns 100 ns 28-pin plastic TSOP PTSA0028ZB-A (TFP-28DBV) Lead free HN58C257AT-85E HN58C257AT-10E 85 ns 100 ns 32-pin plastic TSOP PTSA0032KD-A (TFP-32DAV) Lead free Rev.6.00, Oct. 26.2006, page 2 of 24 HN58C256A Series, HN58C257A Series Pin Arrangement HN58C256AP/AFP Series A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (Top view) HN58C256AT Series VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 15 16 17 18 19 20 21 22 23 24 25 26 27 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A3 A4 A5 A6 A7 A12 A14 RDY/Busy VCC RES WE A13 A8 A9 A11 OE (Top view) HN58C257AT Series A2 A1 A0 NC I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 NC CE A10 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 (Top view) Rev.6.00, Oct. 26.2006, page 3 of 24 HN58C256A Series, HN58C257A Series Pin Description Pin name Function A0 to A14 Address input I/O0 to I/O7 Data input/output OE Output enable CE Chip enable WE Write enable VCC Power supply VSS Ground 1 RDY/Busy* Ready busy RES* Reset 1 NC Note: No connection 1. This function is supported by only the HN58C257A series. Block Diagram Note: 1. This function is supported by only the HN58C257A series. I/O0 VCC to I/O7 High voltage generator VSS RES *1 I/O buffer and input latch OE CE Control logic and timing WE RES *1 A0 Y decoder to Y gating A5 Address buffer and latch X decoder Memory array A6 to A14 Data latch Rev.6.00, Oct. 26.2006, page 4 of 24 RDY/Busy *1 HN58C256A Series, HN58C257A Series Operation Table Operation CE OE WE RES*3 1 RDY/Busy*3 I/O Read VIL VIL VIH VH* High-Z Dout Standby VIH x*2 x x High-Z High-Z Write VIL VIH VIL VH High-Z to VOL Din Deselect VIL VIH VIH VH High-Z High-Z Write inhibit x x VIH x x VIL x x Data polling VIL VIL VIH VH VOL Dout (I/O7) Program reset x x x VIL High-Z High-Z Notes: 1. Refer to the recommended DC operating condition. 2. x : Don't care 3. This function is supported by only the HN58C257A series. Absolute Maximum Ratings Parameter Symbol Value Unit Power supply voltage rerative to VSS VCC -0.6 to +7.0 Input voltage rerative to VSS Vin -0.5* to +7.0* V Operationg temperature range*2 Topr 0 to +70 C Storage temperature range Tstg -55 to +125 C 1 V 3 Notes: 1. Vin min = -3.0 V for pulse width 50 ns 2. Including electrical characteristics and data retention 3. Should not exceed VCC + 1 V. Recommended DC Operating Conditions Parameter Symbol Min Typ Max Unit Supply voltage VCC 4.5 5.0 5.5 V VSS 0 0 0 V V Input voltage Operating temperature VIL -0.3* 0.8 VIH 2.2 VCC + 0.3*2 V VH*3 VCC -0.5 VCC + 1.0 V Topr 0 +70 C 1 Notes: 1. VIL min: -1.0 V for pulse width 50 ns. 2. VIH max: VCC + 1.0 V for pulse width 50 ns. 3. This function is supported by only the HN58C257A series. Rev.6.00, Oct. 26.2006, page 5 of 24 HN58C256A Series, HN58C257A Series DC Characteristics (Ta = 0 to +70C, VCC = 5.0 V 10%) Parameter Symbol Min Typ Input leakage current ILI 2* Output leakage current ILO Standby VCC current Operating VCC current Max Unit Test conditions A VCC = 5.5 V, Vin = 5.5 V 2 A VCC = 5.5 V, Vout = 5.5/0.4 V 1 ICC1 20 A CE = VCC ICC2 1 mA CE = VIH ICC3 12 mA Iout = 0 mA, Duty = 100%, Cycle = 1 s, VCC = 5.5 V 30 mA Iout = 0 mA, Duty = 100%, Cycle = 85 ns, VCC = 5.5 V Output low voltage VOL 0.4 V IOL = 2.1 mA Output high voltage VOH 2.4 V IOH = -400 A Note: 1. ILI on RES = 100 A max (only the HN58C257A series) Capacitance (Ta = +25C, f = 1 MHz) Parameter 1 Input capacitance* 1 Output capacitance* Note: Symbol Min Typ Max Unit Test conditions Cin 6 pF Vin = 0 V Cout 12 pF Vout = 0 V 1. This parameter is periodically sampled and not 100% tested. Rev.6.00, Oct. 26.2006, page 6 of 24 HN58C256A Series, HN58C257A Series AC Characteristics (Ta = 0 to +70C, VCC = 5 V10%) Test Conditions * * * * * Input pulse levels: 0.4 V to 3.0 V, 0 V to VCC (RES pin*2) Input rise and fall time: 5 ns Input timing reference levels: 0.8, 2.0 V Output load: 1TTL Gate +100 pF Output reference levels: 1.5 V, 1.5 V Read Cycle HN58C256A/HN58C257A -85 Parameter Symbol Min Address to output delay tACC CE to output delay -10 Max Min Max Unit Test conditions 85 100 ns CE = OE = VIL, WE = VIH tCE 85 100 ns OE = VIL, WE = VIH OE to output delay tOE 10 40 10 50 ns CE = VIL, WE = VIH Address to output hold tOH 0 0 ns CE = OE = VIL, WE = VIH OE (CE) high to output float*1 tDF 0 40 0 40 ns CE = VIL, WE = VIH RES low to output float* tDFR 0 350 0 350 ns CE = OE = VIL, WE = VIH RES to output delay*2 tRR 0 450 0 450 ns CE = OE = VIL, WE = VIH 1, 2 Rev.6.00, Oct. 26.2006, page 7 of 24 HN58C256A Series, HN58C257A Series Write Cycle Min*3 Typ Max Unit tAS 0 ns tAH 50 ns CE to write setup time (WE controlled) tCS 0 ns CE hold time (WE controlled) tCH 0 ns WE to write setup time (CE controlled) tWS 0 ns WE hold time (CE controlled) tWH 0 ns OE to write setup time tOES 0 ns OE hold time tOEH 0 ns Data setup time tDS 50 ns Data hold time tDH 0 ns WE pulse width (WE controlled) tWP 100 ns CE pulse width (CE controlled) tCW 100 ns Data latch time tDL 50 ns Byte load cycle tBLC 0.2 30 s Byte load window tBL 100 -- tWC Time to device busy tDB 120 ns Write start time tDW 0*5 ns tRP 100 s tRES 1 s Parameter Symbol Address setup time Address hold time Write cycle time Reset protect time*2 Reset high time* 2, 6 10* Test conditions s 4 ms Notes: 1. tDF and tDFR are defined as the time at which the outputs achieve the open circuit conditions and are no longer driven. 2. This function is supported by only the HN58C257A series. 3. Use this device in longer cycle than this value. 4. tWC must be longer than this value unless polling techniques or RDY/Busy (only the HN58C257A series) are used. This device automatically completes the internal write operation within this value. 5. Next read or write operation can be initiated after tDW if polling techniques or RDY/Busy (only the HN58C257A series) are used. 6. This parameter is sampled and not 100% tested. 7. A6 through A14 are page address and these addresses are latched at the first falling edge of WE. 8. A6 through A14 are page address and these addresses are latched at the first falling edge of CE. 9. See AC read characteristics. Rev.6.00, Oct. 26.2006, page 8 of 24 HN58C256A Series, HN58C257A Series Timing Waveforms Read Timing Waveform Address tACC CE tOH tCE OE tDF tOE WE High Data Out Data out valid tRR tDFR RES *2 Rev.6.00, Oct. 26.2006, page 9 of 24 HN58C256A Series, HN58C257A Series Byte Write Timing Waveform (1) (WE Controlled) tWC Address tCS tAH tCH CE tAS tBL tWP WE tOES tOEH OE tDS tDH Din tDW High-Z RDY/Busy *2 tRP tRES RES *2 VCC Rev.6.00, Oct. 26.2006, page 10 of 24 tDB High-Z HN58C256A Series, HN58C257A Series Byte Write Timing Waveform (2) (CE Controlled) Address tWS tAH tBL tWC tCW CE tAS tWH WE tOES tOEH OE tDS tDH Din tDW RDY/Busy *2 tDB High-Z tRP tRES RES *2 VCC Rev.6.00, Oct. 26.2006, page 11 of 24 High-Z HN58C256A Series, HN58C257A Series Page Write Timing Waveform (1) (WE Controlled) *7 Address A0 to A14 tAS tAH tBL tWP WE tDL tCS tBLC tWC tCH CE tOEH tOES OE tDH tDS Din RDY/Busy *2 High-Z tDB tRP RES *2 tRES VCC Rev.6.00, Oct. 26.2006, page 12 of 24 tDW High-Z HN58C256A Series, HN58C257A Series Page Write Timing Waveform (2) (CE Controlled) *8 Address A0 to A14 tAS CE tAH tBL tCW tDL tWS tBLC tWC tWH WE tOEH tOES OE tDH tDS Din RDY/Busy *2 High-Z tDB tRP RES *2 tRES VCC Rev.6.00, Oct. 26.2006, page 13 of 24 tDW High-Z HN58C256A Series, HN58C257A Series Data Polling Timing Waveform Address An An An CE WE tOEH tCE *9 tOES OE tDW tOE*9 I/O7 Din X Rev.6.00, Oct. 26.2006, page 14 of 24 Dout X Dout X tWC HN58C256A Series, HN58C257A Series Toggle bit This device provide another function to determine the internal programming cycle. If the EEPROM is set to read mode during the internal programming cycle, I/O6 will charge from "1" to "0" (toggling) for each read. When the internal programming cycle is finished, toggling of I/O6 will stop and the device can be accessible for next read or program. Toggle bit Waveform Notes: 1. 2. 3. 4. I/O6 beginning state is "1". I/O6 ending state will vary. See AC read characteristics. Any address location can be used, but the address must be fixed. Next mode *4 Address tCE *3 CE WE *3 tOE OE tOEH tOES *1 I/O6 Din Dout Dout tWC Rev.6.00, Oct. 26.2006, page 15 of 24 *2 *2 Dout Dout tDW HN58C256A Series, HN58C257A Series Software Data Protection Timing Waveform (1) (in protection mode) VCC CE WE tBLC Address Data 5555 AA 2AAA 55 5555 A0 tWC Write address Write data Software Data Protection Timing Waveform (2) (in non-protection mode) VCC tWC CE WE Address Data 5555 2AAA 5555 5555 2AAA 5555 AA 55 80 AA 55 20 Rev.6.00, Oct. 26.2006, page 16 of 24 Normal active mode HN58C256A Series, HN58C257A Series Functional Description Automatic Page Write Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle. Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. Each additional byte load cycle must be started within 30 s from the preceding falling edge of WE or CE. When CE or WE is high for 100 s after data input, the EEPROM enters write mode automatically and the input data are written into the EEPROM. Data Polling Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the EEPROM is performing a write operation. RDY/Busy Signal (only the HN58C257A series) RDY/Busy signal also allows status of the EEPROM to be determined. The RDY/Busy signal has high impedance except in write cycle and is lowered to VOL after the first write signal. At the end of a write cycle, the RDY/Busy signal changes state to high impedance. RES Signal (only the HN58C257A series) When RES is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by keeping RES low when VCC is switched. RES should be high during read and programming because it doesn't provide a latch function. VCC Read inhibit Read inhibit RES Program inhibit Program inhibit WE, CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. Rev.6.00, Oct. 26.2006, page 17 of 24 HN58C256A Series, HN58C257A Series Write/Erase Endurance and Data Retention Time The endurance is 105 cycles in case of the page programming and 104 cycles in case of the byte programming (1% cumulative failure rate). The data retention time is more than 10 years when a device is pageprogrammed less than 104 cycles. Data Protection To prevent this phenomenon, this device has a noise cancelation function that cuts noise if its width is 20 ns or less. 1. Data Protection against Noise on Control Pins (CE, OE, WE) during Operation During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. Be careful not to allow noise of a width of more than 20 ns on the control pins. WE CE VIH 0V VIH OE 0V 20 ns max Rev.6.00, Oct. 26.2006, page 18 of 24 HN58C256A Series, HN58C257A Series 2. Data Protection at VCC On/Off When VCC is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable state. Note: The EEPROM shoud be kept in unprogrammable state during VCC on/off by using CPU RESET signal. VCC CPU RESET * Unprogrammable * Unprogrammable 2.1 Protection by CE, OE, WE To realize the unprogrammable state, the input level of control pins must be held as shown in the table below. CE VCC x x OE x VSS x WE x x VCC x: Don't care. VCC: Pull-up to VCC level. VSS: Pull-down to VSS level. 2.2 Protection by RES (only the HN58C257A series) The unprogrammable state can be realized by that the CPU's reset signal inputs directly to the EEPROM's RES pin. RES should be kept VSS level during VCC on/off. The EEPROM breaks off programming operation when RES becomes low, programming operation doesn't finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data input. VCC RES Program inhibit WE or CE 1 s min 100 s min Rev.6.00, Oct. 26.2006, page 19 of 24 Program inhibit 10 ms min HN58C256A Series, HN58C257A Series 3. Software data protection To prevent unintentional programming, this device has the software data protection (SDP) mode. The SDP is enabled by inputting the following 3 bytes code and write data. SDP is not enabled if only the 3 bytes code is input. To program data in the SDP enable mode, 3 bytes code must be input before write data. Address Data 5555 AA 2AAA 55 5555 A0 Write address Write data } Normal data input The SDP mode is disabled by inputting the following 6 bytes code. Note that, if data is input in the SDP disable cycle, data can not be written. Address Data 5555 2AAA 5555 5555 2AAA 5555 AA 55 80 AA 55 20 The software data protection is not enabled at the shipment. Note: There are some differences between Renesas Technology's and other company's for enable/disable sequence of software data protection. If there are any questions , please contact with Renesas Technology's sales offices. Rev.6.00, Oct. 26.2006, page 20 of 24 HN58C256A Series, HN58C257A Series Package Dimensions HN58C256AP Series (PRDP0028AB-A / Previous Code: DP-28, DP-28V) JEITA Package Code P-DIP28-13.4x35.6-2.54 RENESAS Code PRDP0028AB-A Previous Code DP-28/DP-28V MASS[Typ.] 4.6g D 15 E 28 1 14 b3 A Reference Dimension in Millimeters Symbol Min L A1 Z e bp c e1 Rev.6.00, Oct. 26.2006, page 21 of 24 e1 D E A A1 bp b3 c e Z L Nom Max 15.24 35.6 36.5 13.4 14.6 5.70 0.51 0.38 0.48 0.58 1.2 0.20 0.25 0.36 0 15 2.29 2.54 2.79 1.9 2.54 HN58C256A Series, HN58C257A Series Package Dimensions (cont.) HN58C256AFP Series (PRSP0028DC-A / Previous Code: FP-28D, FP-28DV) JEITA Package Code P-SOP28-8.4x18.3-1.27 RENESAS Code PRSP0028DC-A Previous Code FP-28D MASS[Typ.] 0.7g D F 28 NOTE) 1. DIMENSION"*1" DOES NOT INCLUDE MOLD FLASH. 2. DIMENSION"*2"DOES NOT INCLUDE TRIM OFFSET. 15 bp c c1 HE *1 E b1 Index mark Terminal cross section 1 Reference Dimension in Millimeters Symbol 14 e *2 bp Min x M L1 A Z A1 y L Detail F Rev.6.00, Oct. 26.2006, page 22 of 24 D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Nom Max 18.3 18.8 8.4 0.10 0.20 0.30 2.50 0.32 0.40 0.48 0.38 0.12 0.17 0.22 0.15 0 8 11.5 11.8 12.1 1.27 0.20 0.15 1.12 0.8 1.0 1.2 1.7 HN58C256A Series, HN58C257A Series Package Dimensions (cont.) HN58C256AT Series (PTSA0028ZB-A / Previous Code: TFP-28DB, TFP-28DBV) JEITA Package Code P-TSOP(1)28-8x11.8-0.55 RENESAS Code PTSA0028ZB-A Previous Code TFP-28DB/TFP-28DBV MASS[Typ.] 0.23g y NOTE) 1. DIMENSION"*1"AND"*2(Nom)" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. HD A D 28 bp *3 1 bp x M *1 Index mark 15 Terminal cross section Z 14 c c1 e *2 E b1 Reference Symbol F L1 A1 L Detail F Rev.6.00, Oct. 26.2006, page 23 of 24 D E A2 A1 A bp b1 c c1 HD e x y Z L L1 Dimension in Millimeters Min Nom Max 11.80 8.00 8.20 0.05 0.13 0.14 0.22 0.20 0.17 0.15 0.12 0.20 1.20 0.30 0.22 0 5 13.10 13.40 13.70 0.55 0.10 0.10 0.45 0.40 0.50 0.60 0.80 HN58C256A Series, HN58C257A Series Package Dimensions (cont.) HN58C257AT Series (PTSA0032KD-A / Previous Code: TFP-32DA, TFP-32DAV) JEITA Package Code P-TSOP(1)32-8x12.4-0.50 RENESAS Code PTSA0032KD-A Previous Code TFP-32DA/TFP-32DAV MASS[Typ.] 0.26g y NOTE) 1. DIMENSION"*1"DOES NOT INCLUDE MOLD FLASH. 2. DIMENSION"*2"DOES NOT INCLUDE TRIM OFFSET. HD A M *1 D 32 *2 1 bp x Index mark bp 17 Terminal cross section Z 16 c c1 e E b1 Reference Symbol F L1 A1 L Detail F Rev.6.00, Oct. 26.2006, page 24 of 24 D E A2 A1 A bp b1 c c1 HD e x y Z L L1 Dimension in Millimeters Min Nom Max 12.40 8.00 8.20 0.08 0.13 0.14 0.18 1.20 0.30 0.22 0.20 0.12 0.17 0.22 0.125 0 5 13.80 14.00 14.20 0.50 0.08 0.10 0.45 0.40 0.50 0.60 0.80 Revision History Rev. Date HN58C256A/HN58C257A Series Data Sheet Contents of Modification Page Description 0.0 Jun. 19. 1995 Initial issue 1.0 May. 17. 1996 4 Change of format Absolute Maximun Ratings Addition of note 4 Recommended DC Operating Conditions VIH (min): 3.0 V to 2.2 V DC Characteristics VOH (min): VCC x 0.8 V to 2.4 V AC Characteristics Input pulse levels: 0 V to 3.0 V to 0.4 V to 3.0 V Data Polling Timing Waveform Addition of note 1 Toggle bit Waveform Addition of note 4 4 5 6 2.0 Feb. 27. 1997 4 16 Recommended DC Operating Conditions VIL (max): 0.6 V to 0.8 V Functional Description Data Protection 3: Addition of note 3.0 May. 20. 1997 16 Functional Description Data Protection 3: Change of Description 4.0 Oct. 24. 1997 8 Timing Waveforms Read Timing Waveform: Correct error 5.00 Nov. 17. 2003 2 6.00 Oct. 26, 2006 2 Change format issued by Renesas Technology Corp. Ordering Information Addition of HN58C256AFP-85E, HN58C256AFP-10E, HN58C256AT-85E, HN58C256AT-10E, HN58C257AT-85E, HN58C257AT-10E 20-23 Package Dimensions FP-28D to FP-28D, FP-28DV TFP-28DB to TFP-28DB, TFP-28DBV TFP-32DA to TFP-32DA, TFP-32DAV Ordering Information Addition of HN58C256AP-85E, HN58C256AP-10E Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. 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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": 8. 9. 10. 11. 12. Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anticrime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.