2.7 V, 800 μA, 80 MHz
Rail-to-Rail I/O Amplifiers
Data Sheet AD8031/AD8032
Rev. G Document Feedback
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FEATURES
Low power
Supply current 800 μA/amplifier
Fully specified at +2.7 V, +5 V, and ±5 V supplies
High speed and fast settling on 5 V
80 MHz, −3 dB bandwidth (G = +1)
30 V/μs slew rate
125 ns settling time to 0.1%
Rail-to-rail input and output
No phase reversal with input 0.5 V beyond supplies
Input CMVR extends beyond rails by 200 mV
Output swing to within 20 mV of either rail
Low distortion
−62 dB @ 1 MHz, VO = 2 V p-p
−86 dB @ 100 kHz, VO = 4.6 V p-p
Output current: 15 mA
High grade option: VOS (maximum) = 1.5 mV
APPLICATIONS
High speed, battery-operated systems
High component density systems
Portable test instruments
A/D buffers
Active filters
High speed, set-and-demand amplifiers
GENERAL DESCRIPTION
The AD8031 (single) and AD8032 (dual) single-supply, voltage
feedback amplifiers feature high speed performance with
80 MHz of small signal bandwidth, 30 V/μs slew rate, and 125 ns
settling time. This performance is possible while consuming less
than 4.0 mW of power from a single 5 V supply. These features
increase the operation time of high speed, battery-powered
systems without compromising dynamic performance.
The products have true single-supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V, +5 V,
and ±5 V supplies. The input voltage range can extend to 500 mV
beyond each rail. The output voltage swings to within 20 mV of
each rail providing the maximum output dynamic range.
The AD8031/AD8032 also offer excellent signal quality for only
800 μA of supply current per amplifier; THD is −62 dBc with a
2 V p-p, 1 MHz output signal, and –86 dBc for a 100 kHz,
4.6 V p-p signal on +5 V supply. The low distortion and fast
settling time make them ideal as buffers to single-supply ADCs.
CONNECTION DIAGRAMS
NC
1
–IN
2
+IN
3
–
V
S4
NC
8
+V
S
7
OUT
6
NC
5
NC = NO CONNECT
AD8031
+
–
01056-001
OUT1
1
–IN1
2
+IN1
3
–V
S4
+V
S
8
OUT2
7
–IN2
6
+IN2
5
AD8032
+–
+–
01056-002
Figure 1. 8-Lead PDIP (N) and
SOIC_N (R)
Figure 2. 8-Lead PDIP (N),
SOIC_N (R), and MSOP (RM)
V
OUT 1
+IN
3
–V
S2
+V
S
5
–IN
4
AD8031
+–
01056-003
Figure 3. 5-Lead SOT-23 (RJ-5)
Operating on supplies from +2.7 V to +12 V and dual supplies
up to ±6 V, the AD8031/AD8032 are ideal for a wide range of
applications, from battery-operated systems with large bandwidth
requirements to high speed systems where component density
requires lower power dissipation. The AD8031/AD8032 are
available in 8-lead PDIP and 8-lead SOIC_N packages and
operate over the industrial temperature range of −40°C to
+85°C. The AD8031A is also available in the space-saving
5-lead SOT-23 package, and the AD8032A is available in an
8-lead MSOP package.
2µs/DIV
1V/DIV
V
IN
=4.85Vp-p
01056-004
1V/DI
V
2µs/DIV
V
OUT
=4.65Vp-p
G=+1
01056-005
Figure 4. Input VIN Figure 5. Output VOUT
VIN
+5V
1kΩ1.7pF
+2.5V
VOUT
+
–
01056-006
Figure 6. Rail-to-Rail Performance at 100 kHz
AD8031/AD8032 Data Sheet
Rev. G | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Connection Diagrams ...................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
+2.7 V Supply ................................................................................ 3
+5 V Supply ................................................................................... 4
±5 V Supply ................................................................................... 5
Absolute Maximum Ratings ............................................................ 6
Maximum Power Dissipation ..................................................... 6
ESD Caution .................................................................................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 13
Input Stage Operation ................................................................ 13
Overdriving the Input Stage...................................................... 13
Output Stage, Open-Loop Gain and Distortion vs. Clearance
from Power Supply ..................................................................... 14
Output Overdrive Recovery ...................................................... 14
Driving Capacitive Loads .......................................................... 15
Applications ..................................................................................... 16
A 2 MHz Single-Supply, Biquad Band-Pass Filter ................. 16
High Performance, Single-Supply Line Driver........................... 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 20
REVISION HISTORY
3/14—Rev. F to Rev. G
Changes to Second Paragraph of Theory of Operation Section ... 13
Changes to Ordering Guide .......................................................... 20
8/13—Rev. E to Rev. F
Changed Input Current Noise at f = 100 kHz from 2.4 pA/√Hz
to 0.4 pA/√Hz (Throughout) .......................................................... 3
6/13—Rev. D to Rev. E
Changes to DC Performance Parameter, Table 1 ......................... 3
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
11/08—Rev. C to Rev. D
Change to Table 3 Column Heading .............................................. 5
Change to Ordering Guide ............................................................ 20
7/06—Rev. B to Rev. C
Updated Format .................................................................. Universal
Updated Outline Dimensions ....................................................... 18
Change to Ordering Guide ............................................................ 20
9/99—Rev. A to Rev. B
Data Sheet AD8031/AD8032
Rev. G | Page 3 of 20
SPECIFICATIONS
+2.7 V SUPPLY
@ TA = 25°C, VS = 2.7 V, RL = 1 kΩ to 1.35 V, RF = 2.5 kΩ, unless otherwise noted.
Table 1.
AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
G = +1, V
O
< 0.4 V p-p
54
80
80
MHz
Slew Rate G = −1, VO = 2 V step 25 30 25 30 V/µs
Settling Time to 0.1% G = −1, VO = 2 V step, CL = 10 pF 125 125 ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
fC = 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 0.4 0.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB
DC PERFORMANCE
Input Offset Voltage
V
CM
= V
CC
/2; V
OUT
= 1.35 V
±1
±6
±0.5
±1.5
mV
TMIN to TMAX ±6 ±10 ±1.6 ±2.5 mV
Offset Drift VCM = VCC/2; VOUT = 1.35 V 10 10 µV/°C
Input Bias Current VCM = VCC/2; VOUT = 1.35 V 0.45 2 0.45 2 µA
TMIN to TMAX 2.2 2.2 µA
Input Offset Current 50 500 50 500 nA
Open-Loop Gain VCM = VCC/2; VOUT = 0.35 V to 2.35 V 76 80 76 80 dB
TMIN to TMAX 74 74 dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance 40 40 MΩ
Differential Input Resistance 280 280 kΩ
Input Capacitance 1.6 1.6 pF
Input Voltage Range −0.5 to
+3.2
−0.5 to
+3.2
V
Input Common-Mode Voltage Range −0.2 to
+2.9
−0.2 to
+2.9
V
Common-Mode Rejection Ratio VCM = 0 V to 2.7 V 46 64 46 64 dB
VCM = 0 V to 1.55 V 58 74 58 74 dB
Differential Input Voltage 3.4 3.4 V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low RL = 10 kΩ 0.05 0.02 0.05 0.02 V
Output Voltage Swing High 2.6 2.68 2.6 2.68 V
Output Voltage Swing Low
R
L
= 1 kΩ
0.15
0.08
0.08
V
Output Voltage Swing High 2.55 2.6 2.55 2.6 V
Output Current 15 15 mA
Short Circuit Current Sourcing 21 21 mA
Sinking −34 −34 mA
Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF
POWER SUPPLY
Operating Range 2.7 12 2.7 12 V
Quiescent Current per Amplifier 750 1250 750 1250 μA
Power Supply Rejection Ratio
V
S
− = 0 V to −1 V or
VS+ = +2.7 V to +3.7 V
75
86
86
dB
AD8031/AD8032 Data Sheet
Rev. G | Page 4 of 20
+5 V SUPPLY
@ TA = 25°C, VS = 5 V, RL = 1 kΩ to 2.5 V, RF = 2.5 kΩ, unless otherwise noted.
Table 2.
AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, VO < 0.4 V p-p 54 80 54 80 MHz
Slew Rate G = −1, VO = 2 V step 27 32 27 32 V/µs
Settling Time to 0.1%
G = −1, V
O
= 2 V step, C
L
= 10 pF
125
125
ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
fC = 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 0.4 0.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Differential Gain RL = 1 kΩ 0.17 0.17 %
Differential Phase RL = 1 kΩ 0.11 0.11 Degrees
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB
DC PERFORMANCE
Input Offset Voltage
V
CM
= V
CC
/2; V
OUT
= 2.5 V
±1
±6
±0.5
±1.5
mV
TMIN to TMAX ±6 ±10 ±1.6 ±2.5 mV
Offset Drift VCM = VCC/2; VOUT = 2.5 V 5 5 µV/°C
Input Bias Current VCM = VCC/2; VOUT = 2.5 V 0.45 1.2 0.45 1.2 µA
TMIN to TMAX 2.0 2.0 µA
Input Offset Current 50 350 50 250 nA
Open-Loop Gain VCM = VCC/2; VOUT = 1.5 V to 3.5 V 76 82 76 82 dB
TMIN to TMAX 74 74 dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
40
40
MΩ
Differential Input Resistance 280 280 kΩ
Input Capacitance 1.6 1.6 pF
Input Voltage Range −0.5 to
+5.5
−0.5 to
+5.5
V
Input Common-Mode Voltage Range −0.2 to
+5.2
−0.2 to
+5.2
V
Common-Mode Rejection Ratio VCM = 0 V to 5 V 56 70 56 70 dB
VCM = 0 V to 3.8 V 66 80 66 80 dB
Differential Input Voltage 3.4 3.4 V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low RL = 10 kΩ 0.05 0.02 0.05 0.02 V
Output Voltage Swing High 4.95 4.98 4.95 4.98 V
Output Voltage Swing Low RL = 1 kΩ 0.2 0.1 0.2 0.1 V
Output Voltage Swing High 4.8 4.9 4.8 4.9 V
Output Current 15 15 mA
Short Circuit Current Sourcing 28 28 mA
Sinking −46 −46 mA
Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF
POWER SUPPLY
Operating Range 2.7 12 2.7 12 V
Quiescent Current per Amplifier
800
1400
800
1400
µA
Power Supply Rejection Ratio VS− = 0 V to −1 V or
VS+ = +5 V to +6 V
75 86 75 86 dB
Data Sheet AD8031/AD8032
Rev. G | Page 5 of 20
±5 V SUPPLY
@ TA = 25°C, VS = ±5 V, R L = 1 kΩ t o 0 V, RF = 2.5 kΩ, unless otherwise noted.
Table 3.
AD8031A/AD8032A AD8031B/AD8032B
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth G = +1, VO < 0.4 V p-p 54 80 54 80 MHz
Slew Rate G = −1, VO = 2 V step 30 35 30 35 V/µs
Settling Time to 0.1%
G = −1, V
O
= 2 V step, C
L
= 10 pF
125
125
ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion fC = 1 MHz, VO = 2 V p-p, G = +2 −62 −62 dBc
fC = 100 kHz, VO = 2 V p-p, G = +2 −86 −86 dBc
Input Voltage Noise f = 1 kHz 15 15 nV/√Hz
Input Current Noise f = 100 kHz 0.4 0.4 pA/√Hz
f = 1 kHz 5 5 pA/√Hz
Differential Gain RL = 1 kΩ 0.15 0.15 %
Differential Phase RL = 1 kΩ 0.15 0.15 Degrees
Crosstalk (AD8032 Only) f = 5 MHz −60 −60 dB
DC PERFORMANCE
Input Offset Voltage
V
CM
= 0 V; V
OUT
= 0 V
±1
±6
±0.5
±1.5
mV
TMIN to TMAX ±6 ±10 ±1.6 ±2.5 mV
Offset Drift VCM = 0 V; VOUT = 0 V 5 5 µV/°C
Input Bias Current VCM = 0 V; VOUT = 0 V 0.45 1.2 0.45 1.2 µA
TMIN to TMAX 2.0 2.0 µA
Input Offset Current 50 350 50 250 nA
Open-Loop Gain VCM = 0 V; VOUT = ±2 V 76 80 76 80 dB
TMIN to TMAX 74 74 dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
40
40
MΩ
Differential Input Resistance 280 280 kΩ
Input Capacitance 1.6 1.6 pF
Input Voltage Range −5.5 to
+5.5
−5.5 to
+5.5
V
Input Common-Mode Voltage Range −5.2 to
+5.2
−5.2 to
+5.2
V
Common-Mode Rejection Ratio VCM = −5 V to +5 V 60 80 60 80 dB
VCM = −5 V to +3.5 V 66 90 66 90 dB
Differential/Input Voltage 3.4 3.4 V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low RL = 10 kΩ −4.94 −4.98 −4.94 −4.98 V
Output Voltage Swing High +4.94 +4.98 +4.94 +4.98 V
Output Voltage Swing Low RL = 1 kΩ −4.7 −4.85 −4.7 −4.85 V
Output Voltage Swing High +4.7 +4.75 +4.7 +4.75 V
Output Current 15 15 mA
Short Circuit Current Sourcing 35 35 mA
Sinking −50 −50 mA
Capacitive Load Drive G = +2 (See Figure 46) 15 15 pF
POWER SUPPLY
Operating Range ±1.35 ±6 ±1.35 ±6 V
Quiescent Current per Amplifier
900
1600
900
1600
µA
Power Supply Rejection Ratio VS− = −5 V to −6 V or
VS+ = +5 V to +6 V
76 86 76 86 dB
AD8031/AD8032 Data Sheet
Rev. G | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage 12.6 V
Internal Power Dissipation1
8-Lead PDIP (N) 1.3 W
8-Lead SOIC_N (R) 0.8 W
8-Lead MSOP (RM) 0.6 W
5-Lead SOT-23 (RJ)
0.5 W
Input Voltage (Common Mode) ±VS ± 0.5 V
Differential Input Voltage ±3.4 V
Output Short-Circuit Duration Observe Power
Derating Curves
Storage Temperature Range (N, R, RM, RJ) −65°C to +125°C
Lead Temperature (Soldering 10 sec) 300°C
1 Specification is for the device in free air:
8-Lead PDIP: θJA = 90°C/W.
8-Lead SOIC_N: θJA = 155°C/W.
8-Lead MSOP: θJA = 200°C/W.
5-Lead SOT-23: θJA = 240°C/W.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8031/AD8032 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.
While the AD8031/AD8032 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 7.
2.0
1.5
0
MAXIMUM POWER DISSIPATIO N (W)
1.0
0.5 5- LEAD SOT - 23
T
J
= +150°C
8-L E AD P DIP
8-L E AD S OIC
AMBI E NT TE M P E RATURE ( °C)
8-LEAD MSOP
–50 –40 –30 –20 –10 010 20 30 40 50 60 70 80 90
01056-007
Figure 7. Maximum Power Dissipation vs. Temperature
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Data Sheet AD8031/AD8032
Rev. G | Page 7 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
90
80
0
NUMBER O F PART S IN BIN
40
30
20
10
60
50
70 N = 250
VOS (mV)
–5–4–3–2–1012345
01056-008
Figure 8. Typical VOS Distribution @ VS = 5 V
2.5
2.3
1.5
OFFSET VOLTAGE (mV)
2.1
1.9
1.7
VS=±5V
VS=+5V
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
01056-009
Figure 9. Input Offset Voltage vs. Temperature
–30
1.00
0.65
0.50
0.95
0.70
0.60
0.55
0.85
0.75
0.90
0.80
V
S
=5V
INPUT BIAS ( µ A)
TEMPERATURE (°C)
–40 –20–100 102030405060708090
01056-010
Figure 10. Input Bias Current vs. Temperature
COMMON-MODE VOLTAGE (V)
800
–800
INPUT BIAS CURRE NT ( nA)
600
400
200
0
–200
–400
–600
012345678910
V
S
=10V
V
S
=5V
V
S
=2.7V
01056-011
Figure 11. Input Bias Current vs. Common-Mode Voltage
OFFSET VOLTAGE (mV)
COMMON-MODE VOLTAGE (V)
0
–0.3
–0.6
–0.1
–0.2
–0.4
–0.5
V
S
=5V
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
01056-012
Figure 12. VOS vs. Common-Mode Voltage
1000
750
600
950
800
700
650
900
850
SUPPLY CURRENT/AMPLIF IER (µA)
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
±I
S
,V
S
=±5V
+I
S
,V
S
=+5V
+I
S
,V
S
= +2.7V
01056-013
Figure 13. Supply Current vs. Temperature
AD8031/AD8032 Data Sheet
Rev. G | Page 8 of 20
0
–0.5
–2.5
–1.0
–1.5
–2.0
V
CC
= 2.7V
V
CC
= 5V
V
CC
=10V
DIFFE RE NCE FRO M V
CC
(V)
100 1k 10k
R
LOAD
(Ω)
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
01056-014
Figure 14. +Output Saturation Voltage vs. RLOAD @ +85°C
0
–0.5
–2.5
–1.0
–1.5
–2.0
DIFFE RE NCE FRO M V
CC
(V)
100 1k 10k
R
LOAD
(Ω)
V
CC
= 2.7V
V
CC
= 5V
V
CC
=10V
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
01056-015
Figure 15. +Output Saturation Voltage vs. RLOAD @ +25°C
0
–0.5
–2.5
–1.0
–1.5
–2.0
DIFFE RE NCE FRO M V
CC
(V)
100 1k 10k
R
LOAD
(Ω)
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
V
CC
= 2.7V
V
CC
= 5V
V
CC
=10V
01056-016
Figure 16. +Output Saturation Voltage vs. RLOAD @ −40°C
1.2
1.0
0
10010k
1k
0.6
0.4
0.2
0.8
R
LOAD
(Ω)
DIFFE RE NCE FRO M V
EE
(V)
V
CC
=10V
V
CC
=5V
V
CC
=2.7V
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
01056-017
Figure 17. −Output Saturation Voltage vs. RLOAD @ +85°C
1.2
1.0
0
10010k1k
0.6
0.4
0.2
0.8
R
LOAD
(Ω)
DIFFE RE NCE FRO M V
EE
(V)
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
V
CC
=10V
V
CC
= 5V
V
CC
= 2.7V
01056-018
Figure 18. −Output Saturation Voltage vs. RLOAD @ +25°C
1.2
1.0
0
10010k1k
0.6
0.4
0.2
0.8
R
LOAD
(Ω)
DIFFE RE NCE FRO M V
EE
(V)
V
CC
V
EE
V
IN
V
CC
2
R
LOAD
V
OUT
V
CC
= 2.7V
V
CC
= 5V
V
CC
=10V
01056-019
Figure 19. −Output Saturation Voltage vs. RLOAD @ −40°C
Data Sheet AD8031/AD8032
Rev. G | Page 9 of 20
110
105
60
90
75
70
65
100
95
80
85
GAIN (d B)
0 2k 4k 6k 8k 10k
R
LOAD
(Ω)
V
S
= 5V
+A
OL
–A
OL
01056-020
Figure 20. Open-Loop Gain (AOL) vs. RLOAD
86
84
76
82
80
78
–40–30–20–10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
GAIN (d B)
VS= 5V
RL=1kΩ
–AOL
+AOL
01056-021
Figure 21. Open Loop Gain vs. (AOL) Temperature
110
80
50
100
90
70
60
AOL (dB)
VOUT (V)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VS= 5V
RLOAD =10kΩ
RLOAD =1kΩ
01056-022
Figure 22. Open-Loop Gain (AOL) vs. VOUT
10
0
–10
INPUT VOLTAGE (V)
INP UT BIAS CURRE NT (mA)
100
90
10
0%
VS= 5V
500mV
500mV 1V
–1.5 0.5 2.5 4.5 6.5
01056-023
Figure 23. Differential Input Overvoltage I-V Characteristics
0.05
DIFF GAIN (%)
–0.15
–0.05
–0.10
0
0.10
DIFF P HAS E ( Degrees)
–0.10
0
–0.05
0.05
1ST 2ND 3RD 4TH 5TH6TH 7TH 8TH 9TH 10TH 11TH
1ST 2ND 3RD 4TH 5TH 6TH 7TH8TH 9TH10TH11TH
01056-024
Figure 24. Differential Gain and Phase @ VS = ±5 V; RL = 1 kΩ
FREQUENCY (Hz)
100
30
0.3
10
3
1
100
10
1
0.1
10 100 1k 10k100k 1M 10M
INPUT VOLTAGE NOISE (nV/ Hz)
V
S
= 5V
CURRENT NOISE
VOLTAGE NOISE
INP UT CURRENT NOI S E ( pA/ Hz )
01056-025
Figure 25. Input Voltage Noise vs. Frequency
AD8031/AD8032 Data Sheet
Rev. G | Page 10 of 20
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
5
4
–5
3
2
1
0
–1
–2
–3
–4
0.1 1 10 100
V
S
=5V
G=+1
R
L
=1kΩ
01056-026
Figure 26. Unity Gain, −3 dB Bandwidth
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
–5
3
2
1
0
–1
–2
–3
–4
V
S
= 5V
V
IN
= –16dBm
0.1 1 10 100
+85°C
+25°C
–40°C
V
S
V
IN
50Ω
2kΩ
V
OUT
01056-027
Figure 27. Closed-Loop Gain vs. Temperature
1M
FREQUENCY (Hz)
CLOSED-LOOP GAIN (dB)
–8
2
1
0
–1
–4
–5
–6
–7
–2
–3
100k 10M 100M
G=+1
CL=5pF
RL=1kΩ
VS=+5V
RL+C
L
TO 2.5V
VS= +2.7V
RL+C
LTO 1.35V
VS=±5V
01056-028
Figure 28. Closed-Loop Gain vs. Supply Voltage
FREQUENCY (MHz)
PHASE (Degrees)
–20
30
20
10
0
–10
40
–90
–135
–180
–225
PHASE
GAIN
OPEN-LOOP GAIN (dB)
1001010.3
01056-029
Figure 29. Open-Loop Frequency Response
10M
FUNDAMENTAL FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION (dBc)
–80
–
20
–30
–40
–50
–60
–70
1k 10k 100k 1M
2V p-p
V
S
=2.7V
1.3V p-p
V
S
=2.7V
4.8V p-p
V
S
=5V
2
G=+1,R
L
=2kΩTO V
CC
2.5V p-p
V
S
=2.7V
01056-030
Figure 30. Total Harmonic Distortion vs. Frequency; G = +1
FUNDAMENTAL FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION (dBc)
–80
–
20
–30
–40
–50
–60
–70
–90
–100
1k 10k 100k 1M 10M
G=+2
V
S
=5V
R
L
=1kΩTO 2
V
CC
1V p-p
4V p-p
4.6V p-p
4.8V p-p
0
1056-031
Figure 31. Total Harmonic Distortion vs. Frequency; G +2
Data Sheet AD8031/AD8032
Rev. G | Page 11 of 20
FREQUENCY (Hz)
0
10
8
6
4
2
OUTPUT (V p-p)
1k 10k 100k 1M 10M
V
S
=±5V
V
S
=+5V
V
S
=+2.7V
0
1056-032
Figure 32. Large Signal Response
FREQUENCY (MHz)
100
50
10
1
0.1
RB
T
=50Ω
RB
T
=0Ω
R
OUT
(Ω)
0.1 1 10 100 200
RB
T
V
OUT
0
1056-033
Figure 33. ROUT vs. Frequency
FREQUENCY (Hz)
COMMON-MODE REJECTION RATIO (dB)
0
–40
–60
–80
–20
–100
V
S
=5V
100 1k 10k 100k 1M 10M
0
1056-034
Figure 34. CMRR vs. Frequency
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
0
–40
–60
–80
–100
–20
–120
V
S
=5V
100 1k 10k 100k 1M 10M 100M
0
1056-035
Figure 35. PSRR vs. Frequency
5.5
4.5
3.5
1.5
0.5
–0.5
1V/DIV
2.5
10µs/DIV
V
S
=5V
R
L
= 10kΩTO 2.5V
V
IN
=6Vp-p
G=+1
01056-036
Figure 36. Output Voltage
5.5
4.5
3.5
1.5
0.5
1V/DIV
2.5
INPUT
–0.5
V
S
=5V
G=+1
INPUT = 650mV
BEYOND RAILS
10µs/DIV
01056-037
Figure 37. Output Voltage Phase Reversal Behavior
AD8031/AD8032 Data Sheet
Rev. G | Page 12 of 20
500mV/DIV
10µs/DIV
0
R
L
TO
+2.5V
R
L
TO GND
V
S
= +5V
R
L
=1kΩ
G = –1
01056-038
Figure 38. Output Swing
50ns/DIV
3.1
2.9
2.7
2.3
2.1
1.9
200mV/DIV
2.5
G = +2
R
F
= R
G
= 2.5kΩ
R
L
=2kΩ
C
L
= 5pF
V
S
= 5V
01056-039
Figure 39. 1 V Step Response
2.85
2.35
1.85
0.85
0.35
1.35
500mV/DIV
V
S
= 2.7V
R
L
= 1kΩ
G = –1
10µs/DIV
R
L
TO GND
R
L
TO
1.35V
01056-040
Figure 40. Output Swing
50ns/DIV
2.56
2.54
2.52
2.48
2.46
2.44
2.50
20mV/DIV
G=+1
RF= 0Ω
RL=2kΩTO 2.5V
CL= 5pF TO 2.5V
VS= 5V
01056-041
Figure 41. 100 mV Step Response
FREQUENCY (MHz)
0
0
11.
0
CROSSTALK(dB)
1 10
–50
–60
–70
–100
200
–80
–90
V
S
=±2.5V
V
IN
=+10dBm
0.1 1 10100200
1kΩ
50Ω
V
IN
2.5kΩ
2.5kΩ2.5kΩ
50Ω
2.5kΩ
TRANSMITTER RECEIVER
V
OUT
01056-042
Figure 42. Crosstalk vs. Frequency
Data Sheet AD8031/AD8032
Rev. G | Page 13 of 20
THEORY OF OPERATION
The AD8031/AD8032 are single and dual versions of high
speed, low power, voltage feedback amplifiers featuring an
innovative architecture that maximizes the dynamic range
capability on the inputs and outputs. The linear input common-
mode range exceeds either supply voltage by 200 mV, and the
amplifiers show no phase reversal up to 500 mV beyond supply.
The output swings to within 20 mV of either supply when
driving a light load; 300 mV when driving up to 5 mA.
Fabricated on Analog Devices, Inc. eXtra Fast Complementary
Bipolar (XFCB) process, the amplifier provides an impressive
80 MHz bandwidth when used as a follower and a 30 V/µs slew
rate at only 800 µA supply current. Careful design allows the
amplifier to operate with a supply voltage as low as 2.7 V.
INPUT STAGE OPERATION
A simplified schematic of the input stage appears in Figure 43.
For common-mode voltages up to 1.1 V within the positive
supply (0 V to 3.9 V on a single 5 V supply), tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair, Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the input current of the amplifier changes
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance, which
determines the gain and bandwidth of the amplifier, in both
regions of operation.
Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the amplifier
to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage also changes to reflect the offset of the
input pair in control. The transition region is small, approximately
180 mV. These sudden changes in the dc parameters of the
input stage can produce glitches that adversely affect distortion.
OVERDRIVING THE INPUT STAGE
Sustained input differential voltages greater than 3.4 V should
be avoided as the input transistors can be damaged. Input clamp
diodes are recommended if the possibility of this condition
exists.
The voltages at the collectors of the input pairs are set to
200 mV from the power supply rails. This allows the amplifier
to remain in linear operation for input voltages up to 500 mV
beyond the supply voltages. Driving the input common-mode
voltage beyond that point will forward bias the collector junction of
the input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided because it is
easy to exceed the maximum allowed input differential voltage
when the amplifier is in phase reversal.
Q3 Q2
Q13 Q17
Q6
Q8
Q10
4
Q14
4
1
1Q7
Q15
1
Q11 4
1
4
Q16
Q18 Q4
VCC
VIN
VIP
Q5
Q9
VEE
OUTPUT STAGE,
COMMON-MODE
FEEDBACK
R4
2kΩ
R2
2kΩ
R1
2kΩI3
25µA
I4
25µA
R3
2kΩ
I1
5µA
I2
90µA
1.1V
R5
50kΩR6
850ΩR7
850ΩR8
850ΩR9
850Ω
01056-043
Figure 43. Simplified Schematic of AD8031 Input Stage
AD8031/AD8032 Data Sheet
Rev. G | Page 14 of 20
OUTPUT STAGE, OPEN-LOOP GAIN AND
DISTORTION vs. CLEARANCE FROM POWER
SUPPLY
The AD8031 features a rail-to-rail output stage. The output
transistors operate as common-emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier’s
open-loop gain.
DIFFERENTIAL
DRIVE
FROM
INPUT STAGE
Q37
Q47
Q21
Q20
Q51
Q27
Q68
Q44
Q42
Q48
Q49
Q50
Q43 VOUT
Q38
I1
25µA I2
25µA
C9
5pF
C5
1.5pF
I5
25µA
I4
25µA
R29
300Ω
++
01056-044
Figure 44. Output Stage Simplified Schematic
The output voltage limit depends on how much current the
output transistors are required to source or sink. For applications
with low drive requirements (for instance, a unity gain follower
driving another amplifier input), the AD8031 typically swings
within 20 mV of either voltage supply. As the required current
load increases, the saturation output voltage increases linearly as
ILOAD × RC
where:
ILOAD is the required load current.
RC is the output transistor collector resistance.
For the AD8031, the collector resistances for both output
transistors are typically 25 Ω. As the current load exceeds the
rated output current of 15 mA, the amount of base drive current
required to drive the output transistor into saturation reaches its
limit, and the amplifier’s output swing rapidly decreases.
The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and depends on the output voltage.
Open-loop gain stays constant to within 250 mV of the positive
power supply, 150 mV of the negative power supply, and then
decreases as the output transistors are driven further into
saturation.
The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically, the distortion
performance of the amplifier degrades as the output voltage
amplitude increases.
Used as a unity gain follower, the output of the AD8031/
AD8032 exhibits more distortion in the peak output voltage
region around VCC − 0.7 V. This unusual distortion characteristic is
caused by the input stage architecture and is discussed in detail
in the Input Stage Operation section,
OUTPUT OVERDRIVE RECOVERY
Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 45, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.
RL
50Ω
VIN VOUT
100ns1V
VS= ±2.5V
VIN= ±2.5V
RL=1kΩTO GND
RF= RG=2kΩRGRF
01056-045
Figure 45. Overdrive Recovery
Data Sheet AD8031/AD8032
Rev. G | Page 15 of 20
DRIVING CAPACITIVE LOADS
Capacitive loads interact with an op amp’s output impedance to
create an extra delay in the feedback path. This reduces circuit
stability and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.
The capacitive load drive of the AD8031/AD8032 can be
increased by adding a low valued resistor in series with the
capacitive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby diminishing its
influence. Figure 46 shows the effects of a series resistor on the
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger
capacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier is
dominated by the roll-off of the series resistor and capacitive load.
1000
10
100
CAPACITIVE LOAD (pF)
CLOSED-LOOP GAIN (V/V)
1012345
R
S
= 5Ω
R
S
= 0Ω
R
S
=20Ω
R
S
=20Ω
R
S
= 0Ω, 5Ω
V
S
= 5V
200mV STEP
WITH 30% O VERSHOOT
R
G
R
F
R
S
C
L
V
OUT
01056-046
Figure 46. Capacitive Load Drive vs. Closed-Loop Gain
AD8031/AD8032 Data Sheet
Rev. G | Page 16 of 20
APPLICATIONS
A 2 MHz SINGLE-SUPPLY, BIQUAD BAND-PASS
FILTER
Figure 47 shows a circuit for a single-supply, biquad band-pass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 kΩ resistors
connected between 5 V and ground. This bias point is also
decoupled to ground with a 0.1 µF capacitor. The frequency
response of the filter is shown in Figure 48.
To maintain an accurate center frequency, it is essential that the
op amp have sufficient loop gain at 2 MHz. This requires the
choice of an op amp with a significantly higher unity gain,
crossover frequency. The unity gain, crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of
the individual op amp circuits, it can be seen that each op amp
has a loop gain of at least 21 dB. This level is high enough to
ensure that the center frequency of the filter is not affected by
the op amp’s bandwidth. If, for example, an op amp with a gain
bandwidth product of 10 MHz was chosen in this application,
the resulting center frequency would shift by 20% to 1.6 MHz.
5V
0.1µF
0.1µF
1kΩ
1kΩ
AD8031
5V
VOUT
C2
50pF
C1
50pF
R6
1kΩ
R4
2kΩ
1/2
AD8032
1/2
AD8032
R5
2kΩ
R1
3kΩ
VIN
R2
2kΩ
R3
2kΩ
0.1µF
01056-047
Figure 47. A 2 MHz, Biquad Band-Pass Filter Using AD8031/AD8032
FREQUENCY(Hz)
GAIN (d B)
–50
0
–10
–30
–40
–20
10k100k1M10M100M
01056-048
Figure 48. Frequency Response of 2 MHz Band-Pass Filter
HIGH PERFORMANCE, SINGLE-SUPPLY LINE DRIVER
Even though the AD8031/AD8032 swing close to both rails, the
AD8031 has optimum distortion performance when the signal
has a common-mode level half way between the supplies and
when there is about 500 mV of headroom to each rail. If low
distortion is required in single-supply applications for signals
that swing close to ground, an emitter-follower circuit can be
used at the op amp output.
10µF
5V
7
3
2
2N3904
200Ω
6
2.49kΩ
49.9Ω
4AD8031
2.49kΩ49.9Ω
49.9Ω
0.1µF
V
IN
V
OUT
01056-049
Figure 49. Low Distortion Line Driver for Single-Supply, Ground Referenced Signals
Figure 49 shows the AD8031 configured as a single-supply, gain-
of-2 line driver. With the output driving a back-terminated
50 Ω line, the overall gain from VIN to VOUT is unity. In addition
to minimizing reflections, the 50 Ω back termination resistor
protects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, low distortion is attainable
even when the output signal swings to within 50 mV of ground.
The circuit was tested at 500 kHz and 2 MHz.
Data Sheet AD8031/AD8032
Rev. G | Page 17 of 20
Figure 50 and Figure 51 show the output signal swing and
frequency spectrum at 500 kHz. At this frequency, the output
signal (at VOUT), which has a peak-to-peak swing of 1.95 V
(50 mV to 2 V), has a THD of −68 dB (SFDR = −77 dB).
2V
50mV
10
0%
100
90
0.5V 1µs
01056-050
Figure 50. Output Signal Swing of Low Distortion Line Driver at 500 kHz
STOP 5MHz
VERTICAL SCALE (10dB/ DIV)
START 0Hz
+9dBm
01056-051
Figure 51. THD of Low Distortion Line Driver at 500 kHz
Figure 52 and Figure 53 show the output signal swing and
frequency spectrum at 2 MHz. As expected, there is some
degradation in signal quality at the higher frequency. When the
output signal has a peak-to-peak swing of 1.45 V (swinging
from 50 mV to 1.5 V), the THD is −55 dB (SFDR = −60 dB).
This circuit could also be used to drive the analog input of a
single-supply, high speed ADC whose input voltage range is
referenced to ground (for example, 0 V to 2 V or 0 V to 4 V). In
this case, a back termination resistor is not necessary (assuming
a short physical distance from transistor to ADC); therefore, the
emitter of the external transistor would be connected directly to
the ADC input. The available output voltage swing of the circuit
would therefore be doubled.
50mV
10
0%
100
90
1.5V
0.2V 200ns
01056-052
Figure 52. Output Signal Swing of Low Distortion Line Driver at 2 MHz
VERTICAL SCALE (10dB/ DIV)
+7dBm
START 0Hz STOP 20MHz
01056-053
Figure 53. THD of Low Distortion Line Driver at 2 MHz
AD8031/AD8032 Data Sheet
Rev. G | Page 18 of 20
OUTLINE DIMENSIONS
COM PLI ANT TO JEDEC STANDARDS MS-001
CONT ROLLING DIM E NS IONS ARE IN I NCHE S ; M IL L IMETER DI MENSIONS
(IN PARENT HE S ES) ARE ROUNDED-O FF INCH EQUIVALENT S FOR
REFERENCE ONLY AND ARE NOT AP PROPRIAT E FOR US E IN DESIGN.
CORNER LE ADS MAY BE CONFIG URED AS W HO L E O R HALF L EADS .
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 ( 3.81)
0.130 ( 3.30)
0.115 (2. 92)
0.070 ( 1.78)
0.060 ( 1.52)
0.045 ( 1.14)
8
14
5
0.280 ( 7.11)
0.250 ( 6.35)
0.240 ( 6.10)
0.100 (2.54)
BSC
0.400 ( 10 .16)
0.365 ( 9.27)
0.355 ( 9.02)
0.060 ( 1 .52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 ( 8.26)
0.310 ( 7.87)
0.300 ( 7.62)
0.195 ( 4.95)
0.130 ( 3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 54. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY ANDARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 55. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Data Sheet AD8031/AD8032
Rev. G | Page 19 of 20
COMPLIANT TO JEDEC STANDARDS MO-178-AA
10°
5°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
5
123
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0
.15 MAX
0
.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.35 MIN
0.55
0.45
0.35
11-01-2010-A
Figure 56. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
COM P LI ANT TO JE DE C STANDARDS MO-187- AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BS C
0.40
0.25
1.10 M AX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 57. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
AD8031/AD8032 Data Sheet
Rev. G | Page 20 of 20
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
Branding
AD8031ANZ –40°C to +85°C 8-Lead PDIP N-8
AD8031AR –40°C to +85°C 8-Lead SOIC_N R-8
AD8031ARZ –40°C to +85°C 8-Lead SOIC_N R-8
AD8031ARZ-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031ARZ-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8031ART-R2 –40°C to +85°C 5-Lead SOT-23 RJ-5 H0A
AD8031ART-REEL7 –40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H0A
AD8031ARTZ-R2 –40°C to +85°C 5-Lead SOT-23 RJ-5 H04
AD8031ARTZ-REEL –40°C to +85°C 5-Lead SOT-23, 13" Tape and Reel RJ-5 H04
AD8031ARTZ-REEL7 –40°C to +85°C 5-Lead SOT-23, 7" Tape and Reel RJ-5 H04
AD8031BNZ –40°C to +85°C 8-Lead PDIP N-8
AD8031BR –40°C to +85°C 8-Lead SOIC_N R-8
AD8031BRZ
–40°C to +85°C
8-Lead SOIC_N
R-8
AD8031BRZ-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8031BRZ-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8031AR-EBZ 8-Lead SOIC Evaluation Board
AD8031ART-EBZ 5-Lead SOT-23 Evaluation Board
AD8032ANZ –40°C to +85°C 8-Lead PDIP N-8
AD8032AR –40°C to +85°C 8-Lead SOIC_N R-8
AD8032AR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032ARZ –40°C to +85°C 8-Lead SOIC_N R-8
AD8032ARZ-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032ARZ-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032ARM –40°C to +85°C 8-Lead MSOP RM-8 H9A
AD8032ARM-REEL
–40°C to +85°C
8-Lead MSOP, 13" Tape and Reel
RM-8
H9A
AD8032ARM-REEL7 –40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 H9A
AD8032ARMZ –40°C to +85°C 8-Lead MSOP RM-8 H9A#
AD8032ARMZ-REEL –40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 H9A#
AD8032ARMZ-REEL7 –40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 H9A#
AD8032BNZ –40°C to +85°C 8-Lead PDIP N-8
AD8032BR –40°C to +85°C 8-Lead SOIC_N R-8
AD8032BR-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032BRZ –40°C to +85°C 8-Lead SOIC_N R-8
AD8032BRZ-REEL –40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8032BRZ-REEL7 –40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8032ACHIPS Die
AD8032AR-EBZ 8-Lead SOIC Evaluation Board
AD8032ARM-EBZ 8-Lead MSOP Evaluation Board
1 Z = RoHS Compliant Part, # denotes lead-free product may be top or bottom marked.
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D01056-0-3/14(G)
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AD8031AR-EBZ AD8031ART-EBZ AD8032AR-EBZ AD8032ARM-EBZ