DS1647/DS1647LPM DALLAS DS1647/DS1647LPM SEMICONDUCTOR Nonvolatile Timekeeping RAM FEATURES PIN ASSIGNMENT Integrated NV SRAM, real time clock, crystal, power AI8 i fail control circuit and lithium energy source na : Optional low profile socketable module ae z 7, Fits into a standard 68-pin PLCC surface AG mountable socket AS 255 mil package height A4 A3E Standard JEDEC Byte-wide 512K x 8 static RAM pin- az out A1 AOE @ Clock registers are accessed identical to the static Dao RAM. These registers are resident in the eight top Da1 & RAM locations. DO? & GND E Totally nonvolatile with over 10 years of operation in 512K XB the absence of power 32-PIN ENCAPSULATED PACKAGE Access times of 120 ns and 150 ns : NC 1 4 Al Quartz accuracy +1 minute a month @ 25C, factory AIS 2 33 My calibrated AIB 3 32 Ala PFO 4 31 AIS BCD coded year, month, date, day, hours, minutes, Yoo 2 oe Ai and seconds OE 7 28 Alo CE 8 27 AQ Power-fail write protection allows for +10% Vcc pow- Da? 9 26 Aa DaB 10 25 AT er supply tolerance Das 1 24 AB Daa 12 23 AS ORDERING INFORMATION Das a a a DS1647-XX (32-pin DIP Module) OE Ste os he Dao 16 19 Al -12 120 ns access GND 17 18 AO -15 150 ns access DS1647L-XX = (Low Profile Module} 34-PIN LOW PROFILE MODULE PIN DESCRIPTION -12 120 ns access -15 150 ns access AOQ-A18 Address Input CE Chip Enable OE Output Enable WE Write Enable Vee +5 Volts GND - Ground DQ@0-DQ@r- - Data Input/Output NC - No Connection PFO PowerFail Output (DS1647LPM only) Copynght 1995 by Dallas Semiconductor Corporaton 102996 1/11 All Rights Reserved For important information regarding atents and other intellectual property nghts please refer to allas Semiconductor data booksDS1647/DS1647LPM DESCRIPTION The DS1647LPM is a low profile module that fits into a standard 68-pin PLCC surface mountable socket andis functionally equivalent to the DS1647. The DS1647 isa 512K x 8 nonvolatile static RAM with a full function real time clock which are both accessible in a Bytewide for- mat. The nonvolatile time keeping RAM is pin and func- tion equivalent to any JEDEC standard 512K x 8SRAM. The device can also be easily substituted in ROM, EPROM and EEPROM scckets providing read/write nonvolatility and the addition of the real time clock func- tion. The real time clock information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date, day, hours, minutes, and seconds datain 24 hour BCD format. Corrections for the day of the month and leap year are made automatically. The RTC clock registers are double buffered to avoid access of incorrect data that can occur during clock update cycles. The double buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1647 also con- tainsits own power-fail circuitry which deselects the de- vice when the Vcc supply isin an out of tolerance condi- tion. This feature prevents loss of data from BLOCK DIAGRAM DS$1 647 Figure 1 _ | OSCILLATOR AND 32.768 KHz CI CLOCK COUNTDOWN | CHAIN unpredictable system operation brought on by low Ver as errant access and update cycles are avoided. CLOCK OPERATIONS-READING THE CLOCK While the double buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1647 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. Updating is halted when a one is written into the read bit, the seventh most significant bit in the control register. As long asa one remains in that position, updating is halted. Aftera halt is issued, the registers reflect the count, thatis day, date, and time that was current at the moment the halt command was issued. However, the internal clock reg- isters of the double buffered system continue to update so that the clock accuracy is not affected by the access of data. All of the DS1647 registers are updated simul- taneously after the clock status is reset. Updating is within a second after the read bit is written to zero. CLOCK REGISTERS PFO | POWER MONITOR, POWER GOOD 512K X 8NV SRAM + SWITCHING, AND Vear WRITE PROTECTION DQ0-DG7 CE __ WE CE =< a K __A0-A18 = 102996 2/11DS1647/081647LPM TRUTH TABLE DS 647 Table 4 Voc ce | oc | WE MODE Da POWER Vin Xx Xx DESELECT HIG&H-Z STANDBY Xx Xx x DESELECT HIGH-Z STANDBY 5VOLTS+10% | Vy. x Vib WRITE DATA IN ACTIVE Vi | ove | Vn READ DATA OUT ACTIVE vi | Vi | Vig READ HIGH-Z ACTIVE <4.5 VOLTS Xx Xx x DESELECT HIGH-Z CMOS STANDBY >VBAT <VBAT Xx Xx x DESELECT HIGH-Z DATA RETENTION MODE SETTING THE CLOCK running, the LSB of the seconds register will toggle at The eighth bit of the control register is the write bit. Set- ting the write bit to a one, like the read bit, halts updates to the DS1647 registers. The user can then load them with the correct day, date and time datain 24 hour BCD format. Resetting the write bit to a zero then transfers those values to the actual clock counters and allows normal operation to resume. STOPPING AND STARTING THE CLOCK OSCILLATOR The clock oscillator may be stopped at any time. To in- crease the shelf life, the oscillator can be turned off to minimize current drain from the battery. The OSC bit is the MSB for the seconds registers. Setting it to a one stops the oscillator. FREQUENCY TEST BIT Bit 6 of the day byte is the frequency test bit. When the frequency test bit is set to logic 1 and the oscillator is 512 Hz. When the seconds register is being read, the DQ line will toggle at the 512 Hz frequency as long as conditions for access remain valid {i.e., CE low, OE low, and address for seconds register remain valid and stable). CLOCK ACCURACY The DS1647 is guaranteed to keep time accuracy to within +1 minute per month at 25C. The clock is cali- brated at the factory by Dallas Semiconductor using special calibration nonvelatile tuning elements. The DS 1647 does net require additional calibration and tem- perature deviations will have a negligible effect in most applications. Forthis reason, methods of field clock cal- ibration are not available and not necessary. 102996 3/11DS1647/DS1647LPM DS1647 REGISTER MAP - BANK? Table 2 DATA ADDRESS FUNCTION By Bs Bs By Bg Bo By Bo 7FFFF - - - - - - - - YEAR 00-99 7FFFE X x - - - - - MONTH 01-12 7FFFD X - - - - - - DATE 01-31 7FFFG X FT x X Xx - - - DAY 01-07 7FFFB X X - - - - - - HOUR 00-23 7FFFA X - - - - - - - MINUTES 00-59 7FFF9 OSC - - - - - - - | SECONDS 00-59 7FFF8 W R - - - - - - | CONTROL A OSC = STOP BIT R = READ BIT FT = FREQUENCY TEST Wso= WRITE BIT X = UNUSED NOTE: Bits 0 through 5 of control register A are not dedicated to any particular function and can be used as normal RAM bits. RETRIEVING DATA FROM RAM OR CLOCK The DS1647 is in the read mode whenever WE (write enable) is high, GE (chip enable) is low. The device ar- chitecture allows ripple-through access to any of the address locations in the NV SRAM. Valid data will be available at the DQ pins within ta, after the lastaddress input is stable, providing that the CE and OE access times are satisfied. If CE or OE access times are not met, valid data will be available at the latter of chip en- able access (tce,) or at output enable access time (toca). The state of the data input/output pins (DQ) is controlled by GE and OE. If the outputs are activated before taa, the data lines are driven to an intermediate state until tag. If the address inputs are changed while CE and OE remain valid, output data will remain valid for outputdata hold time (toy) but will then goindeterminate until the next address access. WRITING DATA TO RAM OR CLOCK The DS1647 is in the write mode whenever WE and CE arein their active state. The startofa writeis referenced to the latter occurring high to low transition of WE and CE. The addresses must be held valid throughout the cycle. CE or WE must return inactive for a minimum of twr prior to the initiation of another read or write cycle. Data in must be valid tpg prior to the end of write and re- main valid for tpy afterward. Ina typical application, the OE signal will be high during a write cycle. However, OE can be active provided that care is taken with the data bus to avoid bus contention. If OE is low prior to WE transitioning low the data bus can become active with read data defined by the address inputs. Alow tran- sition on WE will then disable the outputs tywez after WE goes active. 102996 4/11DS1647/081647LPM DATA RETENTION MODE When Vec,is within nominal limits (Vee > 4.5 volts) the DS1647 can be accessed as described above with read or write cycles. However, when Vec is below the pow- erfail point Vpr (point at which write protection occurs) the internal clock registers and RAM is blocked from ac- cess. This is accomplished internally by inhibiting ac- cess via the CEsignal. At this time the powerfail output signal (PFO) will be driven active low and will remain active until Vee returns to nominal levels. When Vec falls below the level of the internal battery supply, power input is switched from the Ver pin to the internal battery and clock activity, RAM, and clock data are maintained from the battery until Vee is returned to nominal level. INTERNAL BATTERY LONGEVITY The D31647 has a self contained lithium power source thatis designed to provide energy for clock activity, and clock and RAM data retention when the Vcc supply is not present. The capability of this internal power supply is sufficient to power the DS1647 continuously for the life of the equipment in which itis installed. For specifi- cation purposes, the life expectancy is seven years at 25C with the internal clock oscillator running in the ab- sence of Vec power. The D81647 is shipped from Dal- las Semiconductor with the clock oscillator turned off, so the expected life should be considered to start fromm the time the clock oscillator is first turned on. Actual life ex- pectancy of the DS164? will be much longer than seven years since no internal lithium battery energy is con- sumed when Vec is present. In fact, in most applica- tions, the life expectancy of the DS1647 will be approxi- mately equal to the shelf life (expected useful life of the lithium battery with no load attached) of the lithium bat- tery which may prove to be as long as 20 years. 102996 5/11DS1647/DS1647LPM ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground 0.3V to +7.0V Operating Temperature 0C to +70C Storage Temperature -20C to +70C Soldering Temperature 260C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated inthe operation sections of this specification is notimplied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (OS to +70C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Supply Voltage Vec 4.5 5.0 5.5 Vv 1 Logic 1 Voltage All Inputs Vin 2.2 Veeot0.3 Vv Logic 0 Voltage All Inputs Vit 0.3 0.8 Vv DC ELECTRICAL CHARACTERISTICS (OC <tya <= +70C; Veg =5.0V + 10%) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Average Ver Power Supply lect 95 mA 2,3 Current TTL Standby Current (CE = Vj) lece 3 6 mA 2,3 CMOS Standby Current lecg 2 4.0 mA 2,3 (CE=Vec0.2V) Input Leakage Current (any input) lit -1 +1 WA Output Leakage Current lot -1 +1 LA Gutput Logic 1 Voltage Vou 2.4 Vv (lout = 1.0 mA) Qutput Logic 0 Voltage VoL 0.4 Vv (lout = +2.1 mA) Write Protection Voltage Ver 4.0 4.25 45 Vv 102996 6/11DS1647/081647LPM AC ELECTRICAL CHARACTERISTICS (0C to +70C; Vog = 5.0V + 10%) DS1647-12 DS1647-15 PARAMETER SYMBOL UNITS | NOTES MIN MAX MIN MAX Read Cycle Time tre 120 150 ns Address Access Time tAA 120 150 ns CE Access Time tcEA 120 150 ns CE Data Off Time teez 40 50 ns Output Enable Access Time toga 100 120 ns Output Enable Data Off Time toEz 40 50 ns Output Enable to DQ Low-Z toeL 5 5 ns CE to DQ Low-Z tcEL 5 5 ns Qutput Hold from Address tou 5 5 ns Write Cycle Time twe 120 150 ns Address Setup Time tas i) 0 ns CE Pulse Width tow 100 120 ns Address Hold from End of Write tant 5 5 ns 5 taH2 30 30 ns 8 Write Pulse Width twew 120 150 ns WE Data Off Time tweEz 40 50 ns WE or CE Inactive Time twr 10 10 ns Data Setup Time tps 85 110 ns Data Hold Time High tou4 0 0 ns 5 tone 25 25 ns 8 AC TEST CONDITIONS Input Levels: OV TO3V Transition Times: 5ns CAPACITANCE (ta = 25C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Capacitance on all pins C 7 pF {except DQ) Capacitance on DQ pins Coa 10 pF 102996 7/11DS1647/DS1647LPM AC ELECTRICAL CHARACTERISTICS (POWER-UP/DOWN TIMING) (0C to +70C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES CE or WE at Vj before Power tpp Q us Down Vpp (Max) to Ver (Min) Vec Fall tr 300 ps Time Ver (Min) to Vag Vec Fall Time tre 10 ps Visco to Vpr (Min) Voc Rise Time tre 1 ps Ver (Min) to Vpp (Max) Vec Rise tr 0 us Time PowerUp trec 15 25 35 ms Expected Data Retention Time tor 7 years 4 (Oscillator On) DS1647 READ CYCLE TIMING READ READ WRITE i _ jpg. _ | $$ lwo 5) ye AGA13 x h [< tsa _1 | mat tH ~ tas IcEA m cE tcEL al OE A TOEA twR WE t OEL * oH DOo-BQ? a KC VALID OUT 102996 8/11DS1647/081647LPM <t-__ DS1647 WRITE CYCLE TIMING WRITE two 1) $_$ two ) WRITE READ i_ iro } of A0-A18 x K XK a tat i tsa, > wr icEz 35) VALID OUT DQo- DQ? Voc Vg (MAX) IF POWER-DOWN/POWER-UP TIMING m loca VALID IN tWEZ VALID OUT Ver (MIN} VPrF + Vso Vso FO tre \ / the / Z ba} w TREC fog 7 f f / fd vn / | DATA RETENTION ba oo lor 102996 9/11DS1647/DS1647LPM NOTES 1. All voltages are referenced to ground. 2. Typical values are at 25C and nominal supplies. 3. Outputs are open. 4 Data retention time is at 25C and is calculated from the date code on the device package plus one year. The date code XX is the year fol- lowed by the week of the year in which the device was manufactured. For example, 9225, would mean the 25th week of 1992. 5. tau, toy are measured from WE going high. 6. taye, tpy2 are measured from CE geing high. DS1647 32-PIN PACKAGE - + + + c Mk | hae 1 ew ted lhe H B J i OUTPUT LOAD +5 VOLTS e 1.8Ka, D.ULT. 1KG. 100 pF PKG 32-PIN DIM MIN MAX A IN, 1.670 1.690 MM 38.42 38.93 BIN. 0.715 0.740 MM 18.16 18.80 CIN. 0.335 0.355 MM 8.51 9.02 D IN. 0.075 0.105 MM 1.91 2.67 EIN. 0.015 0.030 MM 0.38 0.76 FIN. 0.120 0.170 MM 3.05 4.32 G IN. 0.090 0.110 MM 2.29 2.79 HIN. 0.590. 0.630 MM 14.99 16.00 JIN. 0.008 0.012 MM 0.20 0.30 KIN. 0.015 0.025. MM 0.38 0.64 102996 10/11DS1647LPM 34-PIN LOW PROFILE MODULE ct a DS1647/081647LPM PKG INCHES DIM MIN MAX A 0.955 0.970 B 0.840 0.855, c 0.230 0.250 D 0.975 0.995 E 0.047 0.053 F 0.015 0.025 NOTE: The recommended 68-pin PLCC surface mountable socket to be used with this 34-pin module is: McKenzie P/N# 34PSMT-3 The McKenzie socket plus the DS1647LPM has the fel- lowing approximate dimensions: length, width = 1.22, height = 0.255. 102996 11/11