MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer tm Features General Description TTL input compatible The MM74HCT540 and MM74HCT541 3-STATE buffers utilize advanced silicon-gate CMOS technology and are general purpose high speed inverting and non-inverting buffers. They possess high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the low power consumption of CMOS. Both devices are TTL input compatible and have a fanout of 15 LS-TTL equivalent inputs. Typical propagation delay: 12ns 3-STATE outputs for connection to system buses Low quiescent current: 80A Output current: 6mA (Min.) MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs. The MM74HCT540 is an inverting buffer and the MM74HCT541 is a non-inverting buffer. The 3-STATE control gate operates as a two-input NOR such that if either G1 or G2 are HIGH, all eight outputs are in the high-impedance state. In order to enhance PC board layout, the MM74HCT540 and MM74HCT541 offers a pinout having inputs and outputs on opposite sides of the package. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Ordering Information Order Number MM74HCT540WM MM74HCT540SJ Package Number Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT540MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT541WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT541SJ MM74HCT541MTC MM74HCT541N MTC20 N20A 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering number. (c)1984 Fairchild Semiconductor Corporation MM74HCT540, MM74HCT541 Rev. 1.3 www.fairchildsemi.com MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer June 2007 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View, MM74HCT540 Top View, MM74HCT541 (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating VCC Supply Voltage VIN DC Input Voltage -1.5 to VCC +1.5V DC Output Voltage -0.5 to VCC +0.5V VOUT IIK, IOK -0.5 to +7.0V Clamp Diode Current 20mA IOUT DC Output Current, per pin 35mA ICC DC VCC or GND Current, per pin 70mA TSTG PD TL Storage Temperature Range -65C to +150C Power Dissipation Note 2 600mW S.O. Package only 500mW Lead Temperature (Soldering 10 seconds) 260C Note: 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating -- plastic "N" package: -12mW/C from 65C to 85C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC VIN, VOUT TA tr , tf Parameter Min. Supply Voltage DC Input or Output Voltage Operating Temperature Range Input Rise and Fall Times (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 Max. Units 4.5 5.5 V 0 VCC V -40 +85 C 500 ns www.fairchildsemi.com 3 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Absolute Maximum Ratings(1) VCC = 5V 10% (unless otherwise specified) TA = 25C Parameter VIH Minimum HIGH Level Input Voltage 2.0 2.0 2.0 V VIL Maximum LOW Level Input Voltage 0.8 0.8 0.8 V VOH Minimum HIGH Level Output Voltage V Maximum LOW Level Voltage Typ. TA = -55 to 125C Symbol VOL Conditions TA = -40 to 85C Guaranteed Limits Units VIN = VIH or VIL: |IOUT| = 20A VCC VCC - 0.1 VCC - 0.1 VCC - 0.1 |IOUT| = 6.0mA, VCC = 4.5V 4.2 3.98 3.84 3.7 |IOUT| = 7.2mA, VCC = 5.5V 5.2 4.98 4.84 4.7 0 0.1 0.1 0.1 VIN = VIH or VIL: |IOUT| = 20A V |IOUT| = 6.0mA, VCC = 4.5V 0.2 0.26 0.33 0.4 |IOUT| = 7.2mA, VCC = 5.5V 0.2 0.26 0.33 0.4 0.1 1.0 1.0 A 0.5 5.0 10 A 8.0 80 160 A 1.0 1.3 1.5 mA VIN = VCC or GND IIN Maximum Input Current IOZ Maximum 3-STATE VOUT = VCC or GND, G = VIH Output Leakage Current ICC Maximum Quiescent Supply Current VIN = VCC or GND, IOUT = 0A VIN = 2.4V or 0.5V(3) 0.6 Note: 3. Measured per input. All other inputs at VCC or GND. (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 4 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer DC Electrical Characteristics Typ. Guaranteed Limits Units CL = 45pF 12 18 ns Maximum Output Enable Time CL = 45pF, RL = 1k 14 28 ns Maximum Output Disable Time CL = 5pF, RL = 1k 13 25 ns Symbol Parameter Conditions tPHL, tPLH Maximum Output Propagation Delay tPZL, tPZH tPLZ, tPHZ AC Electrical Characteristics MM74HCT540: VCC = 5.0V 10%, tr = tf = 6ns (unless otherwise specified). TA = 25C Symbol Parameter Conditions Typ. TA = -40 to 85C TA = -55 to 125C Guaranteed Limits Units tPHL, tPLH Maximum Output Propagation Delay CL = 50pF 12 20 25 30 CL = 150pF 22 30 38 45 tPZH, tPZL Maximum Output Enable Time RL = 1k CL = 50pF 15 30 38 45 CL = 150pF 20 40 50 60 tPHZ, tPLZ Maximum Output Disable Time RL = 1k, CL = 50pF 15 30 38 45 ns tTHL, tTLH Maximum Output Rise and Fall Time CL = 50pF 6 12 15 18 ns Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 15 20 20 20 pF CPD Power Dissipation Capacitance(4) CIN (per output) G = VCC G = GND 12 ns ns pF 50 Note: 4. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC . (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 5 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer AC Electrical Characteristics MM74HCT540: VCC = 5.0V, tr = tf = 6ns, TA = 25C, (unless otherwise specified). MM74HCT541: VCC = 5.0V, tr = tf = 6ns, TA = 25C, (unless otherwise specified). Symbol Parameter Conditions Typ. Guaranteed Limits Units tPHL, tPLH Maximum Output Propagation Delay CL = 45pF 13 20 ns tPZL, tPZH Maximum Output Enable Time CL = 45pF, RL = 1k 17 28 ns tPLZ, tPHZ Maximum Output Disable Time CL = 5pF, RL = 1k 15 25 ns AC Electrical Characteristics MM74HCT541: VCC = 5.0V 10%, tr = tf = 6ns (unless otherwise specified). TA = 25C Symbol tPHL, tPLH Parameter Maximum Output Propagation Delay Conditions Typ. TA = -40 to 85C TA = -55 to 125C Guaranteed Limits Units CL = 50pF 14 23 29 34 CL = 150pF 17 33 42 49 CL = 50pF 17 30 38 45 CL = 150pF 22 40 50 60 17 30 38 45 ns ns Maximum Output Enable Time RL = 1k tPHZ, tPLZ Maximum Output Disable Time RL = 1k, CL = 50pF tTHL, tTLH Maximum Output Rise CL = 50pF and Fall Time 6 12 15 18 ns Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 15 20 20 20 pF CPD Power Dissipation Capacitance(5) tPZH, tPZL CIN (per output) G = VCC 12 G = GND 45 ns pF Note: 5. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC . (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 6 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer AC Electrical Characteristics Dimensions are in inches (millimeters) unless otherwise noted. Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 7 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Physical Dimensions MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 8 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 9 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer Physical Dimensions (Continued) Dimensions are in inches (millimeters) unless otherwise noted. Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 10 The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx(R) Build it NowTM CorePLUSTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FPSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM i-LoTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroPakTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) PDP-SPMTM Power220(R) Power247(R) POWEREDGE(R) Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM The Power Franchise(R) TM TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM SerDesTM UHC(R) UniFETTM VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I28 (c)1984 Fairchild Semiconductor Corporation Rev. 1.3 www.fairchildsemi.com 11 MM74HCT540, Inverting Octal 3-STATE Buffer MM74HCT541, Octal 3-STATE Buffer TRADEMARKS