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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. March 1996 NDS355N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMICA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. 1.6A, 30V. RDS(ON) = 0.125 @ VGS = 4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount package. _______________________________________________________________________________ D S G Absolute Maximum Ratings T A = 25C unless otherwise noted Symbol Parameter NDS355N Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage - Continuous 20 V ID Drain Current - Continuous 1.6 A (Note 1a) - Pulsed PD 10 Maximum Power Dissipation (Note 1a) (Note 1b) TJ,TSTG 0.5 W 0.46 Operating and Storage Temperature Range -55 to 150 C THERMAL CHARACTERISTICS RJA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 C/W RJC Thermal Resistance, Junction-to -Case (Note 1) 75 C/W (c) 1997 Fairchild Semiconductor Corporation NDS355N Rev. D1 Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 30 V TJ=125C 1 A 10 A IGSSF Gate - Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -12 V, VDS= 0 V -100 nA 2 V ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A RDS(ON) Static Drain-Source On-Resistance VGS = 4.5 V, ID = 1.6 A TJ=125C 1 1.6 0.5 1.3 1.5 0.125 TJ=125C 0.25 0.085 VGS = 10 V, ID = 1.9 A ID(ON) On-State Drain Current VGS = 4.5 V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 1.6 A 6 3.5 A S VDS = 10 V, VGS = 0 V, f = 1.0 MHz 245 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) tf Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge 130 pF 20 pF (Note 2) VDD = 10 V, ID = 1 A, VGS = 10 V, RGEN = 6 15 30 ns 14 30 ns Turn - Off Delay Time 12 25 ns Turn - Off Fall Time 4 10 ns VDS = 10 V, ID = 1.6 A, VGS = 5 V 3.5 5 nC 1 nC 2 nC NDS355N Rev. D1 Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Source Current 0.6 A ISM Maximum Pulse Source Current (Note 2) 6 A VSD Drain-Source Diode Forward Voltage 1.2 V VGS = 0 V, IS = 1.6 A 0.8 Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. PD (t ) = TJ -TA R J A(t ) = TJ - TA R J C+RCA(t ) = I 2D (t ) x RDS (ON ) TJ Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz cpper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz cpper. 1a 1b Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDS355N Rev. D1 Typical Electrical Characteristics 12 2 6.0 VGS =3.5V 5.0 4.5 R DS(on) , NORMALIZED 9 4.0 6 3.5 3 3.0 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) V GS =10V 0 0 1 2 3 V DS , DRAIN-SOURCE VOLTAGE (V) 4.0 1.5 4.5 5.0 1 10 0.5 4 0 6 , DRAIN CURRENT (A) 9 12 3 V GS = 4.5V I D = 1.6A V 1.4 R DS(on), NORMALIZED GS =4.5V 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 DRAIN-SOURCE ON-RESISTANCE R DS(ON), NORMALIZED D Figure 2. On-Resistance Variation with Gate Voltage and Drain Current 1.6 DRAIN-SOURCE ON-RESISTANCE 3 I Figure 1. On-Region Characteristics 2.5 T J = 125C 2 1.5 25C -55C 1 0.5 150 0 Figure 3. On-Resistance Variation with Temperature 2 4 6 8 I D , DRAIN CURRENT (A) 10 12 Figure 4. On-Resistance Variation with Drain Current and Temperature 1.2 V DS = 10V TJ = -55C 25C 125C Vth , NORMALIZED 8 6 4 2 0 1 2 3 4 5 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics 6 GATE-SOURCE THRESHOLD VOLTAGE (V) 10 I D , DRAIN CURRENT (A) 6.0 VDS = V GS 1.1 I D = 250A 1 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 6. Gate Threshold Variation with Temperature NDS355N Rev. D1 Typical Electrical Characteristics (continued) 20 10 I D = 250A 1.1 I , REVERSE DRAIN CURRENT (A) 1.05 1 0.95 0.9 -50 -25 0 25 50 75 100 125 , JUNCTION TEMPERATURE (C) TJ 1 T J = 125C 25C -55C 0.1 0.01 150 0.001 0.2 175 0.4 0.6 0.8 1 1.2 1.4 VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 7. Breakdown Voltage Variation with Temperature Figure 8. Body Diode Forward Voltage Variation with Current and Temperature 10 500 I V GS , GATE-SOURCE VOLTAGE (V) C iss 300 200 CAPACITANCE (pF) VGS = 0V S BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE (V) 1.15 C oss 100 50 30 C rss f = 1 MHz V GS = 0 V D VDS = 5V = 1.6A 8 10 15 6 4 2 0 0.1 0.2 0.5 1 2 5 10 30 0 1 2 V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 9. Capacitance Characteristics t d(off) V OUT Output, Vout tf 10% 10% 90% Input, Vin S Figure 11. Switching Test Circuit 7 90% 90% DUT G 6 t off tr RL D R GEN 5 t on t d(on) VGS 4 Figure 10. Gate Charge Characteristics VDD V IN 3 Q g , GATE CHARGE (nC) Inverted 50% 50% 10% Pulse Width Figure 12. Switching Waveforms NDS355N Rev. D1 Typical Electrical Characteristics (continued) 20 10 -55C 6 I D , DRAIN CURRENT (A) 25C T J = 125C 4 2 2 R ( DS ) ON Lim 10 it 1m 10 1 0.5 0u s s ms 10 0m s 1 10 s s DC V GS = 10V 0.1 SINGLE PULSE T A = 25C VDS = 5V g FS , TRANSCONDUCTANCE (SIEMENS) 8 0 0 2 4 6 8 10 12 0.01 0.1 1 ID D , DRAIN CURRENT (A) V Figure 13. Transconductance Variation with Drain Current and Temperature DS 2 5 10 20 30 50 , DRAIN-SOURCE VOLTAGE (V) Figure 14. Maximum Safe Operating Area 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.5 D = 0.5 0.2 0.2 0.1 0.1 0.05 0.02 0.01 0.005 R JA (t) = r(t) * RJA R = 250 C/W JA 0.05 0.02 P(pk) 0.01 t1 Single Pulse 0.002 0.001 0.0001 t2 TJ - T A = P * R JA (t) Duty Cycle, D = t1 /t2 0.001 0.01 0.1 t1 , TIME (sec) 1 10 100 300 Figure 15. Transient Thermal Response Curve Note : Characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS355N Rev. D1 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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